mirror of
https://github.com/aircrack-ng/rtl8812au.git
synced 2024-09-20 05:00:36 +00:00
Cleanup of unused / unsupported chipsets
This commit is contained in:
kimocoder
parent
4137e7a019
commit
908f8a9fc5
@ -4588,6 +4588,7 @@ static bool rtw_ap_choose_chbw(_adapter *adapter, u8 sel_ch, u8 max_bw, u8 cur_c
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, RTW_CHF_DFS
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, cur_ch
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, rfctl->ch_sel_same_band_prefer, mesh_only);
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goto exit;
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}
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exit:
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@ -1298,14 +1298,9 @@ void rtw_rf_set_tx_gain_offset(_adapter *adapter, u8 path, s8 offset)
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rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0f8000, write_value);
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break;
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#endif /* CONFIG_RTL8821A */
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#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8192F)
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#if defined(CONFIG_RTL8814A)
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case RTL8814A:
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case RTL8822B:
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case RTL8821C:
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case RTL8192F:
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RTW_INFO("\nkfree by PhyDM on the sw CH. path %d\n", path);
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break;
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#endif /* CONFIG_RTL8814A || CONFIG_RTL8822B || CONFIG_RTL8821C */
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#endif /* CONFIG_RTL8814A */
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default:
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rtw_warn_on(1);
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217
hal/hal_com.c
217
hal/hal_com.c
@ -11292,10 +11292,8 @@ u64 rtw_hal_get_tsftr_by_port(_adapter *adapter, u8 port)
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}
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switch (rtw_get_chip_type(adapter)) {
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#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C)
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#if defined(CONFIG_RTL8814A)
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case RTL8814A:
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case RTL8822B:
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case RTL8821C:
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{
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u8 val8;
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@ -11312,22 +11310,9 @@ u64 rtw_hal_get_tsftr_by_port(_adapter *adapter, u8 port)
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break;
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}
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#endif
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#if defined(CONFIG_RTL8188E) || defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV) \
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|| defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8192F) \
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|| defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8703B) || defined(CONFIG_RTL8723D) \
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|| defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) \
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|| defined(CONFIG_RTL8710B)
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case RTL8188E:
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case RTL8188F:
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case RTL8188GTV:
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case RTL8192E:
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case RTL8192F:
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case RTL8723B:
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case RTL8703B:
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case RTL8723D:
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#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A)
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case RTL8812:
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case RTL8821:
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case RTL8710B:
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{
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u32 addr;
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@ -11362,7 +11347,6 @@ s32 rtw_hal_ch_sw_oper_offload(_adapter *padapter, u8 channel, u8 channel_offset
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PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
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u8 ch_sw_h2c_buf[4] = {0x00, 0x00, 0x00, 0x00};
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SET_H2CCMD_CH_SW_OPER_OFFLOAD_CH_NUM(ch_sw_h2c_buf, channel);
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SET_H2CCMD_CH_SW_OPER_OFFLOAD_BW_MODE(ch_sw_h2c_buf, bwmode);
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switch (bwmode) {
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@ -12510,61 +12494,7 @@ int hal_efuse_macaddr_offset(_adapter *adapter)
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interface_type = rtw_get_intf_type(adapter);
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switch (rtw_get_chip_type(adapter)) {
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#ifdef CONFIG_RTL8723B
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case RTL8723B:
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if (interface_type == RTW_USB)
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addr_offset = EEPROM_MAC_ADDR_8723BU;
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else if (interface_type == RTW_SDIO)
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addr_offset = EEPROM_MAC_ADDR_8723BS;
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else if (interface_type == RTW_PCIE)
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addr_offset = EEPROM_MAC_ADDR_8723BE;
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break;
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#endif
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#ifdef CONFIG_RTL8703B
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case RTL8703B:
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if (interface_type == RTW_USB)
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addr_offset = EEPROM_MAC_ADDR_8703BU;
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else if (interface_type == RTW_SDIO)
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addr_offset = EEPROM_MAC_ADDR_8703BS;
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break;
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#endif
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#ifdef CONFIG_RTL8723D
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case RTL8723D:
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if (interface_type == RTW_USB)
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addr_offset = EEPROM_MAC_ADDR_8723DU;
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else if (interface_type == RTW_SDIO)
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addr_offset = EEPROM_MAC_ADDR_8723DS;
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else if (interface_type == RTW_PCIE)
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addr_offset = EEPROM_MAC_ADDR_8723DE;
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break;
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#endif
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#ifdef CONFIG_RTL8188E
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case RTL8188E:
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if (interface_type == RTW_USB)
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addr_offset = EEPROM_MAC_ADDR_88EU;
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else if (interface_type == RTW_SDIO)
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addr_offset = EEPROM_MAC_ADDR_88ES;
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else if (interface_type == RTW_PCIE)
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addr_offset = EEPROM_MAC_ADDR_88EE;
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break;
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#endif
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#ifdef CONFIG_RTL8188F
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case RTL8188F:
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if (interface_type == RTW_USB)
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addr_offset = EEPROM_MAC_ADDR_8188FU;
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else if (interface_type == RTW_SDIO)
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addr_offset = EEPROM_MAC_ADDR_8188FS;
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break;
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#endif
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#ifdef CONFIG_RTL8188GTV
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case RTL8188GTV:
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if (interface_type == RTW_USB)
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addr_offset = EEPROM_MAC_ADDR_8188GTVU;
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else if (interface_type == RTW_SDIO)
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addr_offset = EEPROM_MAC_ADDR_8188GTVS;
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break;
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#endif
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#ifdef CONFIG_RTL8812A
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case RTL8812:
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if (interface_type == RTW_USB)
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@ -12583,16 +12513,6 @@ int hal_efuse_macaddr_offset(_adapter *adapter)
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addr_offset = EEPROM_MAC_ADDR_8821AE;
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break;
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#endif
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#ifdef CONFIG_RTL8192E
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case RTL8192E:
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if (interface_type == RTW_USB)
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addr_offset = EEPROM_MAC_ADDR_8192EU;
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else if (interface_type == RTW_SDIO)
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addr_offset = EEPROM_MAC_ADDR_8192ES;
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else if (interface_type == RTW_PCIE)
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addr_offset = EEPROM_MAC_ADDR_8192EE;
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break;
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#endif
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#ifdef CONFIG_RTL8814A
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case RTL8814A:
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if (interface_type == RTW_USB)
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@ -12602,46 +12522,6 @@ int hal_efuse_macaddr_offset(_adapter *adapter)
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break;
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#endif
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#ifdef CONFIG_RTL8822B
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case RTL8822B:
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if (interface_type == RTW_USB)
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addr_offset = EEPROM_MAC_ADDR_8822BU;
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else if (interface_type == RTW_SDIO)
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addr_offset = EEPROM_MAC_ADDR_8822BS;
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else if (interface_type == RTW_PCIE)
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addr_offset = EEPROM_MAC_ADDR_8822BE;
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break;
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#endif /* CONFIG_RTL8822B */
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#ifdef CONFIG_RTL8821C
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case RTL8821C:
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if (interface_type == RTW_USB)
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addr_offset = EEPROM_MAC_ADDR_8821CU;
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else if (interface_type == RTW_SDIO)
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addr_offset = EEPROM_MAC_ADDR_8821CS;
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else if (interface_type == RTW_PCIE)
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addr_offset = EEPROM_MAC_ADDR_8821CE;
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break;
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#endif /* CONFIG_RTL8821C */
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#ifdef CONFIG_RTL8710B
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case RTL8710B:
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if (interface_type == RTW_USB)
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addr_offset = EEPROM_MAC_ADDR_8710B;
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break;
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#endif
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#ifdef CONFIG_RTL8192F
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case RTL8192F:
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if (interface_type == RTW_USB)
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addr_offset = EEPROM_MAC_ADDR_8192FU;
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else if (interface_type == RTW_SDIO)
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addr_offset = EEPROM_MAC_ADDR_8192FS;
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else if (interface_type == RTW_PCIE)
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addr_offset = EEPROM_MAC_ADDR_8192FE;
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break;
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#endif /* CONFIG_RTL8192F */
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}
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if (addr_offset == -1) {
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@ -13723,7 +13603,7 @@ void rtw_set_rts_bw(_adapter *padapter) {
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RTW_INFO("%s connect_to_8812=%d,enable=%u\n", __FUNCTION__,connect_to_8812,enable);
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rtw_hal_set_hwreg(padapter, HW_VAR_SET_RTS_BW, &enable);
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}
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#endif/*CONFIG_RTS_FULL_BW*/
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#endif /*CONFIG_RTS_FULL_BW*/
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/* TODO: merge with phydm, see odm_SetCrystalCap() */
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void hal_set_crystal_cap(_adapter *adapter, u8 crystal_cap)
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@ -13731,28 +13611,15 @@ void hal_set_crystal_cap(_adapter *adapter, u8 crystal_cap)
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crystal_cap = crystal_cap & 0x3F;
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switch (rtw_get_chip_type(adapter)) {
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#if defined(CONFIG_RTL8188E) || defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV)
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case RTL8188E:
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case RTL8188F:
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case RTL8188GTV:
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/* write 0x24[16:11] = 0x24[22:17] = CrystalCap */
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phy_set_bb_reg(adapter, REG_AFE_XTAL_CTRL, 0x007FF800, (crystal_cap | (crystal_cap << 6)));
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break;
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#endif
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#if defined(CONFIG_RTL8812A)
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case RTL8812:
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/* write 0x2C[30:25] = 0x2C[24:19] = CrystalCap */
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phy_set_bb_reg(adapter, REG_MAC_PHY_CTRL, 0x7FF80000, (crystal_cap | (crystal_cap << 6)));
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break;
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#endif
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#if defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8703B) || \
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defined(CONFIG_RTL8723D) || defined(CONFIG_RTL8821A) || \
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defined(CONFIG_RTL8192E)
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case RTL8723B:
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case RTL8703B:
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case RTL8723D:
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#if defined(CONFIG_RTL8821A)
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case RTL8821:
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case RTL8192E:
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/* write 0x2C[23:18] = 0x2C[17:12] = CrystalCap */
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phy_set_bb_reg(adapter, REG_MAC_PHY_CTRL, 0x00FFF000, (crystal_cap | (crystal_cap << 6)));
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break;
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@ -13763,25 +13630,7 @@ void hal_set_crystal_cap(_adapter *adapter, u8 crystal_cap)
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phy_set_bb_reg(adapter, REG_MAC_PHY_CTRL, 0x07FF8000, (crystal_cap | (crystal_cap << 6)));
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break;
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#endif
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#if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8192F)
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case RTL8822B:
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case RTL8821C:
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case RTL8192F:
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/* write 0x28[6:1] = 0x24[30:25] = CrystalCap */
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crystal_cap = crystal_cap & 0x3F;
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phy_set_bb_reg(adapter, REG_AFE_XTAL_CTRL, 0x7E000000, crystal_cap);
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phy_set_bb_reg(adapter, REG_AFE_PLL_CTRL, 0x7E, crystal_cap);
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break;
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#endif
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#if defined(CONFIG_RTL8710B)
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case RTL8710B:
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/*Change by ylb 20160728, Becase 0x2C[23:12] is removed to syson 0x60[29:18] */
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/* 0x2C[23:18] = 0x2C[29:24] = CrystalCap //Xo:[29:24], Xi:[23:18]*/
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crystal_cap = crystal_cap & 0x3F;
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hal_set_syson_reg(adapter, REG_SYS_XTAL_CTRL0, 0x3FFC0000, (crystal_cap | (crystal_cap << 6)));
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break;
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#endif
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default:
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rtw_warn_on(1);
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}
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@ -13795,36 +13644,6 @@ int hal_spec_init(_adapter *adapter)
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interface_type = rtw_get_intf_type(adapter);
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switch (rtw_get_chip_type(adapter)) {
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#ifdef CONFIG_RTL8723B
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case RTL8723B:
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init_hal_spec_8723b(adapter);
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break;
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#endif
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#ifdef CONFIG_RTL8703B
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case RTL8703B:
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init_hal_spec_8703b(adapter);
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break;
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#endif
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#ifdef CONFIG_RTL8723D
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case RTL8723D:
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init_hal_spec_8723d(adapter);
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break;
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#endif
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#ifdef CONFIG_RTL8188E
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case RTL8188E:
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init_hal_spec_8188e(adapter);
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break;
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#endif
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#ifdef CONFIG_RTL8188F
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case RTL8188F:
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init_hal_spec_8188f(adapter);
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break;
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#endif
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#ifdef CONFIG_RTL8188GTV
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case RTL8188GTV:
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init_hal_spec_8188gtv(adapter);
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break;
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#endif
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#ifdef CONFIG_RTL8812A
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case RTL8812:
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init_hal_spec_8812a(adapter);
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@ -13835,37 +13654,11 @@ int hal_spec_init(_adapter *adapter)
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init_hal_spec_8821a(adapter);
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break;
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#endif
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#ifdef CONFIG_RTL8192E
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case RTL8192E:
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init_hal_spec_8192e(adapter);
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break;
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#endif
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#ifdef CONFIG_RTL8814A
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case RTL8814A:
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init_hal_spec_8814a(adapter);
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break;
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#endif
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#ifdef CONFIG_RTL8822B
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case RTL8822B:
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rtl8822b_init_hal_spec(adapter);
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break;
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#endif
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#ifdef CONFIG_RTL8821C
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case RTL8821C:
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init_hal_spec_rtl8821c(adapter);
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break;
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#endif
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#ifdef CONFIG_RTL8710B
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case RTL8710B:
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init_hal_spec_8710b(adapter);
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break;
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#endif
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#ifdef CONFIG_RTL8192F
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case RTL8192F:
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init_hal_spec_8192f(adapter);
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break;
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#endif
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default:
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RTW_ERR("%s: unknown chip_type:%u\n"
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, __func__, rtw_get_chip_type(adapter));
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55
hal/hal_dm.c
55
hal/hal_dm.c
@ -79,7 +79,7 @@ void rtw_hal_update_iqk_fw_offload_cap(_adapter *adapter)
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RTW_INFO("IQK FW offload:%s\n", hal->RegIQKFWOffload ? "enable" : "disable");
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}
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#if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1))
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#if ((RTL8814B_SUPPORT == 1))
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void rtw_phydm_iqk_trigger(_adapter *adapter)
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{
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struct dm_struct *p_dm_odm = adapter_to_phydm(adapter);
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@ -98,7 +98,7 @@ void rtw_phydm_iqk_trigger_dbg(_adapter *adapter, bool recovery, bool clear, boo
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{
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struct dm_struct *p_dm_odm = adapter_to_phydm(adapter);
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#if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1))
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#if ((RTL8814B_SUPPORT == 1))
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halrf_segment_iqk_trigger(p_dm_odm, clear, segment);
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#else
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halrf_iqk_trigger(p_dm_odm, recovery);
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@ -187,20 +187,6 @@ void rtw_phydm_fill_desc_dpt(void *dm, u8 *desc, u8 dpt_lv)
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switch (rtw_get_chip_type(adapter)) {
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/*
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#ifdef CONFIG_RTL8188F
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case RTL8188F:
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break;
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#endif
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#ifdef CONFIG_RTL8723B
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case RTL8723B :
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break;
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#endif
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#ifdef CONFIG_RTL8703B
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case RTL8703B :
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break;
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#endif
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#ifdef CONFIG_RTL8812A
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case RTL8812 :
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@ -217,24 +203,7 @@ void rtw_phydm_fill_desc_dpt(void *dm, u8 *desc, u8 dpt_lv)
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break;
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#endif
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#ifdef CONFIG_RTL8192F
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case RTL8192F :
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break;
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#endif
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*/
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/*
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#ifdef CONFIG_RTL8192E
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case RTL8192E :
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SET_TX_DESC_TX_POWER_0_PSET_92E(desc, dpt_lv);
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break;
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#endif
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*/
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#ifdef CONFIG_RTL8821C
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case RTL8821C :
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SET_TX_DESC_TXPWR_OFSET_8821C(desc, dpt_lv);
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break;
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#endif
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default :
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RTW_ERR("%s IC not support dynamic tx power\n", __func__);
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@ -591,11 +560,6 @@ void rtw_hal_turbo_edca(_adapter *adapter)
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return;
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}
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if (ic_type == RTL8188E) {
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if ((iot_peer == HT_IOT_PEER_RALINK) || (iot_peer == HT_IOT_PEER_ATHEROS))
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is_bias_on_rx = _TRUE;
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}
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/* Check if the status needs to be changed. */
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if ((bbtchange) || (!precvpriv->is_any_non_be_pkts)) {
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cur_tx_bytes = dvobj->traffic_stat.cur_tx_bytes;
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@ -648,7 +612,7 @@ void rtw_hal_turbo_edca(_adapter *adapter)
|
||||
EDCA_BE_DL = edca_setting_DL[iot_peer];
|
||||
}
|
||||
|
||||
if ((ic_type == RTL8812) || (ic_type == RTL8821) || (ic_type == RTL8192E) || (ic_type == RTL8192F)) { /* add 8812AU/8812AE */
|
||||
if ((ic_type == RTL8812) || (ic_type == RTL8821)) { /* add 8812AU/8812AE */
|
||||
EDCA_BE_UL = 0x5ea42b;
|
||||
EDCA_BE_DL = 0x5ea42b;
|
||||
|
||||
@ -656,16 +620,11 @@ void rtw_hal_turbo_edca(_adapter *adapter)
|
||||
}
|
||||
|
||||
if (interface_type == RTW_PCIE &&
|
||||
((ic_type == RTL8822B)
|
||||
|| (ic_type == RTL8814A))) {
|
||||
(ic_type == RTL8814A)) {
|
||||
EDCA_BE_UL = 0x6ea42b;
|
||||
EDCA_BE_DL = 0x6ea42b;
|
||||
}
|
||||
|
||||
if ((ic_type == RTL8822B)
|
||||
&& (interface_type == RTW_SDIO))
|
||||
EDCA_BE_DL = 0x00431c;
|
||||
|
||||
#ifdef CONFIG_RTW_TPT_MODE
|
||||
if ( dvobj->tpt_mode > 0 ) {
|
||||
EDCA_BE_UL = dvobj->edca_be_ul;
|
||||
@ -1414,7 +1373,7 @@ static u8 _rtw_phydm_rfk_condition_check(_adapter *adapter, u8 is_scaning, u8 if
|
||||
return rfk_allowed;
|
||||
}
|
||||
|
||||
#if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1))
|
||||
#if (RTL8814B_SUPPORT == 1)
|
||||
static u8 _rtw_phydm_iqk_segment_chk(_adapter *adapter, u8 ifs_linked)
|
||||
{
|
||||
u8 iqk_sgt = _FALSE;
|
||||
@ -1543,7 +1502,7 @@ void rtw_phydm_watchdog(_adapter *adapter, bool in_lps)
|
||||
u8 bsta_state = _FALSE;
|
||||
u8 bBtDisabled = _TRUE;
|
||||
u8 rfk_forbidden = _FALSE;
|
||||
#if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1))
|
||||
#if (RTL8814B_SUPPORT == 1)
|
||||
u8 segment_iqk = _FALSE;
|
||||
#endif
|
||||
u8 tx_unlinked_low_rate = 0xFF;
|
||||
@ -1576,7 +1535,7 @@ void rtw_phydm_watchdog(_adapter *adapter, bool in_lps)
|
||||
rfk_forbidden = (_rtw_phydm_rfk_condition_check(adapter, pHalData->bScanInProcess, bLinked) == _TRUE) ? _FALSE : _TRUE;
|
||||
halrf_cmn_info_set(&pHalData->odmpriv, HALRF_CMNINFO_RFK_FORBIDDEN, rfk_forbidden);
|
||||
|
||||
#if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1))
|
||||
#if ((RTL8814B_SUPPORT == 1))
|
||||
segment_iqk = _rtw_phydm_iqk_segment_chk(adapter, bLinked);
|
||||
halrf_cmn_info_set(&pHalData->odmpriv, HALRF_CMNINFO_IQK_SEGMENT, segment_iqk);
|
||||
#endif
|
||||
|
||||
@ -15,7 +15,6 @@
|
||||
#ifndef __HAL_INTF_H__
|
||||
#define __HAL_INTF_H__
|
||||
|
||||
|
||||
enum RTL871X_HCI_TYPE {
|
||||
RTW_PCIE = BIT0,
|
||||
RTW_USB = BIT1,
|
||||
@ -26,20 +25,20 @@ enum RTL871X_HCI_TYPE {
|
||||
enum _CHIP_TYPE {
|
||||
|
||||
NULL_CHIP_TYPE,
|
||||
RTL8188E,
|
||||
RTL8192E,
|
||||
//RTL8188E,
|
||||
//RTL8192E,
|
||||
RTL8812,
|
||||
RTL8821, /* RTL8811 */
|
||||
RTL8723B,
|
||||
//RTL8723B,
|
||||
RTL8814A,
|
||||
RTL8703B,
|
||||
RTL8188F,
|
||||
RTL8188GTV,
|
||||
RTL8822B,
|
||||
RTL8723D,
|
||||
RTL8821C,
|
||||
RTL8710B,
|
||||
RTL8192F,
|
||||
//RTL8703B,
|
||||
//RTL8188F,
|
||||
//RTL8188GTV,
|
||||
//RTL8822B,
|
||||
//RTL8723D,
|
||||
//RTL8821C,
|
||||
//RTL8710B,
|
||||
//RTL8192F,
|
||||
MAX_CHIP_TYPE
|
||||
};
|
||||
|
||||
@ -60,7 +59,6 @@ typedef enum _HAL_HW_TIMER_TYPE {
|
||||
HAL_TIMER_EARLYMODE = 2,
|
||||
} HAL_HW_TIMER_TYPE, *PHAL_HW_TIMER_TYPE;
|
||||
|
||||
|
||||
typedef enum _HW_VARIABLES {
|
||||
HW_VAR_MEDIA_STATUS,
|
||||
HW_VAR_SET_OPMODE,
|
||||
|
||||
Loading…
Reference in New Issue
Block a user