From 908f8a9fc5fedf6de7b827c33a7db9540441276c Mon Sep 17 00:00:00 2001 From: kimocoder Date: Sat, 24 Aug 2019 08:07:50 +0200 Subject: [PATCH] Cleanup of unused / unsupported chipsets --- core/rtw_ap.c | 1 + core/rtw_rf.c | 9 +- hal/hal_com.c | 217 ++------------------------------------------- hal/hal_dm.c | 55 ++---------- include/hal_intf.h | 24 +++-- 5 files changed, 26 insertions(+), 280 deletions(-) diff --git a/core/rtw_ap.c b/core/rtw_ap.c index d3b4911..69b350e 100644 --- a/core/rtw_ap.c +++ b/core/rtw_ap.c @@ -4588,6 +4588,7 @@ static bool rtw_ap_choose_chbw(_adapter *adapter, u8 sel_ch, u8 max_bw, u8 cur_c , RTW_CHF_DFS , cur_ch , rfctl->ch_sel_same_band_prefer, mesh_only); + goto exit; } exit: diff --git a/core/rtw_rf.c b/core/rtw_rf.c index ab4c318..a39c308 100644 --- a/core/rtw_rf.c +++ b/core/rtw_rf.c @@ -1298,14 +1298,9 @@ void rtw_rf_set_tx_gain_offset(_adapter *adapter, u8 path, s8 offset) rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0f8000, write_value); break; #endif /* CONFIG_RTL8821A */ -#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8192F) +#if defined(CONFIG_RTL8814A) case RTL8814A: - case RTL8822B: - case RTL8821C: - case RTL8192F: - RTW_INFO("\nkfree by PhyDM on the sw CH. path %d\n", path); - break; -#endif /* CONFIG_RTL8814A || CONFIG_RTL8822B || CONFIG_RTL8821C */ +#endif /* CONFIG_RTL8814A */ default: rtw_warn_on(1); diff --git a/hal/hal_com.c b/hal/hal_com.c index 02e8652..751cdbb 100644 --- a/hal/hal_com.c +++ b/hal/hal_com.c @@ -11292,10 +11292,8 @@ u64 rtw_hal_get_tsftr_by_port(_adapter *adapter, u8 port) } switch (rtw_get_chip_type(adapter)) { -#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) +#if defined(CONFIG_RTL8814A) case RTL8814A: - case RTL8822B: - case RTL8821C: { u8 val8; @@ -11312,22 +11310,9 @@ u64 rtw_hal_get_tsftr_by_port(_adapter *adapter, u8 port) break; } #endif -#if defined(CONFIG_RTL8188E) || defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV) \ - || defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8192F) \ - || defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8703B) || defined(CONFIG_RTL8723D) \ - || defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) \ - || defined(CONFIG_RTL8710B) - case RTL8188E: - case RTL8188F: - case RTL8188GTV: - case RTL8192E: - case RTL8192F: - case RTL8723B: - case RTL8703B: - case RTL8723D: +#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) case RTL8812: case RTL8821: - case RTL8710B: { u32 addr; @@ -11362,7 +11347,6 @@ s32 rtw_hal_ch_sw_oper_offload(_adapter *padapter, u8 channel, u8 channel_offset PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); u8 ch_sw_h2c_buf[4] = {0x00, 0x00, 0x00, 0x00}; - SET_H2CCMD_CH_SW_OPER_OFFLOAD_CH_NUM(ch_sw_h2c_buf, channel); SET_H2CCMD_CH_SW_OPER_OFFLOAD_BW_MODE(ch_sw_h2c_buf, bwmode); switch (bwmode) { @@ -12510,61 +12494,7 @@ int hal_efuse_macaddr_offset(_adapter *adapter) interface_type = rtw_get_intf_type(adapter); switch (rtw_get_chip_type(adapter)) { -#ifdef CONFIG_RTL8723B - case RTL8723B: - if (interface_type == RTW_USB) - addr_offset = EEPROM_MAC_ADDR_8723BU; - else if (interface_type == RTW_SDIO) - addr_offset = EEPROM_MAC_ADDR_8723BS; - else if (interface_type == RTW_PCIE) - addr_offset = EEPROM_MAC_ADDR_8723BE; - break; -#endif -#ifdef CONFIG_RTL8703B - case RTL8703B: - if (interface_type == RTW_USB) - addr_offset = EEPROM_MAC_ADDR_8703BU; - else if (interface_type == RTW_SDIO) - addr_offset = EEPROM_MAC_ADDR_8703BS; - break; -#endif -#ifdef CONFIG_RTL8723D - case RTL8723D: - if (interface_type == RTW_USB) - addr_offset = EEPROM_MAC_ADDR_8723DU; - else if (interface_type == RTW_SDIO) - addr_offset = EEPROM_MAC_ADDR_8723DS; - else if (interface_type == RTW_PCIE) - addr_offset = EEPROM_MAC_ADDR_8723DE; - break; -#endif -#ifdef CONFIG_RTL8188E - case RTL8188E: - if (interface_type == RTW_USB) - addr_offset = EEPROM_MAC_ADDR_88EU; - else if (interface_type == RTW_SDIO) - addr_offset = EEPROM_MAC_ADDR_88ES; - else if (interface_type == RTW_PCIE) - addr_offset = EEPROM_MAC_ADDR_88EE; - break; -#endif -#ifdef CONFIG_RTL8188F - case RTL8188F: - if (interface_type == RTW_USB) - addr_offset = EEPROM_MAC_ADDR_8188FU; - else if (interface_type == RTW_SDIO) - addr_offset = EEPROM_MAC_ADDR_8188FS; - break; -#endif -#ifdef CONFIG_RTL8188GTV - case RTL8188GTV: - if (interface_type == RTW_USB) - addr_offset = EEPROM_MAC_ADDR_8188GTVU; - else if (interface_type == RTW_SDIO) - addr_offset = EEPROM_MAC_ADDR_8188GTVS; - break; -#endif #ifdef CONFIG_RTL8812A case RTL8812: if (interface_type == RTW_USB) @@ -12583,16 +12513,6 @@ int hal_efuse_macaddr_offset(_adapter *adapter) addr_offset = EEPROM_MAC_ADDR_8821AE; break; #endif -#ifdef CONFIG_RTL8192E - case RTL8192E: - if (interface_type == RTW_USB) - addr_offset = EEPROM_MAC_ADDR_8192EU; - else if (interface_type == RTW_SDIO) - addr_offset = EEPROM_MAC_ADDR_8192ES; - else if (interface_type == RTW_PCIE) - addr_offset = EEPROM_MAC_ADDR_8192EE; - break; -#endif #ifdef CONFIG_RTL8814A case RTL8814A: if (interface_type == RTW_USB) @@ -12602,46 +12522,6 @@ int hal_efuse_macaddr_offset(_adapter *adapter) break; #endif -#ifdef CONFIG_RTL8822B - case RTL8822B: - if (interface_type == RTW_USB) - addr_offset = EEPROM_MAC_ADDR_8822BU; - else if (interface_type == RTW_SDIO) - addr_offset = EEPROM_MAC_ADDR_8822BS; - else if (interface_type == RTW_PCIE) - addr_offset = EEPROM_MAC_ADDR_8822BE; - break; -#endif /* CONFIG_RTL8822B */ - -#ifdef CONFIG_RTL8821C - case RTL8821C: - if (interface_type == RTW_USB) - addr_offset = EEPROM_MAC_ADDR_8821CU; - else if (interface_type == RTW_SDIO) - addr_offset = EEPROM_MAC_ADDR_8821CS; - else if (interface_type == RTW_PCIE) - addr_offset = EEPROM_MAC_ADDR_8821CE; - break; -#endif /* CONFIG_RTL8821C */ - -#ifdef CONFIG_RTL8710B - case RTL8710B: - if (interface_type == RTW_USB) - addr_offset = EEPROM_MAC_ADDR_8710B; - break; -#endif - -#ifdef CONFIG_RTL8192F - case RTL8192F: - if (interface_type == RTW_USB) - addr_offset = EEPROM_MAC_ADDR_8192FU; - else if (interface_type == RTW_SDIO) - addr_offset = EEPROM_MAC_ADDR_8192FS; - else if (interface_type == RTW_PCIE) - addr_offset = EEPROM_MAC_ADDR_8192FE; - break; -#endif /* CONFIG_RTL8192F */ - } if (addr_offset == -1) { @@ -13723,7 +13603,7 @@ void rtw_set_rts_bw(_adapter *padapter) { RTW_INFO("%s connect_to_8812=%d,enable=%u\n", __FUNCTION__,connect_to_8812,enable); rtw_hal_set_hwreg(padapter, HW_VAR_SET_RTS_BW, &enable); } -#endif/*CONFIG_RTS_FULL_BW*/ +#endif /*CONFIG_RTS_FULL_BW*/ /* TODO: merge with phydm, see odm_SetCrystalCap() */ void hal_set_crystal_cap(_adapter *adapter, u8 crystal_cap) @@ -13731,28 +13611,15 @@ void hal_set_crystal_cap(_adapter *adapter, u8 crystal_cap) crystal_cap = crystal_cap & 0x3F; switch (rtw_get_chip_type(adapter)) { -#if defined(CONFIG_RTL8188E) || defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV) - case RTL8188E: - case RTL8188F: - case RTL8188GTV: - /* write 0x24[16:11] = 0x24[22:17] = CrystalCap */ - phy_set_bb_reg(adapter, REG_AFE_XTAL_CTRL, 0x007FF800, (crystal_cap | (crystal_cap << 6))); - break; -#endif + #if defined(CONFIG_RTL8812A) case RTL8812: /* write 0x2C[30:25] = 0x2C[24:19] = CrystalCap */ phy_set_bb_reg(adapter, REG_MAC_PHY_CTRL, 0x7FF80000, (crystal_cap | (crystal_cap << 6))); break; #endif -#if defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8703B) || \ - defined(CONFIG_RTL8723D) || defined(CONFIG_RTL8821A) || \ - defined(CONFIG_RTL8192E) - case RTL8723B: - case RTL8703B: - case RTL8723D: +#if defined(CONFIG_RTL8821A) case RTL8821: - case RTL8192E: /* write 0x2C[23:18] = 0x2C[17:12] = CrystalCap */ phy_set_bb_reg(adapter, REG_MAC_PHY_CTRL, 0x00FFF000, (crystal_cap | (crystal_cap << 6))); break; @@ -13763,25 +13630,7 @@ void hal_set_crystal_cap(_adapter *adapter, u8 crystal_cap) phy_set_bb_reg(adapter, REG_MAC_PHY_CTRL, 0x07FF8000, (crystal_cap | (crystal_cap << 6))); break; #endif -#if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8192F) - case RTL8822B: - case RTL8821C: - case RTL8192F: - /* write 0x28[6:1] = 0x24[30:25] = CrystalCap */ - crystal_cap = crystal_cap & 0x3F; - phy_set_bb_reg(adapter, REG_AFE_XTAL_CTRL, 0x7E000000, crystal_cap); - phy_set_bb_reg(adapter, REG_AFE_PLL_CTRL, 0x7E, crystal_cap); - break; -#endif -#if defined(CONFIG_RTL8710B) - case RTL8710B: - /*Change by ylb 20160728, Becase 0x2C[23:12] is removed to syson 0x60[29:18] */ - /* 0x2C[23:18] = 0x2C[29:24] = CrystalCap //Xo:[29:24], Xi:[23:18]*/ - crystal_cap = crystal_cap & 0x3F; - hal_set_syson_reg(adapter, REG_SYS_XTAL_CTRL0, 0x3FFC0000, (crystal_cap | (crystal_cap << 6))); - break; -#endif default: rtw_warn_on(1); } @@ -13795,36 +13644,6 @@ int hal_spec_init(_adapter *adapter) interface_type = rtw_get_intf_type(adapter); switch (rtw_get_chip_type(adapter)) { -#ifdef CONFIG_RTL8723B - case RTL8723B: - init_hal_spec_8723b(adapter); - break; -#endif -#ifdef CONFIG_RTL8703B - case RTL8703B: - init_hal_spec_8703b(adapter); - break; -#endif -#ifdef CONFIG_RTL8723D - case RTL8723D: - init_hal_spec_8723d(adapter); - break; -#endif -#ifdef CONFIG_RTL8188E - case RTL8188E: - init_hal_spec_8188e(adapter); - break; -#endif -#ifdef CONFIG_RTL8188F - case RTL8188F: - init_hal_spec_8188f(adapter); - break; -#endif -#ifdef CONFIG_RTL8188GTV - case RTL8188GTV: - init_hal_spec_8188gtv(adapter); - break; -#endif #ifdef CONFIG_RTL8812A case RTL8812: init_hal_spec_8812a(adapter); @@ -13835,37 +13654,11 @@ int hal_spec_init(_adapter *adapter) init_hal_spec_8821a(adapter); break; #endif -#ifdef CONFIG_RTL8192E - case RTL8192E: - init_hal_spec_8192e(adapter); - break; -#endif #ifdef CONFIG_RTL8814A case RTL8814A: init_hal_spec_8814a(adapter); break; #endif -#ifdef CONFIG_RTL8822B - case RTL8822B: - rtl8822b_init_hal_spec(adapter); - break; -#endif -#ifdef CONFIG_RTL8821C - case RTL8821C: - init_hal_spec_rtl8821c(adapter); - break; -#endif -#ifdef CONFIG_RTL8710B - case RTL8710B: - init_hal_spec_8710b(adapter); - break; -#endif -#ifdef CONFIG_RTL8192F - case RTL8192F: - init_hal_spec_8192f(adapter); - break; -#endif - default: RTW_ERR("%s: unknown chip_type:%u\n" , __func__, rtw_get_chip_type(adapter)); diff --git a/hal/hal_dm.c b/hal/hal_dm.c index e98aa1e..6d60cb0 100644 --- a/hal/hal_dm.c +++ b/hal/hal_dm.c @@ -79,7 +79,7 @@ void rtw_hal_update_iqk_fw_offload_cap(_adapter *adapter) RTW_INFO("IQK FW offload:%s\n", hal->RegIQKFWOffload ? "enable" : "disable"); } -#if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1)) +#if ((RTL8814B_SUPPORT == 1)) void rtw_phydm_iqk_trigger(_adapter *adapter) { struct dm_struct *p_dm_odm = adapter_to_phydm(adapter); @@ -98,7 +98,7 @@ void rtw_phydm_iqk_trigger_dbg(_adapter *adapter, bool recovery, bool clear, boo { struct dm_struct *p_dm_odm = adapter_to_phydm(adapter); -#if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1)) +#if ((RTL8814B_SUPPORT == 1)) halrf_segment_iqk_trigger(p_dm_odm, clear, segment); #else halrf_iqk_trigger(p_dm_odm, recovery); @@ -187,20 +187,6 @@ void rtw_phydm_fill_desc_dpt(void *dm, u8 *desc, u8 dpt_lv) switch (rtw_get_chip_type(adapter)) { /* - #ifdef CONFIG_RTL8188F - case RTL8188F: - break; - #endif - - #ifdef CONFIG_RTL8723B - case RTL8723B : - break; - #endif - - #ifdef CONFIG_RTL8703B - case RTL8703B : - break; - #endif #ifdef CONFIG_RTL8812A case RTL8812 : @@ -217,24 +203,7 @@ void rtw_phydm_fill_desc_dpt(void *dm, u8 *desc, u8 dpt_lv) break; #endif - #ifdef CONFIG_RTL8192F - case RTL8192F : - break; - #endif */ -/* - #ifdef CONFIG_RTL8192E - case RTL8192E : - SET_TX_DESC_TX_POWER_0_PSET_92E(desc, dpt_lv); - break; - #endif -*/ - - #ifdef CONFIG_RTL8821C - case RTL8821C : - SET_TX_DESC_TXPWR_OFSET_8821C(desc, dpt_lv); - break; - #endif default : RTW_ERR("%s IC not support dynamic tx power\n", __func__); @@ -591,11 +560,6 @@ void rtw_hal_turbo_edca(_adapter *adapter) return; } - if (ic_type == RTL8188E) { - if ((iot_peer == HT_IOT_PEER_RALINK) || (iot_peer == HT_IOT_PEER_ATHEROS)) - is_bias_on_rx = _TRUE; - } - /* Check if the status needs to be changed. */ if ((bbtchange) || (!precvpriv->is_any_non_be_pkts)) { cur_tx_bytes = dvobj->traffic_stat.cur_tx_bytes; @@ -648,7 +612,7 @@ void rtw_hal_turbo_edca(_adapter *adapter) EDCA_BE_DL = edca_setting_DL[iot_peer]; } - if ((ic_type == RTL8812) || (ic_type == RTL8821) || (ic_type == RTL8192E) || (ic_type == RTL8192F)) { /* add 8812AU/8812AE */ + if ((ic_type == RTL8812) || (ic_type == RTL8821)) { /* add 8812AU/8812AE */ EDCA_BE_UL = 0x5ea42b; EDCA_BE_DL = 0x5ea42b; @@ -656,16 +620,11 @@ void rtw_hal_turbo_edca(_adapter *adapter) } if (interface_type == RTW_PCIE && - ((ic_type == RTL8822B) - || (ic_type == RTL8814A))) { + (ic_type == RTL8814A)) { EDCA_BE_UL = 0x6ea42b; EDCA_BE_DL = 0x6ea42b; } - if ((ic_type == RTL8822B) - && (interface_type == RTW_SDIO)) - EDCA_BE_DL = 0x00431c; - #ifdef CONFIG_RTW_TPT_MODE if ( dvobj->tpt_mode > 0 ) { EDCA_BE_UL = dvobj->edca_be_ul; @@ -1414,7 +1373,7 @@ static u8 _rtw_phydm_rfk_condition_check(_adapter *adapter, u8 is_scaning, u8 if return rfk_allowed; } -#if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1)) +#if (RTL8814B_SUPPORT == 1) static u8 _rtw_phydm_iqk_segment_chk(_adapter *adapter, u8 ifs_linked) { u8 iqk_sgt = _FALSE; @@ -1543,7 +1502,7 @@ void rtw_phydm_watchdog(_adapter *adapter, bool in_lps) u8 bsta_state = _FALSE; u8 bBtDisabled = _TRUE; u8 rfk_forbidden = _FALSE; - #if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1)) + #if (RTL8814B_SUPPORT == 1) u8 segment_iqk = _FALSE; #endif u8 tx_unlinked_low_rate = 0xFF; @@ -1576,7 +1535,7 @@ void rtw_phydm_watchdog(_adapter *adapter, bool in_lps) rfk_forbidden = (_rtw_phydm_rfk_condition_check(adapter, pHalData->bScanInProcess, bLinked) == _TRUE) ? _FALSE : _TRUE; halrf_cmn_info_set(&pHalData->odmpriv, HALRF_CMNINFO_RFK_FORBIDDEN, rfk_forbidden); - #if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1)) + #if ((RTL8814B_SUPPORT == 1)) segment_iqk = _rtw_phydm_iqk_segment_chk(adapter, bLinked); halrf_cmn_info_set(&pHalData->odmpriv, HALRF_CMNINFO_IQK_SEGMENT, segment_iqk); #endif diff --git a/include/hal_intf.h b/include/hal_intf.h index f77fa44..71cbe4f 100644 --- a/include/hal_intf.h +++ b/include/hal_intf.h @@ -15,7 +15,6 @@ #ifndef __HAL_INTF_H__ #define __HAL_INTF_H__ - enum RTL871X_HCI_TYPE { RTW_PCIE = BIT0, RTW_USB = BIT1, @@ -26,20 +25,20 @@ enum RTL871X_HCI_TYPE { enum _CHIP_TYPE { NULL_CHIP_TYPE, - RTL8188E, - RTL8192E, + //RTL8188E, + //RTL8192E, RTL8812, RTL8821, /* RTL8811 */ - RTL8723B, + //RTL8723B, RTL8814A, - RTL8703B, - RTL8188F, - RTL8188GTV, - RTL8822B, - RTL8723D, - RTL8821C, - RTL8710B, - RTL8192F, + //RTL8703B, + //RTL8188F, + //RTL8188GTV, + //RTL8822B, + //RTL8723D, + //RTL8821C, + //RTL8710B, + //RTL8192F, MAX_CHIP_TYPE }; @@ -60,7 +59,6 @@ typedef enum _HAL_HW_TIMER_TYPE { HAL_TIMER_EARLYMODE = 2, } HAL_HW_TIMER_TYPE, *PHAL_HW_TIMER_TYPE; - typedef enum _HW_VARIABLES { HW_VAR_MEDIA_STATUS, HW_VAR_SET_OPMODE,