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https://github.com/chinawrj/rtl8812au
synced 2024-11-09 23:57:10 +00:00
Removed useless testchip code
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parent
d20d0744b5
commit
17ffe0d84f
@ -31,28 +31,9 @@
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#include "phydm_precomp.h"
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#include "phydm_precomp.h"
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#define READ_AND_CONFIG_MP(ic, txt) (odm_read_and_config_mp_##ic##txt(dm))
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#define READ_AND_CONFIG_MP(ic, txt) (odm_read_and_config_mp_##ic##txt(dm))
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#define READ_AND_CONFIG_TC(ic, txt) (odm_read_and_config_tc_##ic##txt(dm))
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#if (PHYDM_TESTCHIP_SUPPORT == 1)
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#define READ_AND_CONFIG(ic, txt) \
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do { \
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if (dm->is_mp_chip) \
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READ_AND_CONFIG_MP(ic, txt); \
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else \
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READ_AND_CONFIG_TC(ic, txt); \
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} while (0)
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#else
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#define READ_AND_CONFIG READ_AND_CONFIG_MP
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#define READ_AND_CONFIG READ_AND_CONFIG_MP
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#endif
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#define GET_VERSION_MP(ic, txt) (odm_get_version_mp_##ic##txt())
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#define GET_VERSION_MP(ic, txt) (odm_get_version_mp_##ic##txt())
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#define GET_VERSION_TC(ic, txt) (odm_get_version_tc_##ic##txt())
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#if (PHYDM_TESTCHIP_SUPPORT == 1)
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#define GET_VERSION(ic, txt) (dm->is_mp_chip ? GET_VERSION_MP(ic, txt) : GET_VERSION_TC(ic, txt))
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#else
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#define GET_VERSION(ic, txt) GET_VERSION_MP(ic, txt)
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#define GET_VERSION(ic, txt) GET_VERSION_MP(ic, txt)
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#endif
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enum hal_status
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enum hal_status
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odm_config_rf_with_header_file(struct dm_struct *dm,
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odm_config_rf_with_header_file(struct dm_struct *dm,
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@ -139,7 +139,6 @@ enum rt_spinlock_type {
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#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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#define sta_info _RT_WLAN_STA
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#define sta_info _RT_WLAN_STA
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#define __func__ __FUNCTION__
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#define __func__ __FUNCTION__
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#define PHYDM_TESTCHIP_SUPPORT TESTCHIP_SUPPORT
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#define MASKH3BYTES 0xffffff00
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#define MASKH3BYTES 0xffffff00
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#define SUCCESS 0
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#define SUCCESS 0
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#define FAIL (-1)
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#define FAIL (-1)
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@ -170,12 +169,6 @@ enum rt_spinlock_type {
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#endif
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#endif
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#endif
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#endif
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#if (defined(TESTCHIP_SUPPORT))
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#define PHYDM_TESTCHIP_SUPPORT 1
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#else
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#define PHYDM_TESTCHIP_SUPPORT 0
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#endif
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#define sta_info stat_info
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#define sta_info stat_info
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#define boolean bool
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#define boolean bool
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@ -200,8 +193,6 @@ enum rt_spinlock_type {
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#define FOR_BRAZIL_PRETEST 0
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#define FOR_BRAZIL_PRETEST 0
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#define FPGA_TWO_MAC_VERIFICATION 0
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#define FPGA_TWO_MAC_VERIFICATION 0
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#define RTL8881A_SUPPORT 0
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#define RTL8881A_SUPPORT 0
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#define PHYDM_TESTCHIP_SUPPORT 0
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#define RATE_ADAPTIVE_SUPPORT 0
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#define RATE_ADAPTIVE_SUPPORT 0
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#define POWER_TRAINING_ACTIVE 0
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#define POWER_TRAINING_ACTIVE 0
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@ -243,12 +234,6 @@ enum rt_spinlock_type {
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#define FPGA_TWO_MAC_VERIFICATION 0
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#define FPGA_TWO_MAC_VERIFICATION 0
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#define RTL8881A_SUPPORT 0
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#define RTL8881A_SUPPORT 0
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#if (defined(TESTCHIP_SUPPORT))
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#define PHYDM_TESTCHIP_SUPPORT 1
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#else
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#define PHYDM_TESTCHIP_SUPPORT 0
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#endif
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#define phydm_timer_list rtw_timer_list
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#define phydm_timer_list rtw_timer_list
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#elif (DM_ODM_SUPPORT_TYPE == ODM_IOT)
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#elif (DM_ODM_SUPPORT_TYPE == ODM_IOT)
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