diff --git a/hal/phydm/phydm_hwconfig.c b/hal/phydm/phydm_hwconfig.c
index d41fd11..5bb1ba4 100644
--- a/hal/phydm/phydm_hwconfig.c
+++ b/hal/phydm/phydm_hwconfig.c
@@ -31,28 +31,9 @@
 #include "phydm_precomp.h"
 
 #define READ_AND_CONFIG_MP(ic, txt) (odm_read_and_config_mp_##ic##txt(dm))
-#define READ_AND_CONFIG_TC(ic, txt) (odm_read_and_config_tc_##ic##txt(dm))
-
-#if (PHYDM_TESTCHIP_SUPPORT == 1)
-#define READ_AND_CONFIG(ic, txt)                     \
-	do {                                         \
-		if (dm->is_mp_chip)                  \
-			READ_AND_CONFIG_MP(ic, txt); \
-		else                                 \
-			READ_AND_CONFIG_TC(ic, txt); \
-	} while (0)
-#else
 #define READ_AND_CONFIG READ_AND_CONFIG_MP
-#endif
-
 #define GET_VERSION_MP(ic, txt) (odm_get_version_mp_##ic##txt())
-#define GET_VERSION_TC(ic, txt) (odm_get_version_tc_##ic##txt())
-
-#if (PHYDM_TESTCHIP_SUPPORT == 1)
-#define GET_VERSION(ic, txt) (dm->is_mp_chip ? GET_VERSION_MP(ic, txt) : GET_VERSION_TC(ic, txt))
-#else
 #define GET_VERSION(ic, txt) GET_VERSION_MP(ic, txt)
-#endif
 
 enum hal_status
 odm_config_rf_with_header_file(struct dm_struct *dm,
diff --git a/hal/phydm/phydm_types.h b/hal/phydm/phydm_types.h
index b079307..3bb4f04 100644
--- a/hal/phydm/phydm_types.h
+++ b/hal/phydm/phydm_types.h
@@ -139,7 +139,6 @@ enum rt_spinlock_type {
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 	#define sta_info 	_RT_WLAN_STA
 	#define	__func__		__FUNCTION__
-	#define	PHYDM_TESTCHIP_SUPPORT	TESTCHIP_SUPPORT
 	#define MASKH3BYTES			0xffffff00
 	#define SUCCESS	0
 	#define FAIL	(-1)
@@ -170,12 +169,6 @@ enum rt_spinlock_type {
 	#endif
 	#endif
 
-	#if (defined(TESTCHIP_SUPPORT))
-		#define	PHYDM_TESTCHIP_SUPPORT 1
-	#else
-		#define	PHYDM_TESTCHIP_SUPPORT 0
-	#endif
-
 	#define	sta_info stat_info
 	#define	boolean	bool
 
@@ -200,8 +193,6 @@ enum rt_spinlock_type {
 	#define	FOR_BRAZIL_PRETEST 0
 	#define	FPGA_TWO_MAC_VERIFICATION	0
 	#define	RTL8881A_SUPPORT	0
-	#define	PHYDM_TESTCHIP_SUPPORT 0
-
 
 	#define RATE_ADAPTIVE_SUPPORT			0
 	#define POWER_TRAINING_ACTIVE			0
@@ -243,12 +234,6 @@ enum rt_spinlock_type {
 	#define	FPGA_TWO_MAC_VERIFICATION	0
 	#define	RTL8881A_SUPPORT	0
 
-	#if (defined(TESTCHIP_SUPPORT))
-		#define	PHYDM_TESTCHIP_SUPPORT 1
-	#else
-		#define	PHYDM_TESTCHIP_SUPPORT 0
-	#endif
-
 	#define	phydm_timer_list	rtw_timer_list
 
 #elif (DM_ODM_SUPPORT_TYPE == ODM_IOT)