Commit Graph
55 Commits
Author SHA1 Message Date
gdkchan f876bd2a80 Change SvcGetInfo 5 to return actual heap size, remove AMemoryAlloc since it is no longer needed with direct memory access, move some memory management logic out of AMemoryMgr, change default virtual filesystem path to AppData 2018-02-27 20:45:07 -03:00
gdkchan 708761963e Fix corner cases of ADCS and SBFM 2018-02-26 15:56:34 -03:00
gdkchan f6dc86c6a0 Implement SvcSetMemoryAttribute 2018-02-25 22:53:01 -03:00
gdkchan 13214ffa43 Fix regression introduced on last commit with wrong ImageEnd 2018-02-25 22:44:30 -03:00
gdkchan 950011c90f Added initial support for function names from symbol table on the cpu with tracing, fix wrong ImageEnd on executables with MOD0, fix issue on the CPU on input elimination for instruction with more than one register store 2018-02-25 22:14:58 -03:00
gdkchan fba0bf8732 Refactor IPC services to have commands into separate classes, fix readme url 2018-02-25 01:34:27 -03:00
gdkchan 31b35a9645 Add FABD (scalar), ADCS, SBCS instructions, update config with better default control mappings, update readme with the new mappings 2018-02-24 18:47:08 -03:00
gdkchanandGitHub c02a2b510f Fix build link 2018-02-24 13:30:37 -03:00
gdkchan 035efc913e Fix cpu issue with cmp optimization, add HINT and FRINTX (scalar) instructions, fix for NvFlinger sometimes missing free buffers 2018-02-24 11:19:28 -03:00
gdkchan 3936c93448 Map heap on heap base region, fix for thread start on homebrew, add FCVTMU and FCVTPU (general) instructions, fix FMOV (higher 64 bits) encodings, improve emit code for FCVT* (general) instructions 2018-02-23 21:59:38 -03:00
gdkchan 2ed733b1d5 Somewhat better NvFlinger (I guess) (fixes #30) 2018-02-23 18:48:27 -03:00
gdkchan 0ff5ec5cb5 Merge branch 'master' of https://github.com/gdkchan/Ryujinx 2018-02-22 16:26:54 -03:00
gdkchan 2cba1d49f6 Add FRINTP instruction, fix opcode ctor call method creation with multithreading 2018-02-22 16:26:11 -03:00
gdkchan b2f733da78 FspSrv improvements, also fix ImageEnd for NROs without a MOD0 section 2018-02-21 18:56:52 -03:00
gdkchan 3696255457 Add ChocolArm64 reference to Ryujinx.Tests 2018-02-20 17:19:00 -03:00
gdkchan cb665bb715 Add FDIV (vector) instruction 2018-02-20 16:04:22 -03:00
gdkchan b4a1cfde10 Add SMULL (vector), USHR (scalar), FCCMPE, FNMSUB, fixed a some instructions 2018-02-20 14:39:03 -03:00
gdkchan 770cb4b655 Somewhat better scheduler I guess 2018-02-19 16:37:13 -03:00
gdkchan f35d286c8d Rename ARegisters to AThreadState 2018-02-18 16:28:07 -03:00
gdkchan 5a0396efaf Minor cpu fixes 2018-02-18 16:01:21 -03:00
gdkchan 3872ae034d Add MLS (vector) instruction, fix mistake introduced on last commit 2018-02-18 02:13:42 -03:00
gdkchan c3b5b4ffeb Merge branch 'master' of https://github.com/gdkchan/Ryujinx 2018-02-18 01:57:56 -03:00
gdkchan 1c44d9f66d Fix for some SIMD issues 2018-02-18 01:57:33 -03:00
gdkchan 595e7ee588 Add FCVTAS and FCVTAU instructions 2018-02-17 18:59:37 -03:00
gdkchan ebddc40550 Add events to shared memory, make it work better with direct memory 2018-02-17 18:36:08 -03:00
gdkchan 161193e113 CPU refactoring - move SIMD (scalar and vector) instructions to separate files by category, remove AILConv and use only the methods inside SIMD helper to extract/insert vector elements 2018-02-17 18:06:11 -03:00
gdkchan be1d01bf7d Shouldn't have undone this 2018-02-15 01:35:44 -03:00
gdkchan 7c314eadcf Emit CIL directly for more SIMD instructions, add UCVTF (vector, scalar) and UZP2, fix XTN (?) 2018-02-15 01:32:25 -03:00
gdkchan 7ed1153062 Add SHRN instruction, and fix ADDV 2018-02-14 02:43:21 -03:00
gdkchan f68696dc4a Made initial implementation of the thread scheduler, refactor Svc to avoid passing many arguments 2018-02-13 23:43:08 -03:00
gdkchan 598d1fd3ae Remove Console.Title += since it throws PNSE on linux 2018-02-12 00:43:36 -03:00
gdkchan 7d11a146c0 Generate CIL for SCVTF (vector), add undefined encodings for some instructions 2018-02-12 00:37:20 -03:00
gdkchanandGitHub 9e8d99f30d Update README.md 2018-02-10 17:51:07 -02:00
gdkchan 55743c0cba Only throw undefined instruction exception at execution, not at translation stage 2018-02-10 14:20:46 -03:00
gdkchan 9f612682e0 Add BRK on the opcode table 2018-02-10 12:16:48 -03:00
gdkchan 9063766ed6 Add BRK instruction, fix wrong namespace on one of Am interfaces, and disable Debug/Trace logs by default 2018-02-10 10:24:16 -03:00
gdkchan 276f9f6d48 Completely remove static methods inside Ipc interfaces, also remove GetObject method from ServiceCtx as it is no longer needed with this change 2018-02-09 23:31:26 -03:00
gdkchan 3d0b4d345f Fix bad rename 2018-02-09 21:23:16 -03:00
gdkchanandGitHub 322f28668d Ipc refactor (#9)
* Start refactoring IPC objects (started with IFile and IFileSystem)

* End refactoring IPC objects (#8)

* End refactoring IPC objects

* End refactoring IPC objects

corrections
2018-02-09 21:14:55 -03:00
gdkchan 7f4a190665 Fixes to memory management 2018-02-09 21:13:18 -03:00
gdkchan ccc9ce1908 Move a few more SIMD instructions to emit CIL directly instead of a method call 2018-02-09 17:14:47 -03:00
gdkchan 6a3aa6cd88 Add FVCTZS (fixed point variant) and LD1 (single structure variant) instructions 2018-02-09 00:26:20 -03:00
gdkchanandGitHub ae91da5b60 Merge pull request #2 from gdkchan/direct_memory
Removed parts of the MMU functionality to use memory directly (faster…
2018-02-08 20:20:01 -03:00
gdkchanandGitHub 7be38562b1 Merge pull request #1 from AcK77/master
Basic audio support
2018-02-08 14:24:23 -03:00
gdkchan 64d34f2882 Fix a copy-paste bug on Ins_V 2018-02-07 21:53:23 -03:00
gdkchan d0954564cd Add ADC and SBC instructions 2018-02-07 20:46:36 -03:00
gdkchan 79f028e410 Add FMADD and FMSUB instructions 2018-02-07 20:07:16 -03:00
gdkchan 768b573772 Add FMOV (scalar, register) and FCMPE instructions 2018-02-07 19:43:52 -03:00
gdkchan 18ac1c4045 Removed parts of the MMU functionality to use memory directly (faster, but potentially more dangerous, WIP), also changed the Shl/Sshr immediate instructions to use IL instead of calling the method 2018-02-07 13:44:48 -03:00
gdkchan d77d691381 Implement SSHL instruction, fix exception on FMAX/FMIN, and use a better exception message for undefined/unimplemented instructions 2018-02-07 09:38:43 -03:00
gdkchan b99e808791 Support loading NSO/NRO without a MOD0 header, stub some functions, support more ids on SvcGetInfo 2018-02-06 20:28:32 -03:00
gdkchan 2347c44bbf Improve access to system registers by using properties, also use exclusive region granularity on exclusive load/stores, and ensure that acquires without releases won't hold the address forever, remove unused ALU rev method 2018-02-06 12:15:08 -03:00
gdkchanandGitHub 6ae5587b5e Update README.md 2018-02-04 22:39:03 -02:00
gdkchanandGitHub d7ee5809bc Create README.md 2018-02-04 21:11:01 -02:00
gdkchan b7e1d9930d aloha 2018-02-04 20:08:20 -03:00