LDj3SNuD 51ea6fa583 Add Smaxv_V, Sminv_V, Umaxv_V, Uminv_V Inst.; add Tests. (#691) ...

* Update InstEmitSimdHelper.cs

* Update InstEmitSimdArithmetic.cs

* Update OpCodeTable.cs

* Update CpuTestSimd.cs

2019-05-29 21:29:24 -03:00

..

Decoders

Refactoring and optimization on CPU translation (#661)

2019-04-26 14:55:12 +10:00

Events

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Instructions

Add Smaxv_V, Sminv_V, Umaxv_V, Uminv_V Inst.; add Tests. (#691)

2019-05-29 21:29:24 -03:00

IntermediateRepresentation

Refactoring and optimization on CPU translation (#661)

2019-04-26 14:55:12 +10:00

Memory

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State

Refactoring and optimization on CPU translation (#661)

2019-04-26 14:55:12 +10:00

Translation

Refactoring and optimization on CPU translation (#661)

2019-04-26 14:55:12 +10:00

ChocolArm64.csproj

Built in profiling (#567)

2019-04-26 14:53:10 +10:00

CpuThread.cs

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OpCodeTable.cs

Add Smaxv_V, Sminv_V, Umaxv_V, Uminv_V Inst.; add Tests. (#691)

2019-05-29 21:29:24 -03:00

Optimizations.cs

Misc. CPU optimizations (#575)

2019-02-28 13:03:31 +11:00