mirrors/ryujinx
1
0
Fork 0
mirror of https://github.com/ryujinx-mirror/ryujinx.git synced 2025-01-10 16:18:12 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity
d87c5375f1
ryujinx/Ryujinx.Tests/Cpu
History
LDj3SNuD d87c5375f1 Implement a custom value generator for the Tests of the CLS and CLZ instructions (Base: 32, 64 bits. Simd: 8, 16, 32 bits). (#696) 
* Update CpuTestAlu.cs

* Update CpuTestSimd.cs

* Update CpuTestMov.cs
2019-06-12 09:03:31 -03:00
..
CpuTest.cs Add Tbl_V Sse opt. with Tests. (#651) 2019-03-23 15:50:19 -03:00
CpuTestAlu.cs Implement a custom value generator for the Tests of the CLS and CLZ instructions (Base: 32, 64 bits. Simd: 8, 16, 32 bits). (#696) 2019-06-12 09:03:31 -03:00
CpuTestAluImm.cs
CpuTestAluRs.cs
CpuTestAluRx.cs
CpuTestBfm.cs
CpuTestCcmpImm.cs
CpuTestCcmpReg.cs
CpuTestCsel.cs
CpuTestMisc.cs Add Tests for instructions Fcvtzs_Gp_Fixed & Fcvtzu_Gp_Fixed, Scvtf_Gp_Fixed & Ucvtf_Gp_Fixed. (#603) 2019-02-23 20:53:27 -03:00
CpuTestMov.cs Implement a custom value generator for the Tests of the CLS and CLZ instructions (Base: 32, 64 bits. Simd: 8, 16, 32 bits). (#696) 2019-06-12 09:03:31 -03:00
CpuTestMul.cs
CpuTestSimd.cs Implement a custom value generator for the Tests of the CLS and CLZ instructions (Base: 32, 64 bits. Simd: 8, 16, 32 bits). (#696) 2019-06-12 09:03:31 -03:00
CpuTestSimdCrypto.cs
CpuTestSimdCvt.cs Sse optimized the 32-bit Vector & Scalar integer-to-fp conversion instructions (signed & unsigned); added the related Gp & V_Fixed Tests (signed & unsigned). (#662) 2019-04-20 23:07:35 -03:00
CpuTestSimdExt.cs Add Rshrn_V & Shrn_V Sse opt.. Add Mla_V, Mls_V & Mul_V Sse opt.; add Tests. (#614) 2019-03-13 19:23:52 +11:00
CpuTestSimdFcond.cs
CpuTestSimdImm.cs Create CpuTestSimdImm.cs (#608) 2019-03-01 20:12:09 +11:00
CpuTestSimdIns.cs Add Rshrn_V & Shrn_V Sse opt.. Add Mla_V, Mls_V & Mul_V Sse opt.; add Tests. (#614) 2019-03-13 19:23:52 +11:00
CpuTestSimdReg.cs Add Rshrn_V & Shrn_V Sse opt.. Add Mla_V, Mls_V & Mul_V Sse opt.; add Tests. (#614) 2019-03-13 19:23:52 +11:00
CpuTestSimdRegElem.cs
CpuTestSimdRegElemF.cs
CpuTestSimdShImm.cs Sse optimized the 32-bit Vector & Scalar integer-to-fp conversion instructions (signed & unsigned); added the related Gp & V_Fixed Tests (signed & unsigned). (#662) 2019-04-20 23:07:35 -03:00
CpuTestSimdTbl.cs Add Tbl_V Sse opt. with Tests. (#651) 2019-03-23 15:50:19 -03:00