ryujinx/Ryujinx.Tests/Cpu
2021-06-23 23:21:23 +02:00
..
CpuTest32.cs Add multi-level function table (#2228) 2021-05-29 18:06:28 -03:00
CpuTest.cs Add multi-level function table (#2228) 2021-05-29 18:06:28 -03:00
CpuTestAlu32.cs
CpuTestAlu.cs
CpuTestAluBinary32.cs
CpuTestAluBinary.cs
CpuTestAluImm.cs
CpuTestAluRs32.cs
CpuTestAluRs.cs
CpuTestAluRx.cs
CpuTestBf32.cs
CpuTestBfm.cs
CpuTestCcmpImm.cs
CpuTestCcmpReg.cs
CpuTestCsel.cs
CpuTestMisc32.cs
CpuTestMisc.cs
CpuTestMov.cs
CpuTestMul32.cs
CpuTestMul.cs
CpuTestSimd32.cs Implement VCNT instruction (#1963) 2021-02-22 16:26:13 +01:00
CpuTestSimd.cs CPU (A64): Add Fmaxnmp & Fminnmp Scalar Inst.s, Fast & Slow Paths; with Tests. (#1894) 2021-01-20 09:12:33 +11:00
CpuTestSimdCrypto32.cs
CpuTestSimdCrypto.cs
CpuTestSimdCvt32.cs Fix Vnmls_S fast path (F64: losing input d value). Fix Vnmla_S & Vnmls_S slow paths (using fused inst.s). Fix Vfma_V slow path not using StandardFPSCRValue(). (#1775) 2020-12-17 20:43:41 +01:00
CpuTestSimdCvt.cs
CpuTestSimdExt.cs
CpuTestSimdFcond.cs
CpuTestSimdFmov.cs
CpuTestSimdImm.cs
CpuTestSimdIns.cs
CpuTestSimdLogical32.cs Implement VORN (register) Arm32 instruction (#2396) 2021-06-23 23:21:23 +02:00
CpuTestSimdMemory32.cs
CpuTestSimdMov32.cs
CpuTestSimdReg32.cs CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" variant & Sse fast path and slow path for both the "8/16B -> 8H" and "1/2D -> 1Q" variants; with Test. (#1817) 2021-01-04 23:45:54 +01:00
CpuTestSimdReg.cs CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" variant & Sse fast path and slow path for both the "8/16B -> 8H" and "1/2D -> 1Q" variants; with Test. (#1817) 2021-01-04 23:45:54 +01:00
CpuTestSimdRegElem32.cs
CpuTestSimdRegElem.cs Add Sqdmulh_Ve & Sqrdmulh_Ve Inst.s with Tests. (#2139) 2021-03-25 23:33:32 +01:00
CpuTestSimdRegElemF.cs
CpuTestSimdShImm32.cs
CpuTestSimdShImm.cs CPU (A64): Add Scvtf_S_Fixed & Ucvtf_S_Fixed with Tests. (#1492) 2020-08-31 20:48:21 -03:00
CpuTestSimdTbl.cs
CpuTestSystem.cs