merry f5235fff29 ARMeilleure: Hardware accelerate SHA256 (#3585) ... * ARMeilleure/HardwareCapabilities: Add Sha * ARMeilleure/Intrinsic: Add X86Sha256Rnds2 * ARmeilleure: Hardware accelerate SHA256H/SHA256H2 * ARMeilleure/Intrinsic: Add X86Sha256Msg1, X86Sha256Msg2 * ARMeilleure/Intrinsic: Add X86Palignr * ARMeilleure: Hardware accelerate SHA256SU0, SHA256SU1 * PTC: Bump InternalVersion		2022-08-25 10:12:13 +00:00
..
BasicBlock.cs
BasicBlockFrequency.cs
Comparison.cs
IIntrusiveListNode.cs
Instruction.cs	Add host CPU memory barriers for DMB/DSB and ordered load/store (#3015)	2022-01-21 12:47:34 -03:00
Intrinsic.cs	ARMeilleure: Hardware accelerate SHA256 (#3585)	2022-08-25 10:12:13 +00:00
IntrusiveList.cs
MemoryOperand.cs
Multiplier.cs
Operand.cs	Extend uses count from ushort to uint on Operand Data structure (#3374)	2022-06-05 14:15:27 -03:00
OperandKind.cs
OperandType.cs
Operation.cs	Optimize HybridAllocator (#2637)	2021-09-29 01:38:37 +02:00
PhiOperation.cs
Register.cs
RegisterType.cs