ryujinx/ARMeilleure/Instructions
Nicholas Rodine 951700fdd8
Removed unused usings. (#3593)
* Removed unused usings.

* Added back using, now that it's used.

* Removed extra whitespace.
2022-08-18 18:04:54 +02:00
..
CryptoHelper.cs Use ReadOnlySpan<byte> compiler optimization for static data (#3130) 2022-02-17 21:38:50 +01:00
InstEmitAlu32.cs T32: Implement ALU (shifted register) instructions (#3135) 2022-02-22 19:11:28 -03:00
InstEmitAlu.cs
InstEmitAluHelper.cs A32: Fix ALU immediate instructions (#3179) 2022-03-05 15:23:10 -03:00
InstEmitBfm.cs
InstEmitCcmp.cs
InstEmitCsel.cs
InstEmitDiv.cs
InstEmitException32.cs Removed unused usings. (#3593) 2022-08-18 18:04:54 +02:00
InstEmitException.cs Decoder: Exit on trapping instructions, and resume execution at trapping instruction (#3153) 2022-03-04 23:16:58 +01:00
InstEmitFlow32.cs T32: Implement B, B.cond, BL, BLX (#3155) 2022-03-04 23:05:08 +01:00
InstEmitFlow.cs
InstEmitFlowHelper.cs Fix return type mismatch on 32-bit titles (#3000) 2022-01-16 08:39:43 -03:00
InstEmitHash32.cs
InstEmitHash.cs
InstEmitHashHelper.cs
InstEmitHelper.cs T32: Implement B, B.cond, BL, BLX (#3155) 2022-03-04 23:05:08 +01:00
InstEmitMemory32.cs ARMeilleure: Thumb support (All T16 instructions) (#3105) 2022-02-17 19:39:45 -03:00
InstEmitMemory.cs Fix return type mismatch on 32-bit titles (#3000) 2022-01-16 08:39:43 -03:00
InstEmitMemoryEx32.cs InstEmitMemoryEx: Barrier after write on ordered store (#3193) 2022-03-19 10:32:35 -03:00
InstEmitMemoryEx.cs InstEmitMemoryEx: Barrier after write on ordered store (#3193) 2022-03-19 10:32:35 -03:00
InstEmitMemoryExHelper.cs
InstEmitMemoryHelper.cs ARMeilleure: Thumb support (All T16 instructions) (#3105) 2022-02-17 19:39:45 -03:00
InstEmitMove.cs
InstEmitMul32.cs ARMeilleure: Thumb support (All T16 instructions) (#3105) 2022-02-17 19:39:45 -03:00
InstEmitMul.cs
InstEmitSimdArithmetic32.cs Removed unused usings. (#3593) 2022-08-18 18:04:54 +02:00
InstEmitSimdArithmetic.cs Fix small precision error on CPU reciprocal estimate instructions (#3061) 2022-01-29 23:59:34 +01:00
InstEmitSimdCmp32.cs
InstEmitSimdCmp.cs
InstEmitSimdCrypto32.cs
InstEmitSimdCrypto.cs
InstEmitSimdCvt32.cs
InstEmitSimdCvt.cs Implement CPU FCVT Half <-> Double conversion variants (#3439) 2022-07-06 13:40:31 +02:00
InstEmitSimdHash32.cs Implement Arm32 Sha256 and MRS Rd, CPSR instructions (#3544) 2022-08-05 19:03:50 +02:00
InstEmitSimdHash.cs
InstEmitSimdHelper32.cs
InstEmitSimdHelper.cs
InstEmitSimdLogical32.cs
InstEmitSimdLogical.cs
InstEmitSimdMemory32.cs
InstEmitSimdMemory.cs
InstEmitSimdMove32.cs
InstEmitSimdMove.cs
InstEmitSimdShift32.cs
InstEmitSimdShift.cs
InstEmitSystem32.cs Implement Arm32 Sha256 and MRS Rd, CPSR instructions (#3544) 2022-08-05 19:03:50 +02:00
InstEmitSystem.cs Refactor CPU interface to allow the implementation of other CPU emulators (#3362) 2022-05-31 16:29:35 -03:00
InstName.cs ARMeilleure: Thumb support (All T16 instructions) (#3105) 2022-02-17 19:39:45 -03:00
NativeInterface.cs Removed unused usings. (#3593) 2022-08-18 18:04:54 +02:00
SoftFallback.cs Use ReadOnlySpan<byte> compiler optimization for static data (#3130) 2022-02-17 21:38:50 +01:00
SoftFloat.cs Implement CPU FCVT Half <-> Double conversion variants (#3439) 2022-07-06 13:40:31 +02:00