mirror of
https://github.com/ryujinx-mirror/ryujinx.git
synced 2024-12-22 22:36:25 +00:00
4d02a2d2c0
* Initial NVDEC and VIC implementation * Update FFmpeg.AutoGen to 4.3.0 * Add nvdec dependencies for Windows * Unify some VP9 structures * Rename VP9 structure fields * Improvements to Video API * XML docs for Common.Memory * Remove now unused or redundant overloads from MemoryAccessor * NVDEC UV surface read/write scalar paths * Add FIXME comments about hacky things/stuff that will need to be fixed in the future * Cleaned up VP9 memory allocation * Remove some debug logs * Rename some VP9 structs * Remove unused struct * No need to compile Ryujinx.Graphics.Host1x with unsafe anymore * Name AsyncWorkQueue threads to make debugging easier * Make Vp9PictureInfo a ref struct * LayoutConverter no longer needs the depth argument (broken by rebase) * Pooling of VP9 buffers, plus fix a memory leak on VP9 * Really wish VS could rename projects properly... * Address feedback * Remove using * Catch OperationCanceledException * Add licensing informations * Add THIRDPARTY.md to release too Co-authored-by: Thog <me@thog.eu>
169 lines
6.1 KiB
C#
169 lines
6.1 KiB
C#
using Ryujinx.Graphics.GAL;
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using Ryujinx.Graphics.Gpu.Image;
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using Ryujinx.Graphics.Gpu.Shader;
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using Ryujinx.Graphics.Gpu.State;
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using Ryujinx.Graphics.Shader;
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using System;
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namespace Ryujinx.Graphics.Gpu.Engine
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{
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partial class Methods
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{
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/// <summary>
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/// Dispatches compute work.
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/// </summary>
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/// <param name="state">Current GPU state</param>
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/// <param name="argument">Method call argument</param>
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public void Dispatch(GpuState state, int argument)
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{
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uint qmdAddress = (uint)state.Get<int>(MethodOffset.DispatchParamsAddress);
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var qmd = _context.MemoryAccessor.Read<ComputeQmd>((ulong)qmdAddress << 8);
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GpuVa shaderBaseAddress = state.Get<GpuVa>(MethodOffset.ShaderBaseAddress);
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ulong shaderGpuVa = shaderBaseAddress.Pack() + (uint)qmd.ProgramOffset;
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int localMemorySize = qmd.ShaderLocalMemoryLowSize + qmd.ShaderLocalMemoryHighSize;
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int sharedMemorySize = Math.Min(qmd.SharedMemorySize, _context.Capabilities.MaximumComputeSharedMemorySize);
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uint sbEnableMask = 0;
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uint ubEnableMask = 0;
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for (int index = 0; index < Constants.TotalCpUniformBuffers; index++)
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{
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if (!qmd.ConstantBufferValid(index))
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{
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continue;
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}
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ubEnableMask |= 1u << index;
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ulong gpuVa = (uint)qmd.ConstantBufferAddrLower(index) | (ulong)qmd.ConstantBufferAddrUpper(index) << 32;
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ulong size = (ulong)qmd.ConstantBufferSize(index);
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BufferManager.SetComputeUniformBuffer(index, gpuVa, size);
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}
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ShaderBundle cs = ShaderCache.GetComputeShader(
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state,
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shaderGpuVa,
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qmd.CtaThreadDimension0,
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qmd.CtaThreadDimension1,
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qmd.CtaThreadDimension2,
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localMemorySize,
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sharedMemorySize);
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_context.Renderer.Pipeline.SetProgram(cs.HostProgram);
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var samplerPool = state.Get<PoolState>(MethodOffset.SamplerPoolState);
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TextureManager.SetComputeSamplerPool(samplerPool.Address.Pack(), samplerPool.MaximumId, qmd.SamplerIndex);
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var texturePool = state.Get<PoolState>(MethodOffset.TexturePoolState);
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TextureManager.SetComputeTexturePool(texturePool.Address.Pack(), texturePool.MaximumId);
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TextureManager.SetComputeTextureBufferIndex(state.Get<int>(MethodOffset.TextureBufferIndex));
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ShaderProgramInfo info = cs.Shaders[0].Program.Info;
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for (int index = 0; index < info.CBuffers.Count; index++)
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{
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BufferDescriptor cb = info.CBuffers[index];
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// NVN uses the "hardware" constant buffer for anything that is less than 8,
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// and those are already bound above.
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// Anything greater than or equal to 8 uses the emulated constant buffers.
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// They are emulated using global memory loads.
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if (cb.Slot < 8)
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{
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continue;
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}
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ubEnableMask |= 1u << cb.Slot;
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ulong cbDescAddress = BufferManager.GetComputeUniformBufferAddress(0);
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int cbDescOffset = 0x260 + (cb.Slot - 8) * 0x10;
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cbDescAddress += (ulong)cbDescOffset;
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SbDescriptor cbDescriptor = _context.PhysicalMemory.Read<SbDescriptor>(cbDescAddress);
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BufferManager.SetComputeUniformBuffer(cb.Slot, cbDescriptor.PackAddress(), (uint)cbDescriptor.Size);
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}
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for (int index = 0; index < info.SBuffers.Count; index++)
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{
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BufferDescriptor sb = info.SBuffers[index];
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sbEnableMask |= 1u << sb.Slot;
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ulong sbDescAddress = BufferManager.GetComputeUniformBufferAddress(0);
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int sbDescOffset = 0x310 + sb.Slot * 0x10;
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sbDescAddress += (ulong)sbDescOffset;
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SbDescriptor sbDescriptor = _context.PhysicalMemory.Read<SbDescriptor>(sbDescAddress);
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BufferManager.SetComputeStorageBuffer(sb.Slot, sbDescriptor.PackAddress(), (uint)sbDescriptor.Size);
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}
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ubEnableMask = 0;
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for (int index = 0; index < info.CBuffers.Count; index++)
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{
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ubEnableMask |= 1u << info.CBuffers[index].Slot;
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}
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BufferManager.SetComputeStorageBufferEnableMask(sbEnableMask);
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BufferManager.SetComputeUniformBufferEnableMask(ubEnableMask);
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var textureBindings = new TextureBindingInfo[info.Textures.Count];
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for (int index = 0; index < info.Textures.Count; index++)
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{
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var descriptor = info.Textures[index];
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Target target = GetTarget(descriptor.Type);
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if (descriptor.IsBindless)
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{
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textureBindings[index] = new TextureBindingInfo(target, descriptor.CbufOffset, descriptor.CbufSlot, descriptor.Flags);
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}
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else
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{
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textureBindings[index] = new TextureBindingInfo(target, descriptor.HandleIndex, descriptor.Flags);
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}
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}
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TextureManager.SetComputeTextures(textureBindings);
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var imageBindings = new TextureBindingInfo[info.Images.Count];
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for (int index = 0; index < info.Images.Count; index++)
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{
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var descriptor = info.Images[index];
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Target target = GetTarget(descriptor.Type);
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imageBindings[index] = new TextureBindingInfo(target, descriptor.HandleIndex, descriptor.Flags);
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}
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TextureManager.SetComputeImages(imageBindings);
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BufferManager.CommitComputeBindings();
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TextureManager.CommitComputeBindings();
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_context.Renderer.Pipeline.DispatchCompute(
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qmd.CtaRasterWidth,
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qmd.CtaRasterHeight,
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qmd.CtaRasterDepth);
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_forceShaderUpdate = true;
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}
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}
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} |