ryujinx/ChocolArm64/Instruction
2018-07-12 15:51:02 -03:00
..
AInst.cs
AInstEmitAlu.cs Remove broken adds/cmn with condition check optimization (#218) 2018-07-03 21:54:05 -03:00
AInstEmitAluHelper.cs
AInstEmitBfm.cs
AInstEmitCcmp.cs
AInstEmitCsel.cs
AInstEmitException.cs
AInstEmitFlow.cs
AInstEmitHash.cs
AInstEmitMemory.cs
AInstEmitMemoryEx.cs
AInstEmitMemoryHelper.cs
AInstEmitMove.cs
AInstEmitMul.cs
AInstEmitSimdArithmetic.cs ChocolArm64: More accurate implementation of Frecpe & Frecps (#228) 2018-07-08 16:54:47 -03:00
AInstEmitSimdCmp.cs
AInstEmitSimdCvt.cs AInstEmitSimdCvt: Half-precision to single-precision conversion (#235) 2018-07-12 15:51:02 -03:00
AInstEmitSimdHelper.cs ChocolArm64: More accurate implementation of Frecpe & Frecps (#228) 2018-07-08 16:54:47 -03:00
AInstEmitSimdLogical.cs Add Rbit_V instruction. Add 8 tests (Rbit_V; Rev16_V, Rev32_V, Rev64_V). Improve CountSetBits8() algorithm. (#212) 2018-07-03 03:31:16 -03:00
AInstEmitSimdMemory.cs
AInstEmitSimdMove.cs Fix ZIP/UZP/TRN instructions when Rd == Rn || Rd == Rm (#239) 2018-07-09 22:48:28 -03:00
AInstEmitSimdShift.cs
AInstEmitSystem.cs
AInstEmitter.cs
AInstInterpreter.cs
ASoftFallback.cs Add Rbit_V instruction. Add 8 tests (Rbit_V; Rev16_V, Rev32_V, Rev64_V). Improve CountSetBits8() algorithm. (#212) 2018-07-03 03:31:16 -03:00
ASoftFloat.cs AInstEmitSimdCvt: Half-precision to single-precision conversion (#235) 2018-07-12 15:51:02 -03:00
AVectorHelper.cs Add Rbit_V instruction. Add 8 tests (Rbit_V; Rev16_V, Rev32_V, Rev64_V). Improve CountSetBits8() algorithm. (#212) 2018-07-03 03:31:16 -03:00