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https://github.com/aircrack-ng/rtl8812au.git
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d62c22e76e
filename: rtl8812AU_8821AU_linux_v4.3.22_15054.20150901_beta.tar.gz Signed-off-by: Hans Ulli Kroll <ulli.kroll@googlemail.com>
300 lines
10 KiB
C
Executable File
300 lines
10 KiB
C
Executable File
/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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//============================================================
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// include files
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//============================================================
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//#include "mp_precomp.h"
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#include "phydm_precomp.h"
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#include "phydm_noisemonitor.h"
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//=================================================
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// This function is for inband noise test utility only
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// To obtain the inband noise level(dbm), do the following.
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// 1. disable DIG and Power Saving
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// 2. Set initial gain = 0x1a
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// 3. Stop updating idle time pwer report (for driver read)
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// - 0x80c[25]
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//
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//=================================================
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#define Valid_Min -35
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#define Valid_Max 10
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#define ValidCnt 5
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#if (DM_ODM_SUPPORT_TYPE & (ODM_CE))
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s2Byte odm_InbandNoise_Monitor_NSeries(PDM_ODM_T pDM_Odm,u8 bPauseDIG,u8 IGIValue,u32 max_time)
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{
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u4Byte tmp4b;
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u1Byte max_rf_path=0,rf_path;
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u1Byte reg_c50, reg_c58,valid_done=0;
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struct noise_level noise_data;
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u32 start = 0, func_start=0, func_end = 0;
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func_start = ODM_GetCurrentTime(pDM_Odm);
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pDM_Odm->noise_level.noise_all = 0;
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if((pDM_Odm->RFType == ODM_1T2R) ||(pDM_Odm->RFType == ODM_2T2R))
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max_rf_path = 2;
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else
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max_rf_path = 1;
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("odm_DebugControlInbandNoise_Nseries() ==> \n"));
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ODM_Memory_Set(pDM_Odm,&noise_data,0,sizeof(struct noise_level));
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//
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// Step 1. Disable DIG && Set initial gain.
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//
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if(bPauseDIG)
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{
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odm_PauseDIG(pDM_Odm, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_1, IGIValue);
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}
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//
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// Step 2. Disable all power save for read registers
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//
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//dcmd_DebugControlPowerSave(pAdapter, PSDisable);
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//
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// Step 3. Get noise power level
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//
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start = ODM_GetCurrentTime(pDM_Odm);
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while(1)
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{
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//Stop updating idle time pwer report (for driver read)
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ODM_SetBBReg(pDM_Odm, rFPGA0_TxGainStage, BIT25, 1);
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//Read Noise Floor Report
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tmp4b = ODM_GetBBReg(pDM_Odm, 0x8f8,bMaskDWord );
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("Noise Floor Report (0x8f8) = 0x%08x\n", tmp4b));
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//ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0, TestInitialGain);
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//if(max_rf_path == 2)
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// ODM_SetBBReg(pDM_Odm, rOFDM0_XBAGCCore1, bMaskByte0, TestInitialGain);
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//update idle time pwer report per 5us
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ODM_SetBBReg(pDM_Odm, rFPGA0_TxGainStage, BIT25, 0);
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noise_data.value[ODM_RF_PATH_A] = (u1Byte)(tmp4b&0xff);
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noise_data.value[ODM_RF_PATH_B] = (u1Byte)((tmp4b&0xff00)>>8);
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("value_a = 0x%x(%d), value_b = 0x%x(%d)\n",
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noise_data.value[ODM_RF_PATH_A], noise_data.value[ODM_RF_PATH_A], noise_data.value[ODM_RF_PATH_B], noise_data.value[ODM_RF_PATH_B]));
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for(rf_path = ODM_RF_PATH_A; rf_path < max_rf_path; rf_path++)
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{
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noise_data.sval[rf_path] = (s1Byte)noise_data.value[rf_path];
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noise_data.sval[rf_path] /= 2;
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}
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("sval_a = %d, sval_b = %d\n",
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noise_data.sval[ODM_RF_PATH_A], noise_data.sval[ODM_RF_PATH_B]));
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//ODM_delay_ms(10);
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//ODM_sleep_ms(10);
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for(rf_path = ODM_RF_PATH_A; rf_path < max_rf_path; rf_path++)
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{
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if( (noise_data.valid_cnt[rf_path] < ValidCnt) && (noise_data.sval[rf_path] < Valid_Max && noise_data.sval[rf_path] >= Valid_Min))
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{
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noise_data.valid_cnt[rf_path]++;
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noise_data.sum[rf_path] += noise_data.sval[rf_path];
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("RF_Path:%d Valid sval = %d\n", rf_path,noise_data.sval[rf_path]));
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("Sum of sval = %d, \n", noise_data.sum[rf_path]));
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if(noise_data.valid_cnt[rf_path] == ValidCnt)
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{
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valid_done++;
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("After divided, RF_Path:%d ,sum = %d \n", rf_path,noise_data.sum[rf_path]));
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}
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}
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}
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//printk("####### valid_done:%d #############\n",valid_done);
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if ((valid_done==max_rf_path) || (ODM_GetProgressingTime(pDM_Odm,start) > max_time))
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{
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for(rf_path = ODM_RF_PATH_A; rf_path < max_rf_path; rf_path++)
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{
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//printk("%s PATH_%d - sum = %d, valid_cnt = %d \n",__FUNCTION__,rf_path,noise_data.sum[rf_path], noise_data.valid_cnt[rf_path]);
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if(noise_data.valid_cnt[rf_path])
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noise_data.sum[rf_path] /= noise_data.valid_cnt[rf_path];
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else
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noise_data.sum[rf_path] = 0;
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}
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break;
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}
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}
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reg_c50 = (s4Byte)ODM_GetBBReg(pDM_Odm,rOFDM0_XAAGCCore1,bMaskByte0);
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reg_c50 &= ~BIT7;
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("0x%x = 0x%02x(%d)\n", rOFDM0_XAAGCCore1, reg_c50, reg_c50));
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pDM_Odm->noise_level.noise[ODM_RF_PATH_A] = -110 + reg_c50 + noise_data.sum[ODM_RF_PATH_A];
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pDM_Odm->noise_level.noise_all += pDM_Odm->noise_level.noise[ODM_RF_PATH_A];
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if(max_rf_path == 2){
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reg_c58 = (s4Byte)ODM_GetBBReg(pDM_Odm,rOFDM0_XBAGCCore1,bMaskByte0);
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reg_c58 &= ~BIT7;
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("0x%x = 0x%02x(%d)\n", rOFDM0_XBAGCCore1, reg_c58, reg_c58));
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pDM_Odm->noise_level.noise[ODM_RF_PATH_B] = -110 + reg_c58 + noise_data.sum[ODM_RF_PATH_B];
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pDM_Odm->noise_level.noise_all += pDM_Odm->noise_level.noise[ODM_RF_PATH_B];
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}
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pDM_Odm->noise_level.noise_all /= max_rf_path;
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("noise_a = %d, noise_b = %d\n",
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pDM_Odm->noise_level.noise[ODM_RF_PATH_A],
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pDM_Odm->noise_level.noise[ODM_RF_PATH_B]));
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//
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// Step 4. Recover the Dig
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//
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if(bPauseDIG)
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{
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odm_PauseDIG(pDM_Odm, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_1, IGIValue);
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}
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func_end = ODM_GetProgressingTime(pDM_Odm,func_start) ;
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ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_DebugControlInbandNoise_Nseries() <==\n"));
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return pDM_Odm->noise_level.noise_all;
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}
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s2Byte
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odm_InbandNoise_Monitor_ACSeries(PDM_ODM_T pDM_Odm, u8 bPauseDIG, u8 IGIValue, u32 max_time
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)
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{
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s4Byte rxi_buf_anta, rxq_buf_anta; /*rxi_buf_antb, rxq_buf_antb;*/
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s4Byte value32, pwdb_A = 0, sval, noise, sum;
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BOOLEAN pd_flag;
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u1Byte i, valid_cnt;
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u32 start = 0, func_start = 0, func_end = 0;
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if (!(pDM_Odm->SupportICType & (ODM_RTL8812 | ODM_RTL8821)))
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return 0;
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func_start = ODM_GetCurrentTime(pDM_Odm);
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pDM_Odm->noise_level.noise_all = 0;
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ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_InbandNoise_Monitor_ACSeries() ==>\n"));
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/* Step 1. Disable DIG && Set initial gain. */
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if (bPauseDIG)
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odm_PauseDIG(pDM_Odm, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_1, IGIValue);
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/* Step 2. Disable all power save for read registers */
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/*dcmd_DebugControlPowerSave(pAdapter, PSDisable); */
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/* Step 3. Get noise power level */
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start = ODM_GetCurrentTime(pDM_Odm);
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/* reset counters */
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sum = 0;
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valid_cnt = 0;
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/* Step 3. Get noise power level */
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while (1) {
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/*Set IGI=0x1C */
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ODM_Write_DIG(pDM_Odm, 0x1C);
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/*stop CK320&CK88 */
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ODM_SetBBReg(pDM_Odm, 0x8B4, BIT6, 1);
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/*Read Path-A */
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ODM_SetBBReg(pDM_Odm, 0x8FC, bMaskDWord, 0x200); /*set debug port*/
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value32 = ODM_GetBBReg(pDM_Odm, 0xFA0, bMaskDWord); /*read debug port*/
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rxi_buf_anta = (value32 & 0xFFC00) >> 10; /*rxi_buf_anta=RegFA0[19:10]*/
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rxq_buf_anta = value32 & 0x3FF; /*rxq_buf_anta=RegFA0[19:10]*/
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pd_flag = (BOOLEAN) ((value32 & BIT31) >> 31);
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/*Not in packet detection period or Tx state */
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if ((!pd_flag) || (rxi_buf_anta != 0x200)) {
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/*sign conversion*/
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rxi_buf_anta = ODM_SignConversion(rxi_buf_anta, 10);
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rxq_buf_anta = ODM_SignConversion(rxq_buf_anta, 10);
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pwdb_A = ODM_PWdB_Conversion(rxi_buf_anta * rxi_buf_anta + rxq_buf_anta * rxq_buf_anta, 20, 18); /*S(10,9)*S(10,9)=S(20,18)*/
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ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pwdb_A= %d dB, rxi_buf_anta= 0x%x, rxq_buf_anta= 0x%x\n", pwdb_A, rxi_buf_anta & 0x3FF, rxq_buf_anta & 0x3FF));
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}
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/*BB Reset*/
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ODM_Write1Byte(pDM_Odm, 0x02, ODM_Read1Byte(pDM_Odm, 0x02) & (~BIT0));
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ODM_Write1Byte(pDM_Odm, 0x02, ODM_Read1Byte(pDM_Odm, 0x02) | BIT0);
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/*Start CK320&CK88*/
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ODM_SetBBReg(pDM_Odm, 0x8B4, BIT6, 0);
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sval = pwdb_A;
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if (sval < 0 && sval >= -27) {
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if (valid_cnt < ValidCnt) {
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valid_cnt++;
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sum += sval;
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ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("Valid sval = %d\n", sval));
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ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("Sum of sval = %d,\n", sum));
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if ((valid_cnt >= ValidCnt) || (ODM_GetProgressingTime(pDM_Odm, start) > max_time)) {
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sum /= valid_cnt;
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ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("After divided, sum = %d\n", sum));
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break;
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}
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}
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}
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}
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/*ADC backoff is 12dB,*/
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/*Ptarget=0x1C-110=-82dBm*/
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noise = sum + 12 + 0x1C - 110;
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/*Offset*/
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noise = noise - 3;
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ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("noise = %d\n", noise));
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pDM_Odm->noise_level.noise_all = (s2Byte)noise;
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/* Step 4. Recover the Dig*/
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if (bPauseDIG)
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odm_PauseDIG(pDM_Odm, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_1, IGIValue);
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func_end = ODM_GetProgressingTime(pDM_Odm, func_start);
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ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_InbandNoise_Monitor_ACSeries() <==\n"));
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return pDM_Odm->noise_level.noise_all;
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}
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s2Byte
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ODM_InbandNoise_Monitor(PVOID pDM_VOID, u8 bPauseDIG, u8 IGIValue, u32 max_time)
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{
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PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
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if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES)
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return odm_InbandNoise_Monitor_ACSeries(pDM_Odm, bPauseDIG, IGIValue, max_time);
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else
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return odm_InbandNoise_Monitor_NSeries(pDM_Odm, bPauseDIG, IGIValue, max_time);
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}
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#endif
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