mirror of
https://github.com/aircrack-ng/rtl8812au.git
synced 2024-11-06 03:20:32 +00:00
152 lines
2.9 KiB
C
152 lines
2.9 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2007 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* wlanfae <wlanfae@realtek.com>
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* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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* Hsinchu 300, Taiwan.
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*
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* Larry Finger <Larry.Finger@lwfinger.net>
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*
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*****************************************************************************/
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#ifndef __PHYDMDYMICRXPATH_H__
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#define __PHYDMDYMICRXPATH_H__
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#define DYNAMIC_RX_PATH_VERSION "1.0" /*2016.07.15 Dino */
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#define DRP_RSSI_TH 35
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#define INIT_DRP_TIMMER 0
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#define CANCEL_DRP_TIMMER 1
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#define RELEASE_DRP_TIMMER 2
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#if (RTL8822B_SUPPORT == 1)
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struct drp_rtl8822b_struct {
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enum bb_path path_judge;
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u16 path_a_cck_fa;
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u16 path_b_cck_fa;
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};
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#endif
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#ifdef CONFIG_DYNAMIC_RX_PATH
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enum drp_state {
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DRP_INIT_STATE = 0,
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DRP_TRAINING_STATE_0 = 1,
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DRP_TRAINING_STATE_1 = 2,
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DRP_TRAINING_STATE_2 = 3,
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DRP_DECISION_STATE = 4
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};
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enum adjustable_value {
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DRP_TRAINING_TIME = 0,
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DRP_TRAINING_PERIOD = 1,
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DRP_RSSI_THRESHOLD = 2,
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DRP_FA_THRESHOLD = 3,
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DRP_FA_DIFF_THRESHOLD = 4
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};
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struct _DYNAMIC_RX_PATH_ {
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u8 curr_rx_path;
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u8 drp_state;
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u16 training_time;
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u8 rssi_threshold;
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u32 fa_count_thresold;
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u32 fa_diff_threshold;
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u32 curr_cca_all_cnt_0;
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u32 curr_fa_all_cnt_0;
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u32 curr_cca_all_cnt_1;
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u32 curr_fa_all_cnt_1;
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u32 curr_cca_all_cnt_2;
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u32 curr_fa_all_cnt_2;
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u8 drp_skip_counter;
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u8 drp_period;
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u8 drp_init_finished;
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#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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#if USE_WORKITEM
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RT_WORK_ITEM phydm_dynamic_rx_path_workitem;
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#endif
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#endif
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struct phydm_timer_list phydm_dynamic_rx_path_timer;
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};
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void
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phydm_process_phy_status_for_dynamic_rx_path(
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void *dm_void,
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void *phy_info_void,
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void *pkt_info_void
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);
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void
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phydm_dynamic_rx_path(
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void *dm_void
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);
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#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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void
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phydm_dynamic_rx_path_callback(
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struct phydm_timer_list *timer
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);
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void
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phydm_dynamic_rx_path_workitem_callback(
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void *context
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);
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#else if (DM_ODM_SUPPORT_TYPE == ODM_CE)
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void
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phydm_dynamic_rx_path_callback(
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void *function_context
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);
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#endif
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void
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phydm_dynamic_rx_path_timers(
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void *dm_void,
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u8 state
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);
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void
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phydm_dynamic_rx_path_init(
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void *dm_void
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);
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void
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phydm_drp_debug(
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void *dm_void,
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u32 *const dm_value,
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u32 *_used,
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char *output,
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u32 *_out_len
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);
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void
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phydm_dynamic_rx_path_caller(
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void *dm_void
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);
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#endif
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#endif
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