mirror of
https://github.com/aircrack-ng/rtl8812au.git
synced 2024-11-30 00:47:38 +00:00
764 lines
24 KiB
C
764 lines
24 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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//============================================================
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// include files
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//============================================================
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#include "mp_precomp.h"
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#include "phydm_precomp.h"
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VOID
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ODM_EdcaTurboInit(
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IN PVOID pDM_VOID)
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{
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PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
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#if (DM_ODM_SUPPORT_TYPE==ODM_WIN)
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PADAPTER Adapter = NULL;
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HAL_DATA_TYPE *pHalData = NULL;
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if(pDM_Odm->Adapter==NULL) {
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("EdcaTurboInit fail!!!\n"));
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return;
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}
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Adapter=pDM_Odm->Adapter;
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pHalData=GET_HAL_DATA(Adapter);
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pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = FALSE;
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pDM_Odm->DM_EDCA_Table.bIsCurRDLState = FALSE;
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pHalData->bIsAnyNonBEPkts = FALSE;
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#elif(DM_ODM_SUPPORT_TYPE==ODM_CE)
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PADAPTER Adapter = pDM_Odm->Adapter;
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pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = FALSE;
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pDM_Odm->DM_EDCA_Table.bIsCurRDLState = FALSE;
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Adapter->recvpriv.bIsAnyNonBEPkts =FALSE;
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#endif
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial VO PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_VO_PARAM)));
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial VI PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_VI_PARAM)));
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial BE PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_BE_PARAM)));
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial BK PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_BK_PARAM)));
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} // ODM_InitEdcaTurbo
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VOID
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odm_EdcaTurboCheck(
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IN PVOID pDM_VOID
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)
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{
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//
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// For AP/ADSL use prtl8192cd_priv
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// For CE/NIC use PADAPTER
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//
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//
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// 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate
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// at the same time. In the stage2/3, we need to prive universal interface and merge all
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// HW dynamic mechanism.
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//
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PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("odm_EdcaTurboCheck========================>\n"));
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if(!(pDM_Odm->SupportAbility& ODM_MAC_EDCA_TURBO ))
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return;
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switch (pDM_Odm->SupportPlatform)
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{
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case ODM_WIN:
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#if(DM_ODM_SUPPORT_TYPE==ODM_WIN)
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odm_EdcaTurboCheckMP(pDM_Odm);
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#endif
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break;
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case ODM_CE:
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#if(DM_ODM_SUPPORT_TYPE==ODM_CE)
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odm_EdcaTurboCheckCE(pDM_Odm);
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#endif
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break;
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}
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("<========================odm_EdcaTurboCheck\n"));
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} // odm_CheckEdcaTurbo
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#if(DM_ODM_SUPPORT_TYPE==ODM_CE)
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VOID
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odm_EdcaTurboCheckCE(
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IN PVOID pDM_VOID
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)
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{
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PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
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PADAPTER Adapter = pDM_Odm->Adapter;
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u32 EDCA_BE_UL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_UL[pMgntInfo->IOTPeer];
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u32 EDCA_BE_DL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_DL[pMgntInfo->IOTPeer];
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u32 ICType=pDM_Odm->SupportICType;
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u32 IOTPeer=0;
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u8 WirelessMode=0xFF; //invalid value
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u32 trafficIndex;
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u32 edca_param;
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u64 cur_tx_bytes = 0;
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u64 cur_rx_bytes = 0;
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u8 bbtchange = _FALSE;
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u8 bBiasOnRx = _FALSE;
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
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struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(Adapter);
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struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv);
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struct recv_priv *precvpriv = &(Adapter->recvpriv);
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struct registry_priv *pregpriv = &Adapter->registrypriv;
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struct mlme_ext_priv *pmlmeext = &(Adapter->mlmeextpriv);
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struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
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if(pDM_Odm->bLinked != _TRUE)
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{
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precvpriv->bIsAnyNonBEPkts = _FALSE;
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return;
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}
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if ((pregpriv->wifi_spec == 1) )//|| (pmlmeinfo->HT_enable == 0))
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{
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precvpriv->bIsAnyNonBEPkts = _FALSE;
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return;
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}
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if(pDM_Odm->pWirelessMode!=NULL)
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WirelessMode=*(pDM_Odm->pWirelessMode);
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IOTPeer = pmlmeinfo->assoc_AP_vendor;
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if (IOTPeer >= HT_IOT_PEER_MAX)
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{
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precvpriv->bIsAnyNonBEPkts = _FALSE;
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return;
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}
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if (pDM_Odm->SupportICType & ODM_RTL8188E) {
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if((IOTPeer == HT_IOT_PEER_RALINK)||(IOTPeer == HT_IOT_PEER_ATHEROS))
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bBiasOnRx = _TRUE;
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}
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// Check if the status needs to be changed.
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if((bbtchange) || (!precvpriv->bIsAnyNonBEPkts) )
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{
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cur_tx_bytes = pdvobjpriv->traffic_stat.cur_tx_bytes;
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cur_rx_bytes = pdvobjpriv->traffic_stat.cur_rx_bytes;
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//traffic, TX or RX
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if(bBiasOnRx)
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{
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if (cur_tx_bytes > (cur_rx_bytes << 2))
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{ // Uplink TP is present.
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trafficIndex = UP_LINK;
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}
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else
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{ // Balance TP is present.
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trafficIndex = DOWN_LINK;
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}
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}
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else
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{
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if (cur_rx_bytes > (cur_tx_bytes << 2))
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{ // Downlink TP is present.
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trafficIndex = DOWN_LINK;
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}
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else
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{ // Balance TP is present.
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trafficIndex = UP_LINK;
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}
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}
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//if ((pDM_Odm->DM_EDCA_Table.prv_traffic_idx != trafficIndex) || (!pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA))
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{
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if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE) {
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EDCA_BE_UL = 0x6ea42b;
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EDCA_BE_DL = 0x6ea42b;
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}
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//92D txop can't be set to 0x3e for cisco1250
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if ((IOTPeer == HT_IOT_PEER_CISCO) && (WirelessMode == ODM_WM_N24G))
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{
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EDCA_BE_DL = edca_setting_DL[IOTPeer];
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EDCA_BE_UL = edca_setting_UL[IOTPeer];
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}
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//merge from 92s_92c_merge temp brunch v2445 20120215
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else if((IOTPeer == HT_IOT_PEER_CISCO) &&((WirelessMode==ODM_WM_G)||(WirelessMode==(ODM_WM_B|ODM_WM_G))||(WirelessMode==ODM_WM_A)||(WirelessMode==ODM_WM_B)))
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{
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EDCA_BE_DL = edca_setting_DL_GMode[IOTPeer];
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}
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else if((IOTPeer== HT_IOT_PEER_AIRGO )&& ((WirelessMode==ODM_WM_G)||(WirelessMode==ODM_WM_A)))
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{
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EDCA_BE_DL = 0xa630;
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}
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else if(IOTPeer == HT_IOT_PEER_MARVELL)
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{
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EDCA_BE_DL = edca_setting_DL[IOTPeer];
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EDCA_BE_UL = edca_setting_UL[IOTPeer];
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}
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else if(IOTPeer == HT_IOT_PEER_ATHEROS)
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{
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// Set DL EDCA for Atheros peer to 0x3ea42b. Suggested by SD3 Wilson for ASUS TP issue.
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EDCA_BE_DL = edca_setting_DL[IOTPeer];
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}
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if((ICType==ODM_RTL8812)||(ICType==ODM_RTL8821)||(ICType==ODM_RTL8192E)) //add 8812AU/8812AE
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{
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EDCA_BE_UL = 0x5ea42b;
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EDCA_BE_DL = 0x5ea42b;
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("8812A: EDCA_BE_UL=0x%x EDCA_BE_DL =0x%x",EDCA_BE_UL,EDCA_BE_DL));
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}
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if (trafficIndex == DOWN_LINK)
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edca_param = EDCA_BE_DL;
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else
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edca_param = EDCA_BE_UL;
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rtw_write32(Adapter, REG_EDCA_BE_PARAM, edca_param);
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pDM_Odm->DM_EDCA_Table.prv_traffic_idx = trafficIndex;
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}
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pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = _TRUE;
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}
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else
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{
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//
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// Turn Off EDCA turbo here.
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// Restore original EDCA according to the declaration of AP.
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//
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if(pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA)
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{
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rtw_write32(Adapter, REG_EDCA_BE_PARAM, pHalData->AcParam_BE);
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pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = _FALSE;
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}
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}
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}
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#elif(DM_ODM_SUPPORT_TYPE==ODM_WIN)
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VOID
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odm_EdcaTurboCheckMP(
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IN PVOID pDM_VOID
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)
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{
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PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
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PADAPTER Adapter = pDM_Odm->Adapter;
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
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PADAPTER pDefaultAdapter = GetDefaultAdapter(Adapter);
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PADAPTER pExtAdapter = GetFirstExtAdapter(Adapter);//NULL;
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PMGNT_INFO pMgntInfo = &Adapter->MgntInfo;
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PSTA_QOS pStaQos = Adapter->MgntInfo.pStaQos;
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//[Win7 Count Tx/Rx statistic for Extension Port] odm_CheckEdcaTurbo's Adapter is always Default. 2009.08.20, by Bohn
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u8Byte Ext_curTxOkCnt = 0;
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u8Byte Ext_curRxOkCnt = 0;
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//For future Win7 Enable Default Port to modify AMPDU size dynamically, 2009.08.20, Bohn.
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u1Byte TwoPortStatus = (u1Byte)TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE;
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// Keep past Tx/Rx packet count for RT-to-RT EDCA turbo.
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u8Byte curTxOkCnt = 0;
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u8Byte curRxOkCnt = 0;
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u4Byte EDCA_BE_UL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_UL[pMgntInfo->IOTPeer];
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u4Byte EDCA_BE_DL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_DL[pMgntInfo->IOTPeer];
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u4Byte EDCA_BE = 0x5ea42b;
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u1Byte IOTPeer=0;
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BOOLEAN *pbIsCurRDLState=NULL;
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BOOLEAN bLastIsCurRDLState=FALSE;
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BOOLEAN bBiasOnRx=FALSE;
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BOOLEAN bEdcaTurboOn=FALSE;
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u1Byte TxRate = 0xFF;
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u8Byte value64;
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("odm_EdcaTurboCheckMP========================>"));
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial BE PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_BE_PARAM)));
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////===============================
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////list paramter for different platform
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////===============================
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bLastIsCurRDLState=pDM_Odm->DM_EDCA_Table.bIsCurRDLState;
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pbIsCurRDLState=&(pDM_Odm->DM_EDCA_Table.bIsCurRDLState);
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//2012/09/14 MH Add
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if (pMgntInfo->NumNonBePkt > pMgntInfo->RegEdcaThresh && !(Adapter->MgntInfo.bWiFiConfg & RT_WIFI_LOGO))
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pHalData->bIsAnyNonBEPkts = TRUE;
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pMgntInfo->NumNonBePkt = 0;
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// Caculate TX/RX TP:
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curTxOkCnt = pDM_Odm->curTxOkCnt;
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curRxOkCnt = pDM_Odm->curRxOkCnt;
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if(pExtAdapter == NULL)
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pExtAdapter = pDefaultAdapter;
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Ext_curTxOkCnt = pExtAdapter->TxStats.NumTxBytesUnicast - pMgntInfo->Ext_lastTxOkCnt;
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Ext_curRxOkCnt = pExtAdapter->RxStats.NumRxBytesUnicast - pMgntInfo->Ext_lastRxOkCnt;
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GetTwoPortSharedResource(Adapter,TWO_PORT_SHARED_OBJECT__STATUS,NULL,&TwoPortStatus);
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//For future Win7 Enable Default Port to modify AMPDU size dynamically, 2009.08.20, Bohn.
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if(TwoPortStatus == TWO_PORT_STATUS__EXTENSION_ONLY)
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{
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curTxOkCnt = Ext_curTxOkCnt ;
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curRxOkCnt = Ext_curRxOkCnt ;
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}
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//
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IOTPeer=pMgntInfo->IOTPeer;
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bBiasOnRx=(pMgntInfo->IOTAction & HT_IOT_ACT_EDCA_BIAS_ON_RX)?TRUE:FALSE;
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bEdcaTurboOn=((!pHalData->bIsAnyNonBEPkts))?TRUE:FALSE;
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("bIsAnyNonBEPkts : 0x%lx \n",pHalData->bIsAnyNonBEPkts));
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////===============================
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////check if edca turbo is disabled
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////===============================
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if(odm_IsEdcaTurboDisable(pDM_Odm))
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{
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pHalData->bIsAnyNonBEPkts = FALSE;
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pMgntInfo->lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast;
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pMgntInfo->lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast;
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pMgntInfo->Ext_lastTxOkCnt = pExtAdapter->TxStats.NumTxBytesUnicast;
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pMgntInfo->Ext_lastRxOkCnt = pExtAdapter->RxStats.NumRxBytesUnicast;
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}
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////===============================
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////remove iot case out
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////===============================
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ODM_EdcaParaSelByIot(pDM_Odm, &EDCA_BE_UL, &EDCA_BE_DL);
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////===============================
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////Check if the status needs to be changed.
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////===============================
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if(bEdcaTurboOn)
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{
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("bEdcaTurboOn : 0x%x bBiasOnRx : 0x%x\n",bEdcaTurboOn,bBiasOnRx));
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("curTxOkCnt : 0x%lx \n",curTxOkCnt));
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("curRxOkCnt : 0x%lx \n",curRxOkCnt));
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if(bBiasOnRx)
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odm_EdcaChooseTrafficIdx(pDM_Odm,curTxOkCnt, curRxOkCnt, TRUE, pbIsCurRDLState);
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else
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odm_EdcaChooseTrafficIdx(pDM_Odm,curTxOkCnt, curRxOkCnt, FALSE, pbIsCurRDLState);
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//modify by Guo.Mingzhi 2011-12-29
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EDCA_BE=((*pbIsCurRDLState)==TRUE)?EDCA_BE_DL:EDCA_BE_UL;
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if(IS_HARDWARE_TYPE_8821U(Adapter))
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{
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if(pMgntInfo->RegTxDutyEnable)
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{
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//2013.01.23 LukeLee: debug for 8811AU thermal issue (reduce Tx duty cycle)
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if(!pMgntInfo->ForcedDataRate) //auto rate
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{
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if(pDM_Odm->TxRate != 0xFF)
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TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->TxRate);
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}
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else //force rate
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{
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TxRate = (u1Byte) pMgntInfo->ForcedDataRate;
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}
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value64 = (curRxOkCnt<<2);
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if(curTxOkCnt < value64) //Downlink
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ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE);
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else //Uplink
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{
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/*DbgPrint("pRFCalibrateInfo->ThermalValue = 0x%X\n", pRFCalibrateInfo->ThermalValue);*/
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/*if(pRFCalibrateInfo->ThermalValue < pHalData->EEPROMThermalMeter)*/
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if((pDM_Odm->RFCalibrateInfo.ThermalValue < 0x2c) || (*pDM_Odm->pBandType == BAND_ON_2_4G))
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ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE);
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else
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{
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switch (TxRate)
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{
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case MGN_VHT1SS_MCS6:
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case MGN_VHT1SS_MCS5:
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case MGN_MCS6:
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case MGN_MCS5:
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case MGN_48M:
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case MGN_54M:
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ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0x1ea42b);
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break;
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case MGN_VHT1SS_MCS4:
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case MGN_MCS4:
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case MGN_36M:
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ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa42b);
|
|
break;
|
|
case MGN_VHT1SS_MCS3:
|
|
case MGN_MCS3:
|
|
case MGN_24M:
|
|
ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa47f);
|
|
break;
|
|
case MGN_VHT1SS_MCS2:
|
|
case MGN_MCS2:
|
|
case MGN_18M:
|
|
ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa57f);
|
|
break;
|
|
case MGN_VHT1SS_MCS1:
|
|
case MGN_MCS1:
|
|
case MGN_9M:
|
|
case MGN_12M:
|
|
ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa77f);
|
|
break;
|
|
case MGN_VHT1SS_MCS0:
|
|
case MGN_MCS0:
|
|
case MGN_6M:
|
|
ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa87f);
|
|
break;
|
|
default:
|
|
ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE);
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
else
|
|
{
|
|
ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE);
|
|
}
|
|
|
|
}
|
|
else if (IS_HARDWARE_TYPE_8812AU(Adapter)){
|
|
if(pMgntInfo->RegTxDutyEnable)
|
|
{
|
|
//2013.07.26 Wilson: debug for 8812AU thermal issue (reduce Tx duty cycle)
|
|
// it;s the same issue as 8811AU
|
|
if(!pMgntInfo->ForcedDataRate) //auto rate
|
|
{
|
|
if(pDM_Odm->TxRate != 0xFF)
|
|
TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->TxRate);
|
|
}
|
|
else //force rate
|
|
{
|
|
TxRate = (u1Byte) pMgntInfo->ForcedDataRate;
|
|
}
|
|
|
|
value64 = (curRxOkCnt<<2);
|
|
if(curTxOkCnt < value64) //Downlink
|
|
ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE);
|
|
else //Uplink
|
|
{
|
|
/*DbgPrint("pRFCalibrateInfo->ThermalValue = 0x%X\n", pRFCalibrateInfo->ThermalValue);*/
|
|
/*if(pRFCalibrateInfo->ThermalValue < pHalData->EEPROMThermalMeter)*/
|
|
if((pDM_Odm->RFCalibrateInfo.ThermalValue < 0x2c) || (*pDM_Odm->pBandType == BAND_ON_2_4G))
|
|
ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE);
|
|
else
|
|
{
|
|
switch (TxRate)
|
|
{
|
|
case MGN_VHT2SS_MCS9:
|
|
case MGN_VHT1SS_MCS9:
|
|
case MGN_VHT1SS_MCS8:
|
|
case MGN_MCS15:
|
|
case MGN_MCS7:
|
|
ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0x1ea44f);
|
|
case MGN_VHT2SS_MCS8:
|
|
case MGN_VHT1SS_MCS7:
|
|
case MGN_MCS14:
|
|
case MGN_MCS6:
|
|
case MGN_54M:
|
|
ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa44f);
|
|
case MGN_VHT2SS_MCS7:
|
|
case MGN_VHT2SS_MCS6:
|
|
case MGN_VHT1SS_MCS6:
|
|
case MGN_VHT1SS_MCS5:
|
|
case MGN_MCS13:
|
|
case MGN_MCS5:
|
|
case MGN_48M:
|
|
ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa630);
|
|
break;
|
|
case MGN_VHT2SS_MCS5:
|
|
case MGN_VHT2SS_MCS4:
|
|
case MGN_VHT1SS_MCS4:
|
|
case MGN_VHT1SS_MCS3:
|
|
case MGN_MCS12:
|
|
case MGN_MCS4:
|
|
case MGN_MCS3:
|
|
case MGN_36M:
|
|
case MGN_24M:
|
|
ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa730);
|
|
break;
|
|
case MGN_VHT2SS_MCS3:
|
|
case MGN_VHT2SS_MCS2:
|
|
case MGN_VHT2SS_MCS1:
|
|
case MGN_VHT1SS_MCS2:
|
|
case MGN_VHT1SS_MCS1:
|
|
case MGN_MCS11:
|
|
case MGN_MCS10:
|
|
case MGN_MCS9:
|
|
case MGN_MCS2:
|
|
case MGN_MCS1:
|
|
case MGN_18M:
|
|
case MGN_12M:
|
|
ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa830);
|
|
break;
|
|
case MGN_VHT2SS_MCS0:
|
|
case MGN_VHT1SS_MCS0:
|
|
case MGN_MCS0:
|
|
case MGN_MCS8:
|
|
case MGN_9M:
|
|
case MGN_6M:
|
|
ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa87f);
|
|
break;
|
|
default:
|
|
ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE);
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
else
|
|
{
|
|
ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE);
|
|
}
|
|
}
|
|
else
|
|
ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE);
|
|
|
|
ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("EDCA Turbo on: EDCA_BE:0x%lx\n",EDCA_BE));
|
|
|
|
pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = TRUE;
|
|
|
|
ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("EDCA_BE_DL : 0x%lx EDCA_BE_UL : 0x%lx EDCA_BE : 0x%lx \n",EDCA_BE_DL,EDCA_BE_UL,EDCA_BE));
|
|
|
|
}
|
|
else
|
|
{
|
|
// Turn Off EDCA turbo here.
|
|
// Restore original EDCA according to the declaration of AP.
|
|
if(pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA)
|
|
{
|
|
Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_AC_PARAM, GET_WMM_PARAM_ELE_SINGLE_AC_PARAM(pStaQos->WMMParamEle, AC0_BE) );
|
|
|
|
pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = FALSE;
|
|
ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Restore EDCA BE: 0x%lx \n",pDM_Odm->WMMEDCA_BE));
|
|
|
|
}
|
|
}
|
|
|
|
}
|
|
|
|
|
|
//check if edca turbo is disabled
|
|
BOOLEAN
|
|
odm_IsEdcaTurboDisable(
|
|
IN PVOID pDM_VOID
|
|
)
|
|
{
|
|
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
|
PADAPTER Adapter = pDM_Odm->Adapter;
|
|
PMGNT_INFO pMgntInfo = &Adapter->MgntInfo;
|
|
u4Byte IOTPeer=pMgntInfo->IOTPeer;
|
|
|
|
if(pDM_Odm->bBtDisableEdcaTurbo)
|
|
{
|
|
ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("EdcaTurboDisable for BT!!\n"));
|
|
return TRUE;
|
|
}
|
|
|
|
if((!(pDM_Odm->SupportAbility& ODM_MAC_EDCA_TURBO ))||
|
|
(pDM_Odm->WIFITest & RT_WIFI_LOGO)||
|
|
(IOTPeer>= HT_IOT_PEER_MAX))
|
|
{
|
|
ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("EdcaTurboDisable\n"));
|
|
return TRUE;
|
|
}
|
|
|
|
|
|
// 1. We do not turn on EDCA turbo mode for some AP that has IOT issue
|
|
// 2. User may disable EDCA Turbo mode with OID settings.
|
|
if(pMgntInfo->IOTAction & HT_IOT_ACT_DISABLE_EDCA_TURBO){
|
|
ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("IOTAction:EdcaTurboDisable\n"));
|
|
return TRUE;
|
|
}
|
|
|
|
return FALSE;
|
|
|
|
|
|
}
|
|
|
|
//add iot case here: for MP/CE
|
|
VOID
|
|
ODM_EdcaParaSelByIot(
|
|
IN PVOID pDM_VOID,
|
|
OUT u4Byte *EDCA_BE_UL,
|
|
OUT u4Byte *EDCA_BE_DL
|
|
)
|
|
{
|
|
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
|
PADAPTER Adapter = pDM_Odm->Adapter;
|
|
u4Byte IOTPeer=0;
|
|
u4Byte ICType=pDM_Odm->SupportICType;
|
|
u1Byte WirelessMode=0xFF; //invalid value
|
|
u4Byte IOTPeerSubType = 0;
|
|
|
|
PMGNT_INFO pMgntInfo = &Adapter->MgntInfo;
|
|
u1Byte TwoPortStatus = (u1Byte)TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE;
|
|
|
|
if(pDM_Odm->pWirelessMode!=NULL)
|
|
WirelessMode=*(pDM_Odm->pWirelessMode);
|
|
|
|
///////////////////////////////////////////////////////////
|
|
////list paramter for different platform
|
|
|
|
IOTPeer=pMgntInfo->IOTPeer;
|
|
IOTPeerSubType=pMgntInfo->IOTPeerSubtype;
|
|
GetTwoPortSharedResource(Adapter,TWO_PORT_SHARED_OBJECT__STATUS,NULL,&TwoPortStatus);
|
|
|
|
////============================
|
|
/// IOT case for MP
|
|
////============================
|
|
if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE) {
|
|
(*EDCA_BE_UL) = 0x6ea42b;
|
|
(*EDCA_BE_DL) = 0x6ea42b;
|
|
}
|
|
|
|
if(TwoPortStatus == TWO_PORT_STATUS__EXTENSION_ONLY)
|
|
{
|
|
(*EDCA_BE_UL) = 0x5ea42b;//Parameter suggested by Scott //edca_setting_UL[ExtAdapter->MgntInfo.IOTPeer];
|
|
(*EDCA_BE_DL) = 0x5ea42b;//Parameter suggested by Scott //edca_setting_DL[ExtAdapter->MgntInfo.IOTPeer];
|
|
}
|
|
|
|
#if (INTEL_PROXIMITY_SUPPORT == 1)
|
|
if(pMgntInfo->IntelClassModeInfo.bEnableCA == TRUE)
|
|
{
|
|
(*EDCA_BE_UL) = (*EDCA_BE_DL) = 0xa44f;
|
|
}
|
|
else
|
|
#endif
|
|
{
|
|
if((pMgntInfo->IOTAction & (HT_IOT_ACT_FORCED_ENABLE_BE_TXOP|HT_IOT_ACT_AMSDU_ENABLE)))
|
|
{// To check whether we shall force turn on TXOP configuration.
|
|
if(!((*EDCA_BE_UL) & 0xffff0000))
|
|
(*EDCA_BE_UL) |= 0x005e0000; // Force TxOP limit to 0x005e for UL.
|
|
if(!((*EDCA_BE_DL) & 0xffff0000))
|
|
(*EDCA_BE_DL) |= 0x005e0000; // Force TxOP limit to 0x005e for DL.
|
|
}
|
|
|
|
//92D txop can't be set to 0x3e for cisco1250
|
|
if ((IOTPeer == HT_IOT_PEER_CISCO) && (WirelessMode == ODM_WM_N24G))
|
|
{
|
|
(*EDCA_BE_DL) = edca_setting_DL[IOTPeer];
|
|
(*EDCA_BE_UL) = edca_setting_UL[IOTPeer];
|
|
}
|
|
//merge from 92s_92c_merge temp brunch v2445 20120215
|
|
else if((IOTPeer == HT_IOT_PEER_CISCO) &&((WirelessMode==ODM_WM_G)||(WirelessMode==(ODM_WM_B|ODM_WM_G))||(WirelessMode==ODM_WM_A)||(WirelessMode==ODM_WM_B)))
|
|
{
|
|
(*EDCA_BE_DL) = edca_setting_DL_GMode[IOTPeer];
|
|
}
|
|
else if((IOTPeer== HT_IOT_PEER_AIRGO )&& ((WirelessMode==ODM_WM_G)||(WirelessMode==ODM_WM_A)))
|
|
{
|
|
(*EDCA_BE_DL) = 0xa630;
|
|
}
|
|
|
|
else if(IOTPeer == HT_IOT_PEER_MARVELL)
|
|
{
|
|
(*EDCA_BE_DL) = edca_setting_DL[IOTPeer];
|
|
(*EDCA_BE_UL) = edca_setting_UL[IOTPeer];
|
|
}
|
|
else if(IOTPeer == HT_IOT_PEER_ATHEROS && IOTPeerSubType != HT_IOT_PEER_TPLINK_AC1750)
|
|
{
|
|
// Set DL EDCA for Atheros peer to 0x3ea42b. Suggested by SD3 Wilson for ASUS TP issue.
|
|
if(WirelessMode==ODM_WM_G)
|
|
(*EDCA_BE_DL) = edca_setting_DL_GMode[IOTPeer];
|
|
else
|
|
(*EDCA_BE_DL) = edca_setting_DL[IOTPeer];
|
|
|
|
if(ICType == ODM_RTL8821)
|
|
(*EDCA_BE_DL) = 0x5ea630;
|
|
|
|
}
|
|
}
|
|
|
|
if((ICType==ODM_RTL8812)||(ICType==ODM_RTL8192E)) //add 8812AU/8812AE
|
|
{
|
|
(*EDCA_BE_UL) = 0x5ea42b;
|
|
(*EDCA_BE_DL) = 0x5ea42b;
|
|
|
|
ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("8812A: EDCA_BE_UL=0x%lx EDCA_BE_DL =0x%lx\n",(*EDCA_BE_UL),(*EDCA_BE_DL)));
|
|
}
|
|
|
|
if((ICType==ODM_RTL8814A) && (IOTPeer == HT_IOT_PEER_REALTEK)) /*8814AU and 8814AR*/
|
|
{
|
|
(*EDCA_BE_UL) = 0x5ea42b;
|
|
(*EDCA_BE_DL) = 0xa42b;
|
|
|
|
ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("8814A: EDCA_BE_UL=0x%lx EDCA_BE_DL =0x%lx\n",(*EDCA_BE_UL),(*EDCA_BE_DL)));
|
|
}
|
|
|
|
ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Special: EDCA_BE_UL=0x%lx EDCA_BE_DL =0x%lx, IOTPeer = %d\n",(*EDCA_BE_UL),(*EDCA_BE_DL), IOTPeer));
|
|
|
|
}
|
|
|
|
|
|
VOID
|
|
odm_EdcaChooseTrafficIdx(
|
|
IN PVOID pDM_VOID,
|
|
IN u8Byte cur_tx_bytes,
|
|
IN u8Byte cur_rx_bytes,
|
|
IN BOOLEAN bBiasOnRx,
|
|
OUT BOOLEAN *pbIsCurRDLState
|
|
)
|
|
{
|
|
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
|
|
|
if(bBiasOnRx)
|
|
{
|
|
|
|
if(cur_tx_bytes>(cur_rx_bytes*4))
|
|
{
|
|
*pbIsCurRDLState=FALSE;
|
|
ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Uplink Traffic\n "));
|
|
|
|
}
|
|
else
|
|
{
|
|
*pbIsCurRDLState=TRUE;
|
|
ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Balance Traffic\n"));
|
|
|
|
}
|
|
}
|
|
else
|
|
{
|
|
if(cur_rx_bytes>(cur_tx_bytes*4))
|
|
{
|
|
*pbIsCurRDLState=TRUE;
|
|
ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Downlink Traffic\n"));
|
|
|
|
}
|
|
else
|
|
{
|
|
*pbIsCurRDLState=FALSE;
|
|
ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Balance Traffic\n"));
|
|
}
|
|
}
|
|
|
|
return ;
|
|
}
|
|
|
|
#endif
|
|
|
|
|