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Remove leftovers of Intel WIDI and take a general cleanup

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This commit is contained in:
kimocoder 2024-05-09 21:22:32 +02:00
parent 63cf0b4584
commit c7f8f6e363
28 changed files with 134 additions and 2305 deletions
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10
Makefile
View File

@ -1,15 +1,15 @@
EXTRA_CFLAGS += $(USER_EXTRA_CFLAGS) -fno-pie
EXTRA_CFLAGS += -O3
EXTRA_CFLAGS += -Wno-unused-variable
#EXTRA_CFLAGS += -Wno-unused-value
EXTRA_CFLAGS += -Wno-unused-value
EXTRA_CFLAGS += -Wno-unused-label
#EXTRA_CFLAGS += -Wno-unused-parameter
EXTRA_CFLAGS += -Wno-unused-function
EXTRA_CFLAGS += -Wno-implicit-fallthrough
EXTRA_CFLAGS += -Wno-unused-parameter
#EXTRA_CFLAGS += -Wno-unused-function
#EXTRA_CFLAGS += -Wno-implicit-fallthrough
EXTRA_CFLAGS += -Wno-cast-function-type
EXTRA_CFLAGS += -Wno-missing-declarations
EXTRA_CFLAGS += -Wno-missing-prototypes
#EXTRA_CFLAGS += -Wno-error=cast-function-type
EXTRA_CFLAGS += -Wno-error=cast-function-type
#EXTRA_CFLAGS += -Wno-parentheses-equality
#EXTRA_CFLAGS += -Wno-error=incompatible-pointer-types
EXTRA_CFLAGS += -Wno-stringop-overread

18
core/rtw_cmd.c
View File

@ -152,19 +152,6 @@ sint _rtw_init_evt_priv(struct evt_priv *pevtpriv)
goto exit;
}
pevtpriv->evt_buf = pevtpriv->evt_allocated_buf + 4 - ((unsigned int)(pevtpriv->evt_allocated_buf) & 3);
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
pevtpriv->allocated_c2h_mem = rtw_zmalloc(C2H_MEM_SZ + 4);
if (pevtpriv->allocated_c2h_mem == NULL) {
res = _FAIL;
goto exit;
}
pevtpriv->c2h_mem = pevtpriv->allocated_c2h_mem + 4\
- ((u32)(pevtpriv->allocated_c2h_mem) & 3);
#endif /* end of CONFIG_SDIO_HCI */
_rtw_init_queue(&(pevtpriv->evt_queue));
exit:
@ -5422,11 +5409,6 @@ u8 rtw_drvextra_cmd_hdl(_adapter *padapter, unsigned char *pbuf)
case CHECK_HIQ_WK_CID:
rtw_chk_hi_queue_hdl(padapter);
break;
#endif
#ifdef CONFIG_INTEL_WIDI
case INTEl_WIDI_WK_CID:
intel_widi_wk_hdl(padapter, pdrvextra_cmd->type, pdrvextra_cmd->pbuf);
break;
#endif
/* add for CONFIG_IEEE80211W, none 11w can use it */
case RESET_SECURITYPRIV:

48
core/rtw_mlme.c
View File

@ -1390,13 +1390,6 @@ void rtw_surveydone_event_callback(_adapter *adapter, u8 *pbuf)
|| _SUCCESS != rtw_sitesurvey_cmd(adapter, &parm)
) {
rtw_set_to_roam(adapter, 0);
#ifdef CONFIG_INTEL_WIDI
if (adapter->mlmepriv.widi_state == INTEL_WIDI_STATE_ROAMING) {
_rtw_memset(pmlmepriv->sa_ext, 0x00, L2SDTA_SERVICE_VE_LEN);
intel_widi_wk_cmd(adapter, INTEL_WIDI_LISTEN_WK, NULL, 0);
RTW_INFO("change to widi listen\n");
}
#endif /* CONFIG_INTEL_WIDI */
rtw_free_assoc_resources(adapter, _TRUE);
rtw_indicate_disconnect(adapter, 0, _FALSE);
} else
@ -1756,13 +1749,6 @@ void rtw_indicate_connect(_adapter *padapter)
}
rtw_set_to_roam(padapter, 0);
#ifdef CONFIG_INTEL_WIDI
if (padapter->mlmepriv.widi_state == INTEL_WIDI_STATE_ROAMING) {
_rtw_memset(pmlmepriv->sa_ext, 0x00, L2SDTA_SERVICE_VE_LEN);
intel_widi_wk_cmd(padapter, INTEL_WIDI_LISTEN_WK, NULL, 0);
RTW_INFO("change to widi listen\n");
}
#endif /* CONFIG_INTEL_WIDI */
if (!MLME_IS_AP(padapter) && !MLME_IS_MESH(padapter))
rtw_mi_set_scan_deny(padapter, 3000);
@ -2918,10 +2904,6 @@ void rtw_stadel_event_callback(_adapter *adapter, u8 *pbuf)
roam = _TRUE;
roam_target = pmlmepriv->roam_network;
}
#ifdef CONFIG_INTEL_WIDI
else if (adapter->mlmepriv.widi_state == INTEL_WIDI_STATE_CONNECTED)
roam = _TRUE;
#endif /* CONFIG_INTEL_WIDI */
if (roam == _TRUE) {
if (rtw_to_roam(adapter) > 0)
@ -2938,10 +2920,6 @@ void rtw_stadel_event_callback(_adapter *adapter, u8 *pbuf)
rtw_free_mlme_priv_ie_data(pmlmepriv);
rtw_indicate_disconnect(adapter, *(u16 *)pstadel->rsvd, pstadel->locally_generated);
#ifdef CONFIG_INTEL_WIDI
if (!rtw_to_roam(adapter))
process_intel_widi_disconnect(adapter, 1);
#endif /* CONFIG_INTEL_WIDI */
_rtw_roaming(adapter, roam_target);
}
@ -3063,13 +3041,6 @@ void rtw_join_timeout_handler(void *ctx)
}
break;
} else {
#ifdef CONFIG_INTEL_WIDI
if (adapter->mlmepriv.widi_state == INTEL_WIDI_STATE_ROAMING) {
_rtw_memset(pmlmepriv->sa_ext, 0x00, L2SDTA_SERVICE_VE_LEN);
intel_widi_wk_cmd(adapter, INTEL_WIDI_LISTEN_WK, NULL, 0);
RTW_INFO("change to widi listen\n");
}
#endif /* CONFIG_INTEL_WIDI */
RTW_INFO("%s We've try roaming but fail\n", __FUNCTION__);
#ifdef CONFIG_RTW_80211R
rtw_ft_clr_flags(adapter, RTW_FT_PEER_EN|RTW_FT_PEER_OTD_EN);
@ -3097,13 +3068,10 @@ void rtw_join_timeout_handler(void *ctx)
_exit_critical_bh(&pmlmepriv->lock, &irqL);
#ifdef CONFIG_DRVEXT_MODULE_WSC
drvext_assoc_fail_indicate(&adapter->drvextpriv);
#endif
}
/*
@ -3343,7 +3311,6 @@ void rtw_iface_dynamic_check_timer_handlder(_adapter *adapter)
#ifdef CONFIG_BR_EXT
#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35))
rcu_read_lock();
#endif /* (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35)) */
@ -3823,7 +3790,6 @@ The caller must hold the following spinlock
pmlmepriv->lock
*/
int rtw_select_and_join_from_scanned_queue(struct mlme_priv *pmlmepriv)
@ -3963,7 +3929,6 @@ sint rtw_set_auth(_adapter *adapter, struct security_priv *psecuritypriv)
pcmd->rsp = NULL;
pcmd->rspsz = 0;
_rtw_init_listhead(&pcmd->list);
@ -3971,7 +3936,6 @@ sint rtw_set_auth(_adapter *adapter, struct security_priv *psecuritypriv)
exit:
return res;
}
@ -4233,7 +4197,6 @@ int rtw_restruct_wmm_ie(_adapter *adapter, u8 *in_ie, u8 *out_ie, uint in_len, u
}
/*
* Ported from 8185: IsInPreAuthKeyList(). (Renamed from SecIsInPreAuthKeyList(), 2006-10-13.)
* Added by Annie, 2006-05-07.
@ -4394,7 +4357,6 @@ void rtw_init_registrypriv_dev_network(_adapter *adapter)
WLAN_BSSID_EX *pdev_network = &pregistrypriv->dev_network;
u8 *myhwaddr = adapter_mac_addr(adapter);
_rtw_memcpy(pdev_network->MacAddress, myhwaddr, ETH_ALEN);
_rtw_memcpy(&pdev_network->Ssid, &pregistrypriv->ssid, sizeof(NDIS_802_11_SSID));
@ -4406,8 +4368,6 @@ void rtw_init_registrypriv_dev_network(_adapter *adapter)
pdev_network->Configuration.FHConfig.HopSet = 0;
pdev_network->Configuration.FHConfig.DwellTime = 0;
}
void rtw_update_registrypriv_dev_network(_adapter *adapter)
@ -4487,14 +4447,11 @@ void rtw_update_registrypriv_dev_network(_adapter *adapter)
/* notes: translate IELength & Length after assign the Length to cmdsz in createbss_cmd(); */
/* pdev_network->IELength = cpu_to_le32(sz); */
}
void rtw_get_encrypt_decrypt_from_registrypriv(_adapter *adapter)
{
}
/* the fucntion is at passive_level */
@ -4513,7 +4470,7 @@ void rtw_joinbss_reset(_adapter *padapter)
phtpriv->ampdu_enable = _FALSE;/* reset to disabled */
#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
#if defined(CONFIG_USB_HCI)
/* TH=1 => means that invalidate usb rx aggregation */
/* TH=0 => means that validate usb rx aggregation, use init value. */
if (phtpriv->ht_option) {
@ -4526,8 +4483,7 @@ void rtw_joinbss_reset(_adapter *padapter)
threshold = 1;
rtw_hal_set_hwreg(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold));
}
#endif/* #if defined( CONFIG_USB_HCI) || defined (CONFIG_SDIO_HCI) */
#endif/* #if defined( CONFIG_USB_HCI) */
#endif/* #ifdef CONFIG_80211N_HT */
}

19
core/rtw_mlme_ext.c
View File

@ -247,26 +247,32 @@ void rtw_txpwr_init_regd(struct rf_ctl_t *rfctl)
case TXPWR_LMT_CHILE:
if (regd == TXPWR_LMT_IC || regd == TXPWR_LMT_CHILE)
regd = TXPWR_LMT_FCC;
else if (regd == TXPWR_LMT_KCC || regd == TXPWR_LMT_ACMA)
regd = TXPWR_LMT_ETSI;
ent = _rtw_txpwr_lmt_get_by_name(rfctl, regd_str(regd));
if (ent)
rfctl->regd_name = ent->regd_name;
RTW_PRINT("alternate regd_name:%s %s\n"
, regd_str(regd)
, rfctl->regd_name ? "is used" : "not found"
/* fallthrough */
);
if (rfctl->regd_name)
break;
/* fallthrough */
default:
rfctl->regd_name = regd_str(TXPWR_LMT_WW);
RTW_PRINT("assign %s for default case\n", regd_str(TXPWR_LMT_WW));
break;
};
/* fallthrough */
}
release_lock:
_exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
}
#endif /* CONFIG_TXPWR_LIMIT */
void rtw_rfctl_init(_adapter *adapter)
@ -1343,6 +1349,8 @@ void mgt_dispatcher(_adapter *padapter, union recv_frame *precv_frame)
else
ptable->func = &OnAuthClient;
case WIFI_ASSOCREQ:
break;
case WIFI_REASSOCREQ:
_mgt_dispatcher(padapter, ptable, precv_frame);
#ifdef CONFIG_HOSTAPD_MLME
@ -1350,6 +1358,7 @@ void mgt_dispatcher(_adapter *padapter, union recv_frame *precv_frame)
rtw_hostapd_mlme_rx(padapter, precv_frame);
#endif
break;
case WIFI_PROBEREQ:
_mgt_dispatcher(padapter, ptable, precv_frame);
#ifdef CONFIG_HOSTAPD_MLME
@ -1357,12 +1366,15 @@ void mgt_dispatcher(_adapter *padapter, union recv_frame *precv_frame)
rtw_hostapd_mlme_rx(padapter, precv_frame);
#endif
break;
case WIFI_BEACON:
_mgt_dispatcher(padapter, ptable, precv_frame);
break;
case WIFI_ACTION:
_mgt_dispatcher(padapter, ptable, precv_frame);
break;
default:
_mgt_dispatcher(padapter, ptable, precv_frame);
#ifdef CONFIG_HOSTAPD_MLME
@ -1370,6 +1382,7 @@ void mgt_dispatcher(_adapter *padapter, union recv_frame *precv_frame)
rtw_hostapd_mlme_rx(padapter, precv_frame);
#endif
break;
}
#else

99
core/rtw_p2p.c
View File

@ -112,7 +112,6 @@ static u32 go_add_group_info_attr(struct wifidirect_info *pwdinfo, u8 *pbuf)
pcur += psta->dev_name_len;
}
tmplen = (u8)(pcur - pstart);
*pstart = (tmplen - 1);
@ -123,8 +122,6 @@ static u32 go_add_group_info_attr(struct wifidirect_info *pwdinfo, u8 *pbuf)
pstart = pcur;
}
}
_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL);
@ -249,7 +246,6 @@ static void issue_p2p_devdisc_resp(struct wifidirect_info *pwdinfo, u8 *da, u8 s
pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen));
pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen));
/* Build P2P IE */
/* P2P OUI */
p2pielen = 0;
@ -450,10 +446,8 @@ static void issue_p2p_presence_resp(struct wifidirect_info *pwdinfo, u8 *da, u8
p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_NOA, 2, noa_attr_content);
pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, p2pie, &(pattrib->pktlen));
pattrib->last_txcmdsz = pattrib->pktlen;
dump_mgntframe(padapter, pmgntframe);
@ -466,7 +460,6 @@ u32 build_beacon_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf)
u16 capability = 0;
u32 len = 0, p2pielen = 0;
/* P2P OUI */
p2pielen = 0;
p2pie[p2pielen++] = 0x50;
@ -501,7 +494,6 @@ u32 build_beacon_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf)
/* P2P Device ID ATTR */
p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_DEVICE_ID, ETH_ALEN, pwdinfo->device_addr);
/* Notice of Absence ATTR */
/* Type: */
/* Length: */
@ -509,10 +501,8 @@ u32 build_beacon_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf)
/* go_add_noa_attr(pwdinfo); */
pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &len);
return len;
}
@ -543,7 +533,6 @@ u32 build_beacon_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf)
/* 2. Associated BSSID */
/* 3. Coupled Sink Information */
/* WFD Device Information ATTR */
/* Type: */
wfdie[wfdielen++] = WFD_ATTR_DEVICE_INFO;
@ -657,7 +646,6 @@ u32 build_probe_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf)
/* 2. Associated BSSID */
/* 3. Coupled Sink Information */
/* WFD Device Information ATTR */
/* Type: */
wfdie[wfdielen++] = WFD_ATTR_DEVICE_INFO;
@ -1332,7 +1320,6 @@ u32 build_nego_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf)
wfdie[wfdielen++] = 0;
wfdie[wfdielen++] = 0;
rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len);
exit:
@ -1432,7 +1419,6 @@ u32 build_nego_confirm_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf)
wfdie[wfdielen++] = 0;
wfdie[wfdielen++] = 0;
pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len);
exit:
@ -1464,7 +1450,6 @@ u32 build_invitation_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf)
/* 2. Associated BSSID ( Optional ) */
/* 3. Local IP Adress ( Optional ) */
/* WFD Device Information ATTR */
/* Type: */
wfdie[wfdielen++] = WFD_ATTR_DEVICE_INFO;
@ -1577,7 +1562,6 @@ u32 build_invitation_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf)
/* 2. Associated BSSID ( Optional ) */
/* 3. Local IP Adress ( Optional ) */
/* WFD Device Information ATTR */
/* Type: */
wfdie[wfdielen++] = WFD_ATTR_DEVICE_INFO;
@ -1758,7 +1742,6 @@ u32 build_provdisc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf)
wfdie[wfdielen++] = 0;
wfdie[wfdielen++] = 0;
rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len);
exit:
@ -1869,16 +1852,6 @@ u32 build_probe_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf)
{
u8 p2pie[MAX_P2P_IE_LEN] = { 0x00 };
u32 len = 0, p2pielen = 0;
#ifdef CONFIG_INTEL_WIDI
struct mlme_priv *pmlmepriv = &(pwdinfo->padapter->mlmepriv);
u8 zero_array_check[L2SDTA_SERVICE_VE_LEN] = { 0x00 };
u8 widi_version = 0, i = 0;
if (_rtw_memcmp(pmlmepriv->sa_ext, zero_array_check, L2SDTA_SERVICE_VE_LEN) == _FALSE)
widi_version = 35;
else if (pmlmepriv->num_p2p_sdt != 0)
widi_version = 40;
#endif /* CONFIG_INTEL_WIDI */
/* P2P OUI */
p2pielen = 0;
@ -1961,13 +1934,6 @@ u32 build_probe_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf)
/* 21->P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) */
/* + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) */
/* *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len ); */
#ifdef CONFIG_INTEL_WIDI
if (widi_version == 35)
RTW_PUT_LE16(p2pie + p2pielen, 21 + 8 + pwdinfo->device_name_len);
else if (widi_version == 40)
RTW_PUT_LE16(p2pie + p2pielen, 21 + 8 * pmlmepriv->num_p2p_sdt + pwdinfo->device_name_len);
else
#endif /* CONFIG_INTEL_WIDI */
RTW_PUT_LE16(p2pie + p2pielen, 21 + pwdinfo->device_name_len);
p2pielen += 2;
@ -1982,25 +1948,6 @@ u32 build_probe_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf)
RTW_PUT_BE16(p2pie + p2pielen, pwdinfo->supported_wps_cm);
p2pielen += 2;
#ifdef CONFIG_INTEL_WIDI
if (widi_version == 40) {
/* Primary Device Type */
/* Category ID */
/* *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_CID_MULIT_MEDIA ); */
RTW_PUT_BE16(p2pie + p2pielen, pmlmepriv->p2p_pdt_cid);
p2pielen += 2;
/* OUI */
/* *(u32*) ( p2pie + p2pielen ) = cpu_to_be32( WPSOUI ); */
RTW_PUT_BE32(p2pie + p2pielen, WPSOUI);
p2pielen += 4;
/* Sub Category ID */
/* *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_SCID_MEDIA_SERVER ); */
RTW_PUT_BE16(p2pie + p2pielen, pmlmepriv->p2p_pdt_scid);
p2pielen += 2;
} else
#endif /* CONFIG_INTEL_WIDI */
{
/* Primary Device Type */
/* Category ID */
@ -2020,32 +1967,6 @@ u32 build_probe_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf)
}
/* Number of Secondary Device Types */
#ifdef CONFIG_INTEL_WIDI
if (widi_version == 35) {
p2pie[p2pielen++] = 0x01;
RTW_PUT_BE16(p2pie + p2pielen, WPS_PDT_CID_DISPLAYS);
p2pielen += 2;
RTW_PUT_BE32(p2pie + p2pielen, INTEL_DEV_TYPE_OUI);
p2pielen += 4;
RTW_PUT_BE16(p2pie + p2pielen, P2P_SCID_WIDI_CONSUMER_SINK);
p2pielen += 2;
} else if (widi_version == 40) {
p2pie[p2pielen++] = pmlmepriv->num_p2p_sdt;
for (; i < pmlmepriv->num_p2p_sdt; i++) {
RTW_PUT_BE16(p2pie + p2pielen, pmlmepriv->p2p_sdt_cid[i]);
p2pielen += 2;
RTW_PUT_BE32(p2pie + p2pielen, INTEL_DEV_TYPE_OUI);
p2pielen += 4;
RTW_PUT_BE16(p2pie + p2pielen, pmlmepriv->p2p_sdt_scid[i]);
p2pielen += 2;
}
} else
#endif /* CONFIG_INTEL_WIDI */
p2pie[p2pielen++] = 0x00; /* No Secondary Device Type List */
/* Device Name */
@ -2070,10 +1991,8 @@ u32 build_probe_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf)
if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO))
p2pielen += go_add_group_info_attr(pwdinfo, p2pie + p2pielen);
pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &len);
return len;
}
@ -2202,12 +2121,9 @@ u32 build_prov_disc_request_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8
pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &len);
return len;
}
u32 build_assoc_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8 status_code)
{
u8 p2pie[MAX_P2P_IE_LEN] = { 0x00 };
@ -2310,7 +2226,6 @@ u32 process_probe_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint l
}
return ret;
}
@ -2399,7 +2314,6 @@ u32 process_assoc_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint l
pattr_content += (num_of_secdev_type * 8);
}
/* dev_name_len = attr_contentlen - ETH_ALEN - 2 - 8 - 1 - (num_of_secdev_type*8); */
psta->dev_name_len = 0;
if (WPS_ATTR_DEVICE_NAME == be16_to_cpu(*(u16 *)pattr_content)) {
@ -2413,7 +2327,6 @@ u32 process_assoc_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint l
rtw_mfree(pbuf, attr_contentlen);
}
}
/* Get the next P2P IE */
@ -2486,16 +2399,12 @@ u32 process_p2p_devdisc_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint le
} else
status = P2P_STATUS_FAIL_INVALID_PARAM;
}
}
/* issue Device Discoverability Response */
issue_p2p_devdisc_resp(pwdinfo, get_addr2_ptr(pframe), status, dialogToken);
return (status == P2P_STATUS_SUCCESS) ? _TRUE : _FALSE;
}
@ -5388,10 +5297,6 @@ int rtw_p2p_enable(_adapter *padapter, enum P2P_ROLE role)
#endif
} else if (role == P2P_ROLE_DISABLE) {
#ifdef CONFIG_INTEL_WIDI
if (padapter->mlmepriv.p2p_reject_disable == _TRUE)
return ret;
#endif /* CONFIG_INTEL_WIDI */
#ifdef CONFIG_IOCTL_CFG80211
if (padapter->wdinfo.driver_interface == DRIVER_CFG80211)
@ -5436,10 +5341,6 @@ int rtw_p2p_enable(_adapter *padapter, enum P2P_ROLE role)
/* Restore to initial setting. */
update_tx_basic_rate(padapter, padapter->registrypriv.wireless_mode);
#ifdef CONFIG_INTEL_WIDI
rtw_reset_widi_info(padapter);
#endif /* CONFIG_INTEL_WIDI */
/* For WiDi purpose. */
#ifdef CONFIG_IOCTL_CFG80211
pwdinfo->driver_interface = DRIVER_CFG80211;

7
core/rtw_rson.c
View File

@ -548,13 +548,6 @@ void rtw_rson_scan_cmd_hdl(_adapter *padapter, int op)
if (rtw_to_roam(padapter) != 0) {
if (rtw_dec_to_roam(padapter) == 0) {
rtw_set_to_roam(padapter, 0);
#ifdef CONFIG_INTEL_WIDI
if (padapter->mlmepriv.widi_state == INTEL_WIDI_STATE_ROAMING) {
_rtw_memset(pmlmepriv->sa_ext, 0x00, L2SDTA_SERVICE_VE_LEN);
intel_widi_wk_cmd(padapter, INTEL_WIDI_LISTEN_WK, NULL, 0);
RTW_INFO("change to widi listen\n");
}
#endif /* CONFIG_INTEL_WIDI */
rtw_free_assoc_resources(padapter, _TRUE);
rtw_indicate_disconnect(padapter, 0, _FALSE);
} else

4
core/rtw_wlan_util.c
View File

@ -3062,10 +3062,6 @@ void update_tx_basic_rate(_adapter *padapter, u8 wirelessmode)
if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE))
return;
#endif /* CONFIG_P2P */
#ifdef CONFIG_INTEL_WIDI
if (padapter->mlmepriv.widi_state != INTEL_WIDI_STATE_NONE)
return;
#endif /* CONFIG_INTEL_WIDI */
_rtw_memset(supported_rates, 0, NDIS_802_11_LENGTH_RATES_EX);

2
dkms.conf
View File

@ -1,5 +1,5 @@
PACKAGE_NAME="realtek-rtl88xxau"
PACKAGE_VERSION="5.6.4.2~20230501"
PACKAGE_VERSION="5.6.4.2~20240509"
CLEAN="'make' clean"
BUILT_MODULE_NAME[0]=88XXau
PROCS_NUM=`nproc`

390
hal/hal_com.c
View File

@ -1075,6 +1075,8 @@ static VOID _ThreeOutPipeMapping(
}
}
/*
static VOID _FourOutPipeMapping(
IN PADAPTER pAdapter,
IN BOOLEAN bWIFICfg
@ -1082,41 +1084,40 @@ static VOID _FourOutPipeMapping(
{
struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(pAdapter);
if (bWIFICfg) { /* for WMM */
if (bWIFICfg) {
/* BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA */
/* { 1, 2, 1, 0, 0, 0, 0, 0, 0 }; */
/* 0:H, 1:N, 2:L ,3:E */
BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA
{ 1, 2, 1, 0, 0, 0, 0, 0, 0 };
0:H, 1:N, 2:L ,3:E
pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];/* VO */
pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];/* VI */
pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];/* BE */
pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[1];/* BK */
pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];// VO
pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];// VI
pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];// BE
pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[1];// BK
pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];/* BCN */
pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];/* MGT */
pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[3];/* HIGH */
pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */
pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];// BCN
pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];// MGT
pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[3];// HIGH
pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];// TXCMD
} else { /* typical setting */
} else {
BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA
{ 2, 2, 1, 0, 0, 0, 0, 0, 0 };
0:H, 1:N, 2:L
/* BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA */
/* { 2, 2, 1, 0, 0, 0, 0, 0, 0 }; */
/* 0:H, 1:N, 2:L */
pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];// VO
pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];// VI
pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];// BE
pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[2];// BK
pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];/* VO */
pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];/* VI */
pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];/* BE */
pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[2];/* BK */
pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];/* BCN */
pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];/* MGT */
pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[3];/* HIGH */
pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */
pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];// BCN
pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];// MGT
pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[3];// HIGH
pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];// TXCMD
}
}
} */
BOOLEAN
Hal_MappingOutPipe(
IN PADAPTER pAdapter,
@ -6291,9 +6292,6 @@ static void rtw_hal_construct_P2PProbeRsp(_adapter *padapter, u8 *pframe, u32 *p
#ifdef CONFIG_WFD
u32 wfdielen = 0;
#endif
#ifdef CONFIG_INTEL_WIDI
u8 zero_array_check[L2SDTA_SERVICE_VE_LEN] = { 0x00 };
#endif /* CONFIG_INTEL_WIDI */
/* for debug */
u8 *dbgbuf = pframe;
@ -6388,39 +6386,6 @@ static void rtw_hal_construct_P2PProbeRsp(_adapter *padapter, u8 *pframe, u32 *p
/* Value: */
wpsie[wpsielen++] = WPS_VERSION_1; /* Version 1.0 */
#ifdef CONFIG_INTEL_WIDI
/* Commented by Kurt */
/* Appended WiDi info. only if we did issued_probereq_widi(), and then we saved ven. ext. in pmlmepriv->sa_ext. */
if (_rtw_memcmp(pmlmepriv->sa_ext, zero_array_check, L2SDTA_SERVICE_VE_LEN) == _FALSE
|| pmlmepriv->num_p2p_sdt != 0) {
/* Sec dev type */
*(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_SEC_DEV_TYPE_LIST);
wpsielen += 2;
/* Length: */
*(u16 *)(wpsie + wpsielen) = cpu_to_be16(0x0008);
wpsielen += 2;
/* Value: */
/* Category ID */
*(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_PDT_CID_DISPLAYS);
wpsielen += 2;
/* OUI */
*(u32 *)(wpsie + wpsielen) = cpu_to_be32(INTEL_DEV_TYPE_OUI);
wpsielen += 4;
*(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_PDT_SCID_WIDI_CONSUMER_SINK);
wpsielen += 2;
if (_rtw_memcmp(pmlmepriv->sa_ext, zero_array_check, L2SDTA_SERVICE_VE_LEN) == _FALSE) {
/* Vendor Extension */
_rtw_memcpy(wpsie + wpsielen, pmlmepriv->sa_ext, L2SDTA_SERVICE_VE_LEN);
wpsielen += L2SDTA_SERVICE_VE_LEN;
}
}
#endif /* CONFIG_INTEL_WIDI */
/* WiFi Simple Config State */
/* Type: */
*(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_SIMPLE_CONF_STATE);
@ -9636,12 +9601,6 @@ static void rtw_hal_wow_enable(_adapter *adapter)
}
}
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
/* Enable CPWM2 only. */
res = rtw_hal_enable_cpwm2(adapter);
if (res == _FAIL)
RTW_PRINT("[WARNING] enable cpwm2 fail\n");
#endif
#ifdef CONFIG_GPIO_WAKEUP
rtw_hal_switch_gpio_wl_ctrl(adapter, WAKEUP_GPIO_IDX, _TRUE);
#endif
@ -10212,6 +10171,7 @@ static u8 _rtw_mi_assoc_if_num(_adapter *adapter)
return mi_iface_num;
}
/*
static _adapter *_rtw_search_sta_iface(_adapter *adapter)
{
struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
@ -10229,7 +10189,9 @@ static _adapter *_rtw_search_sta_iface(_adapter *adapter)
}
}
return sta_iface;
}
}*/
/*
#ifdef CONFIG_AP_MODE
static _adapter *_rtw_search_ap_iface(_adapter *adapter)
{
@ -10248,6 +10210,7 @@ static _adapter *_rtw_search_ap_iface(_adapter *adapter)
return ap_iface;
}
#endif
*/
#ifdef CONFIG_CUSTOMER01_SMART_ANTENNA
void rtw_hal_set_pathb_phase(_adapter *adapter, u8 phase_idx)
@ -12604,61 +12567,7 @@ int hal_efuse_macaddr_offset(_adapter *adapter)
interface_type = rtw_get_intf_type(adapter);
switch (rtw_get_chip_type(adapter)) {
#ifdef CONFIG_RTL8723B
case RTL8723B:
if (interface_type == RTW_USB)
addr_offset = EEPROM_MAC_ADDR_8723BU;
else if (interface_type == RTW_SDIO)
addr_offset = EEPROM_MAC_ADDR_8723BS;
else if (interface_type == RTW_PCIE)
addr_offset = EEPROM_MAC_ADDR_8723BE;
break;
#endif
#ifdef CONFIG_RTL8703B
case RTL8703B:
if (interface_type == RTW_USB)
addr_offset = EEPROM_MAC_ADDR_8703BU;
else if (interface_type == RTW_SDIO)
addr_offset = EEPROM_MAC_ADDR_8703BS;
break;
#endif
#ifdef CONFIG_RTL8723D
case RTL8723D:
if (interface_type == RTW_USB)
addr_offset = EEPROM_MAC_ADDR_8723DU;
else if (interface_type == RTW_SDIO)
addr_offset = EEPROM_MAC_ADDR_8723DS;
else if (interface_type == RTW_PCIE)
addr_offset = EEPROM_MAC_ADDR_8723DE;
break;
#endif
#ifdef CONFIG_RTL8188E
case RTL8188E:
if (interface_type == RTW_USB)
addr_offset = EEPROM_MAC_ADDR_88EU;
else if (interface_type == RTW_SDIO)
addr_offset = EEPROM_MAC_ADDR_88ES;
else if (interface_type == RTW_PCIE)
addr_offset = EEPROM_MAC_ADDR_88EE;
break;
#endif
#ifdef CONFIG_RTL8188F
case RTL8188F:
if (interface_type == RTW_USB)
addr_offset = EEPROM_MAC_ADDR_8188FU;
else if (interface_type == RTW_SDIO)
addr_offset = EEPROM_MAC_ADDR_8188FS;
break;
#endif
#ifdef CONFIG_RTL8188GTV
case RTL8188GTV:
if (interface_type == RTW_USB)
addr_offset = EEPROM_MAC_ADDR_8188GTVU;
else if (interface_type == RTW_SDIO)
addr_offset = EEPROM_MAC_ADDR_8188GTVS;
break;
#endif
#ifdef CONFIG_RTL8812A
case RTL8812:
if (interface_type == RTW_USB)
@ -12677,16 +12586,6 @@ int hal_efuse_macaddr_offset(_adapter *adapter)
addr_offset = EEPROM_MAC_ADDR_8821AE;
break;
#endif
#ifdef CONFIG_RTL8192E
case RTL8192E:
if (interface_type == RTW_USB)
addr_offset = EEPROM_MAC_ADDR_8192EU;
else if (interface_type == RTW_SDIO)
addr_offset = EEPROM_MAC_ADDR_8192ES;
else if (interface_type == RTW_PCIE)
addr_offset = EEPROM_MAC_ADDR_8192EE;
break;
#endif
#ifdef CONFIG_RTL8814A
case RTL8814A:
if (interface_type == RTW_USB)
@ -12696,46 +12595,6 @@ int hal_efuse_macaddr_offset(_adapter *adapter)
break;
#endif
#ifdef CONFIG_RTL8822B
case RTL8822B:
if (interface_type == RTW_USB)
addr_offset = EEPROM_MAC_ADDR_8822BU;
else if (interface_type == RTW_SDIO)
addr_offset = EEPROM_MAC_ADDR_8822BS;
else if (interface_type == RTW_PCIE)
addr_offset = EEPROM_MAC_ADDR_8822BE;
break;
#endif /* CONFIG_RTL8822B */
#ifdef CONFIG_RTL8821C
case RTL8821C:
if (interface_type == RTW_USB)
addr_offset = EEPROM_MAC_ADDR_8821CU;
else if (interface_type == RTW_SDIO)
addr_offset = EEPROM_MAC_ADDR_8821CS;
else if (interface_type == RTW_PCIE)
addr_offset = EEPROM_MAC_ADDR_8821CE;
break;
#endif /* CONFIG_RTL8821C */
#ifdef CONFIG_RTL8710B
case RTL8710B:
if (interface_type == RTW_USB)
addr_offset = EEPROM_MAC_ADDR_8710B;
break;
#endif
#ifdef CONFIG_RTL8192F
case RTL8192F:
if (interface_type == RTW_USB)
addr_offset = EEPROM_MAC_ADDR_8192FU;
else if (interface_type == RTW_SDIO)
addr_offset = EEPROM_MAC_ADDR_8192FS;
else if (interface_type == RTW_PCIE)
addr_offset = EEPROM_MAC_ADDR_8192FE;
break;
#endif /* CONFIG_RTL8192F */
}
if (addr_offset == -1) {
@ -12833,9 +12692,6 @@ int hal_config_macaddr(_adapter *adapter, bool autoload_fail)
int addr_offset = hal_efuse_macaddr_offset(adapter);
u8 *hw_addr = NULL;
int ret = _SUCCESS;
#if defined(CONFIG_RTL8822B) && defined(CONFIG_USB_HCI)
u8 ft_mac_addr[ETH_ALEN] = {0x00, 0xff, 0xff, 0xff, 0xff, 0xff}; /* FT USB2 for 8822B */
#endif
if (autoload_fail)
goto bypass_hw_pg;
@ -12855,11 +12711,6 @@ int hal_config_macaddr(_adapter *adapter, bool autoload_fail)
hw_addr = addr;
}
#if defined(CONFIG_RTL8822B) && defined(CONFIG_USB_HCI)
if (_rtw_memcmp(hw_addr, ft_mac_addr, ETH_ALEN))
hw_addr[0] = 0xff;
#endif
/* check hw pg data */
if (hw_addr && rtw_check_invalid_mac_address(hw_addr, _TRUE) == _FALSE) {
_rtw_memcpy(hal_data->EEPROMMACAddr, hw_addr, ETH_ALEN);
@ -12914,75 +12765,9 @@ void rtw_bb_rf_gain_offset(_adapter *padapter)
return;
}
#if defined(CONFIG_RTL8723B)
if (value & BIT4 && (registry_par->RegPwrTrimEnable == 1)) {
RTW_INFO("Offset RF Gain.\n");
RTW_INFO("Offset RF Gain. pHalData->EEPROMRFGainVal=0x%x\n", pHalData->EEPROMRFGainVal);
if (pHalData->EEPROMRFGainVal != 0xff) {
if (pHalData->ant_path == RF_PATH_A)
GainValue = (pHalData->EEPROMRFGainVal & 0x0f);
else
GainValue = (pHalData->EEPROMRFGainVal & 0xf0) >> 4;
RTW_INFO("Ant PATH_%d GainValue Offset = 0x%x\n", (pHalData->ant_path == RF_PATH_A) ? (RF_PATH_A) : (RF_PATH_B), GainValue);
for (i = 0; i < ArrayLen; i += 2) {
/* RTW_INFO("ArrayLen in =%d ,Array 1 =0x%x ,Array2 =0x%x\n",i,Array[i],Array[i]+1); */
v1 = Array[i];
v2 = Array[i + 1];
if (v1 == GainValue) {
RTW_INFO("Offset RF Gain. got v1 =0x%x ,v2 =0x%x\n", v1, v2);
target = v2;
break;
}
}
RTW_INFO("pHalData->EEPROMRFGainVal=0x%x ,Gain offset Target Value=0x%x\n", pHalData->EEPROMRFGainVal, target);
res = rtw_hal_read_rfreg(padapter, RF_PATH_A, 0x7f, 0xffffffff);
RTW_INFO("Offset RF Gain. before reg 0x7f=0x%08x\n", res);
phy_set_rf_reg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET, BIT18 | BIT17 | BIT16 | BIT15, target);
res = rtw_hal_read_rfreg(padapter, RF_PATH_A, 0x7f, 0xffffffff);
RTW_INFO("Offset RF Gain. After reg 0x7f=0x%08x\n", res);
} else
RTW_INFO("Offset RF Gain. pHalData->EEPROMRFGainVal=0x%x != 0xff, didn't run Kfree\n", pHalData->EEPROMRFGainVal);
} else
RTW_INFO("Using the default RF gain.\n");
#elif defined(CONFIG_RTL8188E)
if (value & BIT4 && (registry_par->RegPwrTrimEnable == 1)) {
RTW_INFO("8188ES Offset RF Gain.\n");
RTW_INFO("8188ES Offset RF Gain. EEPROMRFGainVal=0x%x\n",
pHalData->EEPROMRFGainVal);
if (pHalData->EEPROMRFGainVal != 0xff) {
res = rtw_hal_read_rfreg(padapter, RF_PATH_A,
REG_RF_BB_GAIN_OFFSET, 0xffffffff);
RTW_INFO("Offset RF Gain. reg 0x55=0x%x\n", res);
res &= 0xfff87fff;
res |= (pHalData->EEPROMRFGainVal & 0x0f) << 15;
RTW_INFO("Offset RF Gain. res=0x%x\n", res);
rtw_hal_write_rfreg(padapter, RF_PATH_A,
REG_RF_BB_GAIN_OFFSET,
RF_GAIN_OFFSET_MASK, res);
} else {
RTW_INFO("Offset RF Gain. EEPROMRFGainVal=0x%x == 0xff, didn't run Kfree\n",
pHalData->EEPROMRFGainVal);
}
} else
RTW_INFO("Using the default RF gain.\n");
#else
/* TODO: call this when channel switch */
if (kfree_data->flag & KFREE_FLAG_ON)
rtw_rf_apply_tx_gain_offset(padapter, 6); /* input ch6 to select BB_GAIN_2G */
#endif
}
#endif /*CONFIG_RF_POWER_TRIM */
@ -13710,14 +13495,9 @@ u8 rtw_get_current_tx_sgi(_adapter *padapter, struct sta_info *psta)
return curr_tx_sgi;
if (padapter->fix_rate == 0xff) {
#if defined(CONFIG_RTL8188E)
#if (RATE_ADAPTIVE_SUPPORT == 1)
curr_tx_sgi = hal_data->odmpriv.ra_info[psta->cmn.mac_id].rate_sgi;
#endif /* (RATE_ADAPTIVE_SUPPORT == 1)*/
#else
ra_info = &psta->cmn.ra_info;
curr_tx_sgi = ((ra_info->curr_tx_rate) & 0x80) >> 7;
#endif
} else {
curr_tx_sgi = ((padapter->fix_rate) & 0x80) >> 7;
}
@ -13735,14 +13515,9 @@ u8 rtw_get_current_tx_rate(_adapter *padapter, struct sta_info *psta)
return rate_id;
if (padapter->fix_rate == 0xff) {
#if defined(CONFIG_RTL8188E)
#if (RATE_ADAPTIVE_SUPPORT == 1)
rate_id = hal_data->odmpriv.ra_info[psta->cmn.mac_id].decision_rate;
#endif /* (RATE_ADAPTIVE_SUPPORT == 1)*/
#else
ra_info = &psta->cmn.ra_info;
rate_id = ra_info->curr_tx_rate & 0x7f;
#endif
} else {
rate_id = padapter->fix_rate & 0x7f;
}
@ -13826,28 +13601,14 @@ void hal_set_crystal_cap(_adapter *adapter, u8 crystal_cap)
crystal_cap = crystal_cap & 0x3F;
switch (rtw_get_chip_type(adapter)) {
#if defined(CONFIG_RTL8188E) || defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV)
case RTL8188E:
case RTL8188F:
case RTL8188GTV:
/* write 0x24[16:11] = 0x24[22:17] = CrystalCap */
phy_set_bb_reg(adapter, REG_AFE_XTAL_CTRL, 0x007FF800, (crystal_cap | (crystal_cap << 6)));
break;
#endif
#if defined(CONFIG_RTL8812A)
case RTL8812:
/* write 0x2C[30:25] = 0x2C[24:19] = CrystalCap */
phy_set_bb_reg(adapter, REG_MAC_PHY_CTRL, 0x7FF80000, (crystal_cap | (crystal_cap << 6)));
break;
#endif
#if defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8703B) || \
defined(CONFIG_RTL8723D) || defined(CONFIG_RTL8821A) || \
defined(CONFIG_RTL8192E)
case RTL8723B:
case RTL8703B:
case RTL8723D:
#if defined(CONFIG_RTL8821A)
case RTL8821:
case RTL8192E:
/* write 0x2C[23:18] = 0x2C[17:12] = CrystalCap */
phy_set_bb_reg(adapter, REG_MAC_PHY_CTRL, 0x00FFF000, (crystal_cap | (crystal_cap << 6)));
break;
@ -13857,25 +13618,6 @@ void hal_set_crystal_cap(_adapter *adapter, u8 crystal_cap)
/* write 0x2C[26:21] = 0x2C[20:15] = CrystalCap*/
phy_set_bb_reg(adapter, REG_MAC_PHY_CTRL, 0x07FF8000, (crystal_cap | (crystal_cap << 6)));
break;
#endif
#if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8192F)
case RTL8822B:
case RTL8821C:
case RTL8192F:
/* write 0x28[6:1] = 0x24[30:25] = CrystalCap */
crystal_cap = crystal_cap & 0x3F;
phy_set_bb_reg(adapter, REG_AFE_XTAL_CTRL, 0x7E000000, crystal_cap);
phy_set_bb_reg(adapter, REG_AFE_PLL_CTRL, 0x7E, crystal_cap);
break;
#endif
#if defined(CONFIG_RTL8710B)
case RTL8710B:
/*Change by ylb 20160728, Becase 0x2C[23:12] is removed to syson 0x60[29:18] */
/* 0x2C[23:18] = 0x2C[29:24] = CrystalCap //Xo:[29:24], Xi:[23:18]*/
crystal_cap = crystal_cap & 0x3F;
hal_set_syson_reg(adapter, REG_SYS_XTAL_CTRL0, 0x3FFC0000, (crystal_cap | (crystal_cap << 6)));
break;
#endif
default:
rtw_warn_on(1);
@ -13890,36 +13632,6 @@ int hal_spec_init(_adapter *adapter)
interface_type = rtw_get_intf_type(adapter);
switch (rtw_get_chip_type(adapter)) {
#ifdef CONFIG_RTL8723B
case RTL8723B:
init_hal_spec_8723b(adapter);
break;
#endif
#ifdef CONFIG_RTL8703B
case RTL8703B:
init_hal_spec_8703b(adapter);
break;
#endif
#ifdef CONFIG_RTL8723D
case RTL8723D:
init_hal_spec_8723d(adapter);
break;
#endif
#ifdef CONFIG_RTL8188E
case RTL8188E:
init_hal_spec_8188e(adapter);
break;
#endif
#ifdef CONFIG_RTL8188F
case RTL8188F:
init_hal_spec_8188f(adapter);
break;
#endif
#ifdef CONFIG_RTL8188GTV
case RTL8188GTV:
init_hal_spec_8188gtv(adapter);
break;
#endif
#ifdef CONFIG_RTL8812A
case RTL8812:
init_hal_spec_8812a(adapter);
@ -13930,36 +13642,11 @@ int hal_spec_init(_adapter *adapter)
init_hal_spec_8821a(adapter);
break;
#endif
#ifdef CONFIG_RTL8192E
case RTL8192E:
init_hal_spec_8192e(adapter);
break;
#endif
#ifdef CONFIG_RTL8814A
case RTL8814A:
init_hal_spec_8814a(adapter);
break;
#endif
#ifdef CONFIG_RTL8822B
case RTL8822B:
rtl8822b_init_hal_spec(adapter);
break;
#endif
#ifdef CONFIG_RTL8821C
case RTL8821C:
init_hal_spec_rtl8821c(adapter);
break;
#endif
#ifdef CONFIG_RTL8710B
case RTL8710B:
init_hal_spec_8710b(adapter);
break;
#endif
#ifdef CONFIG_RTL8192F
case RTL8192F:
init_hal_spec_8192f(adapter);
break;
#endif
default:
RTW_ERR("%s: unknown chip_type:%u\n"
@ -14296,10 +13983,6 @@ void hw_var_set_opmode_mbid(_adapter *Adapter, u8 mode)
else
rtw_hw_client_port_release(Adapter);
#endif
#if defined(CONFIG_RTL8192F)
rtw_write16(Adapter, REG_WLAN_ACT_MASK_CTRL_1, rtw_read16(Adapter,
REG_WLAN_ACT_MASK_CTRL_1) | EN_PORT_0_FUNCTION);
#endif
}
#endif
@ -14589,8 +14272,7 @@ void rtw_hal_switch_chnl_and_set_bw_offload(_adapter *adapter, u8 central_ch, u8
#endif /* RTW_CHANNEL_SWITCH_OFFLOAD */
#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8812A) ||\
defined(CONFIG_RTL8192F) || defined(CONFIG_RTL8192E) ||\
defined(CONFIG_RTL8822B) ||defined(CONFIG_RTL8821A)
defined(CONFIG_RTL8821A)
u8 phy_get_current_tx_num(
IN PADAPTER pAdapter,
IN u8 Rate

1
hal/hal_halmac.h
View File

@ -93,7 +93,6 @@ struct rtw_halmac_bcn_ctrl {
u8 tsf_update:1; /* Update TSF when beacon or probe response */
u8 enable_bcn:1; /* Enable beacon related functions */
u8 rxbcn_rpt:1; /* Enable RXBCNOK report */
u8 p2p_ctwin:1; /* Enable P2P CTN WINDOWS function */
u8 p2p_bcn_area:1; /* Enable P2P BCN area on function */
};

222
hal/hal_intf.c
View File

@ -20,20 +20,9 @@
const u32 _chip_type_to_odm_ic_type[] = {
0,
ODM_RTL8188E,
ODM_RTL8192E,
ODM_RTL8812,
ODM_RTL8821,
ODM_RTL8723B,
ODM_RTL8814A,
ODM_RTL8703B,
ODM_RTL8188F,
ODM_RTL8188F,
ODM_RTL8822B,
ODM_RTL8723D,
ODM_RTL8821C,
ODM_RTL8710B,
ODM_RTL8192F,
0,
};
@ -322,11 +311,6 @@ uint rtw_hal_init(_adapter *padapter)
#ifdef CONFIG_SUPPORT_MULTI_BCN
rtw_ap_multi_bcn_cfg(padapter);
#endif
#if (RTL8822B_SUPPORT == 1) || (RTL8192F_SUPPORT == 1)
#ifdef CONFIG_DYNAMIC_SOML
rtw_dyn_soml_config(padapter);
#endif
#endif
#ifdef CONFIG_TDMADIG
rtw_phydm_tdmadig(padapter, TDMADIG_INIT);
#endif/*CONFIG_TDMADIG*/
@ -374,11 +358,6 @@ uint rtw_hal_init(_adapter *padapter)
rtw_ap_multi_bcn_cfg(padapter);
#endif
#if (RTL8822B_SUPPORT == 1) || (RTL8192F_SUPPORT == 1)
#ifdef CONFIG_DYNAMIC_SOML
rtw_dyn_soml_config(padapter);
#endif
#endif
#ifdef CONFIG_TDMADIG
rtw_phydm_tdmadig(padapter, TDMADIG_INIT);
#endif/*CONFIG_TDMADIG*/
@ -391,7 +370,6 @@ uint rtw_hal_init(_adapter *padapter)
RTW_ERR("%s: fail\n", __func__);
}
return status;
}
@ -411,7 +389,6 @@ uint rtw_hal_deinit(_adapter *padapter)
} else
RTW_INFO("\n rtw_hal_deinit: hal_init fail\n");
return status;
}
@ -443,23 +420,6 @@ void rtw_hal_get_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID p
padapter->hal_func.GetHalODMVarHandler(padapter, eVariable, pValue1, pValue2);
}
/* FOR SDIO & PCIE */
void rtw_hal_enable_interrupt(_adapter *padapter)
{
#if defined(CONFIG_PCI_HCI) || defined(CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI)
padapter->hal_func.enable_interrupt(padapter);
#endif /* #if defined(CONFIG_PCI_HCI) || defined (CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI) */
}
/* FOR SDIO & PCIE */
void rtw_hal_disable_interrupt(_adapter *padapter)
{
#if defined(CONFIG_PCI_HCI) || defined(CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI)
padapter->hal_func.disable_interrupt(padapter);
#endif /* #if defined(CONFIG_PCI_HCI) || defined (CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI) */
}
u8 rtw_hal_check_ips_status(_adapter *padapter)
{
u8 val = _FALSE;
@ -498,13 +458,11 @@ s32 rtw_hal_fw_mem_dl(_adapter *padapter, enum fw_mem mem)
#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
void rtw_hal_clear_interrupt(_adapter *padapter)
{
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
padapter->hal_func.clear_interrupt(padapter);
#endif
/* fallthrough */
}
#endif
#if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI)
#if defined(CONFIG_USB_HCI)
u32 rtw_hal_inirp_init(_adapter *padapter)
{
if (is_primary_adapter(padapter))
@ -519,66 +477,7 @@ u32 rtw_hal_inirp_deinit(_adapter *padapter)
return _SUCCESS;
}
#endif /* #if defined(CONFIG_USB_HCI) || defined (CONFIG_PCI_HCI) */
#if defined(CONFIG_PCI_HCI)
void rtw_hal_irp_reset(_adapter *padapter)
{
padapter->hal_func.irp_reset(GET_PRIMARY_ADAPTER(padapter));
}
void rtw_hal_pci_dbi_write(_adapter *padapter, u16 addr, u8 data)
{
u16 cmd[2];
cmd[0] = addr;
cmd[1] = data;
padapter->hal_func.set_hw_reg_handler(padapter, HW_VAR_DBI, (u8 *) cmd);
}
u8 rtw_hal_pci_dbi_read(_adapter *padapter, u16 addr)
{
padapter->hal_func.GetHwRegHandler(padapter, HW_VAR_DBI, (u8 *)(&addr));
return (u8)addr;
}
void rtw_hal_pci_mdio_write(_adapter *padapter, u8 addr, u16 data)
{
u16 cmd[2];
cmd[0] = (u16)addr;
cmd[1] = data;
padapter->hal_func.set_hw_reg_handler(padapter, HW_VAR_MDIO, (u8 *) cmd);
}
u16 rtw_hal_pci_mdio_read(_adapter *padapter, u8 addr)
{
padapter->hal_func.GetHwRegHandler(padapter, HW_VAR_MDIO, &addr);
return (u8)addr;
}
u8 rtw_hal_pci_l1off_nic_support(_adapter *padapter)
{
u8 l1off;
padapter->hal_func.GetHwRegHandler(padapter, HW_VAR_L1OFF_NIC_SUPPORT, &l1off);
return l1off;
}
u8 rtw_hal_pci_l1off_capability(_adapter *padapter)
{
u8 l1off;
padapter->hal_func.GetHwRegHandler(padapter, HW_VAR_L1OFF_CAPABILITY, &l1off);
return l1off;
}
#endif /* #if defined(CONFIG_PCI_HCI) */
#endif /* #if defined(CONFIG_USB_HCI) */
/* for USB Auto-suspend */
u8 rtw_hal_intf_ps_func(_adapter *padapter, HAL_INTF_PS_FUNC efunc_id, u8 *val)
@ -682,22 +581,12 @@ void rtw_hal_update_ra_mask(struct sta_info *psta)
/* Start specifical interface thread */
void rtw_hal_start_thread(_adapter *padapter)
{
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
#ifndef CONFIG_SDIO_TX_TASKLET
padapter->hal_func.run_thread(padapter);
#endif
#endif
/* fallthrough */
}
/* Start specifical interface thread */
void rtw_hal_stop_thread(_adapter *padapter)
{
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
#ifndef CONFIG_SDIO_TX_TASKLET
padapter->hal_func.cancel_thread(padapter);
#endif
#endif
/* fallthrough */
}
u32 rtw_hal_read_bbreg(_adapter *padapter, u32 RegAddr, u32 BitMask)
@ -744,10 +633,6 @@ void rtw_hal_write_rfreg(_adapter *padapter, enum rf_path eRFPath, u32 RegAddr,
padapter->hal_func.write_rfreg(padapter, eRFPath, RegAddr, BitMask, Data);
#ifdef CONFIG_PCI_HCI
if (!IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(padapter)) /*For N-Series IC, suggest by Jenyu*/
rtw_udelay_os(2);
#endif
}
}
@ -768,25 +653,12 @@ void rtw_hal_write_syson_reg(_adapter *padapter, u32 RegAddr, u32 BitMask, u32 D
}
#endif
#if defined(CONFIG_PCI_HCI)
s32 rtw_hal_interrupt_handler(_adapter *padapter)
{
s32 ret = _FAIL;
ret = padapter->hal_func.interrupt_handler(padapter);
return ret;
}
void rtw_hal_unmap_beacon_icf(_adapter *padapter)
{
padapter->hal_func.unmap_beacon_icf(padapter);
}
#endif
#if defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT)
/*
void rtw_hal_interrupt_handler(_adapter *padapter, u16 pkt_len, u8 *pbuf)
{
padapter->hal_func.interrupt_handler(padapter, pkt_len, pbuf);
}
#endif
*/
void rtw_hal_set_chnl_bw(_adapter *padapter, u8 channel, enum channel_width Bandwidth, u8 Offset40, u8 Offset80)
{
@ -1003,9 +875,6 @@ exit:
}
#endif /* CONFIG_FW_C2H_PKT */
#if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_RTL8723B)
#include <rtw_bt_mp.h> /* for MPTBT_FwC2hBtMpCtrl */
#endif
s32 c2h_handler(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload)
{
u8 sub_id = 0;
@ -1020,15 +889,15 @@ s32 c2h_handler(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload)
case C2H_BT_INFO:
rtw_btcoex_BtInfoNotify(adapter, plen, payload);
break;
case C2H_BT_MP_INFO:
#if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_RTL8723B)
MPTBT_FwC2hBtMpCtrl(adapter, payload, plen);
#endif
rtw_btcoex_BtMpRptNotify(adapter, plen, payload);
break;
case C2H_MAILBOX_STATUS:
RTW_DBG_DUMP("C2H_MAILBOX_STATUS: ", payload, plen);
break;
case C2H_WLAN_INFO:
rtw_btcoex_WlFwDbgInfoNotify(adapter, payload, plen);
break;
@ -1042,6 +911,7 @@ s32 c2h_handler(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload)
case C2H_FW_CHNL_SWITCH_COMPLETE:
rtw_tdls_chsw_oper_done(adapter);
break;
case C2H_BCN_EARLY_RPT:
rtw_tdls_ch_sw_back_to_base_chnl(adapter);
break;
@ -1057,6 +927,7 @@ s32 c2h_handler(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload)
case C2H_MAC_HIDDEN_RPT:
c2h_mac_hidden_rpt_hdl(adapter, payload, plen);
break;
case C2H_MAC_HIDDEN_RPT_2:
c2h_mac_hidden_rpt_2_hdl(adapter, payload, plen);
break;
@ -1070,18 +941,23 @@ s32 c2h_handler(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload)
case C2H_CUSTOMER_STR_RPT:
c2h_customer_str_rpt_hdl(adapter, payload, plen);
break;
case C2H_CUSTOMER_STR_RPT_2:
c2h_customer_str_rpt_2_hdl(adapter, payload, plen);
break;
#endif
#ifdef RTW_PER_CMD_SUPPORT_FW
case C2H_PER_RATE_RPT:
c2h_per_rate_rpt_hdl(adapter, payload, plen);
break;
#endif
case C2H_EXTEND:
sub_id = payload[0];
break;
/* no handle, goto default */
default:
if (phydm_c2H_content_parsing(adapter_to_phydm(adapter), id, plen, payload) != TRUE)
ret = _FAIL;
@ -1413,7 +1289,7 @@ bool rtw_hal_rfkill_poll(_adapter *adapter, u8 *valid)
u8 rtw_hal_ops_check(_adapter *padapter)
{
u8 ret = _SUCCESS;
#if 1
// kimocoder: #if 1
/*** initialize section ***/
if (NULL == padapter->hal_func.read_chip_version) {
rtw_hal_error_msg("read_chip_version");
@ -1477,18 +1353,6 @@ u8 rtw_hal_ops_check(_adapter *padapter)
rtw_hal_error_msg("hal_xmitframe_enqueue");
ret = _FAIL;
}
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
#ifndef CONFIG_SDIO_TX_TASKLET
if (NULL == padapter->hal_func.run_thread) {
rtw_hal_error_msg("run_thread");
ret = _FAIL;
}
if (NULL == padapter->hal_func.cancel_thread) {
rtw_hal_error_msg("cancel_thread");
ret = _FAIL;
}
#endif
#endif
/*** recv section ***/
if (NULL == padapter->hal_func.init_recv_priv) {
@ -1505,43 +1369,12 @@ u8 rtw_hal_ops_check(_adapter *padapter)
ret = _FAIL;
}
#endif
#if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI)
if (NULL == padapter->hal_func.inirp_init) {
rtw_hal_error_msg("inirp_init");
ret = _FAIL;
}
if (NULL == padapter->hal_func.inirp_deinit) {
rtw_hal_error_msg("inirp_deinit");
ret = _FAIL;
}
#endif /* #if defined(CONFIG_USB_HCI) || defined (CONFIG_PCI_HCI) */
/*** interrupt hdl section ***/
#if defined(CONFIG_PCI_HCI)
if (NULL == padapter->hal_func.irp_reset) {
rtw_hal_error_msg("irp_reset");
ret = _FAIL;
}
#endif/*#if defined(CONFIG_PCI_HCI)*/
#if (defined(CONFIG_PCI_HCI)) || (defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT))
if (NULL == padapter->hal_func.interrupt_handler) {
/* if (NULL == padapter->hal_func.interrupt_handler) {
rtw_hal_error_msg("interrupt_handler");
ret = _FAIL;
}
#endif /*#if (defined(CONFIG_PCI_HCI)) || (defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT))*/
#if defined(CONFIG_PCI_HCI) || defined(CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI)
if (NULL == padapter->hal_func.enable_interrupt) {
rtw_hal_error_msg("enable_interrupt");
ret = _FAIL;
}
if (NULL == padapter->hal_func.disable_interrupt) {
rtw_hal_error_msg("disable_interrupt");
ret = _FAIL;
}
#endif /* defined(CONFIG_PCI_HCI) || defined (CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI) */
} */
/*** DM section ***/
if (NULL == padapter->hal_func.dm_init) {
@ -1603,12 +1436,6 @@ u8 rtw_hal_ops_check(_adapter *padapter)
rtw_hal_error_msg("hal_mac_c2h_handler");
ret = _FAIL;
}
#elif !defined(CONFIG_RTL8188E)
if (NULL == padapter->hal_func.c2h_handler) {
rtw_hal_error_msg("c2h_handler");
ret = _FAIL;
}
#endif
#if defined(CONFIG_LPS) || defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
if (NULL == padapter->hal_func.fill_fake_txdesc) {
@ -1624,15 +1451,6 @@ u8 rtw_hal_ops_check(_adapter *padapter)
}
#endif /* !RTW_HALMAC */
#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
if (NULL == padapter->hal_func.clear_interrupt) {
rtw_hal_error_msg("clear_interrupt");
ret = _FAIL;
}
#endif
#endif /* CONFIG_WOWLAN */
if (NULL == padapter->hal_func.fw_dl) {
rtw_hal_error_msg("fw_dl");
ret = _FAIL;

527
hal/phydm/halrf/rtl8814a/halrf_8814a_ap.c
View File

@ -308,12 +308,7 @@ void ConfigureTxpowerTrack_8814A(
pConfig->GetDeltaSwingTable8814only = GetDeltaSwingTable_8814A_PathCD;
}
//1 7. IQK
//
// 2011/07/26 MH Add an API for testing IQK fail case.
//
@ -366,12 +361,6 @@ VOID
u4Byte i;
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
PDM_ODM_T pDM_Odm = &pHalData->odmpriv;
#endif
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc;
#endif
if (ODM_CheckPowerStatus(pAdapter) == FALSE)
return;
@ -383,7 +372,6 @@ VOID
}
}
VOID
_PHY_SaveMACRegisters_8814A(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
@ -398,19 +386,12 @@ VOID
u4Byte i;
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
PDM_ODM_T pDM_Odm = &pHalData->odmpriv;
#endif
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc;
#endif
#endif
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Save MAC parameters.\n"));
for( i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++){
MACBackup[i] = ODM_Read1Byte(pDM_Odm, MACReg[i]);
}
MACBackup[i] = ODM_Read4Byte(pDM_Odm, MACReg[i]);
}
@ -429,12 +410,6 @@ VOID
u4Byte i;
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
PDM_ODM_T pDM_Odm = &pHalData->odmpriv;
#endif
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc;
#endif
#endif
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Reload ADDA power saving parameters !\n"));
@ -458,12 +433,6 @@ VOID
u4Byte i;
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
PDM_ODM_T pDM_Odm = &pHalData->odmpriv;
#endif
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc;
#endif
#endif
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Reload MAC parameters !\n"));
for(i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++){
@ -472,8 +441,6 @@ VOID
ODM_Write4Byte(pDM_Odm, MACReg[i], MACBackup[i]);
}
VOID
_PHY_MACSettingCalibration_8814A(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
@ -488,12 +455,6 @@ VOID
u4Byte i = 0;
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
PDM_ODM_T pDM_Odm = &pHalData->odmpriv;
#endif
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc;
#endif
#endif
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("MAC settings for Calibration.\n"));
@ -575,12 +536,6 @@ VOID
{
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
PDM_ODM_T pDM_Odm = &pHalData->odmpriv;
#endif
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc;
#endif
#endif
u4Byte regD[PATH_NUM];
u4Byte tmpReg, index, offset, apkbound;
@ -676,14 +631,9 @@ VOID
s4Byte BB_offset, delta_V, delta_offset;
#if defined(MP_DRIVER) && (MP_DRIVER == 1)
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx);
#else
PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx);
#endif
pMptCtx->APK_bound[0] = 45;
pMptCtx->APK_bound[1] = 52;
#endif
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("==>phy_APCalibrate_8814A() delta %d\n", delta));
@ -744,7 +694,6 @@ VOID
for(path = 0; path < pathbound; path++)
{
if(path == RF_PATH_A)
{
//path A APK
@ -1034,11 +983,6 @@ VOID
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("<==phy_APCalibrate_8814A()\n"));
}
VOID
PHY_LCCalibrate_8814A(
IN PDM_ODM_T pDM_Odm
@ -1061,12 +1005,6 @@ VOID
{
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
PDM_ODM_T pDM_Odm = &pHalData->odmpriv;
#endif
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc;
#endif
#endif
#ifdef DISABLE_BB_RF
return;
@ -1112,17 +1050,6 @@ VOID
{
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
PDM_ODM_T pDM_Odm = &pHalData->odmpriv;
#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN)
PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc;
#endif
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
if(!pAdapter->bHWInitReady)
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
if(pAdapter->hw_init_completed == _FALSE)
#endif
{
u1Byte u1bTmp;
u1bTmp = ODM_Read1Byte(pDM_Odm, REG_LEDCFG2) | BIT7;
@ -1190,443 +1117,6 @@ VOID
#define DP_DPK_VALUE_NUM 2
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
//digital predistortion
VOID
phy_DigitalPredistortion_8814A(
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
IN PADAPTER pAdapter,
#else
IN PDM_ODM_T pDM_Odm,
#endif
IN BOOLEAN is2T
)
{
#if (RT_PLATFORM == PLATFORM_WINDOWS)
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
PDM_ODM_T pDM_Odm = &pHalData->odmpriv;
#endif
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc;
#endif
#endif
u4Byte tmpReg, tmpReg2, index, i;
u1Byte path, pathbound = PATH_NUM;
u4Byte AFE_backup[IQK_ADDA_REG_NUM];
u4Byte AFE_REG[IQK_ADDA_REG_NUM] = {
rFPGA0_XCD_SwitchControl, rBlue_Tooth,
rRx_Wait_CCA, rTx_CCK_RFON,
rTx_CCK_BBON, rTx_OFDM_RFON,
rTx_OFDM_BBON, rTx_To_Rx,
rTx_To_Tx, rRx_CCK,
rRx_OFDM, rRx_Wait_RIFS,
rRx_TO_Rx, rStandby,
rSleep, rPMPD_ANAEN };
u4Byte BB_backup[DP_BB_REG_NUM];
u4Byte BB_REG[DP_BB_REG_NUM] = {
rOFDM0_TRxPathEnable, rFPGA0_RFMOD,
rOFDM0_TRMuxPar, rFPGA0_XCD_RFInterfaceSW,
rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE,
rFPGA0_XB_RFInterfaceOE};
u4Byte BB_settings[DP_BB_REG_NUM] = {
0x00a05430, 0x02040000, 0x000800e4, 0x22208000,
0x0, 0x0, 0x0};
u4Byte RF_backup[DP_PATH_NUM][DP_RF_REG_NUM];
u4Byte RF_REG[DP_RF_REG_NUM] = {
RF_TXBIAS_A};
u4Byte MAC_backup[IQK_MAC_REG_NUM];
u4Byte MAC_REG[IQK_MAC_REG_NUM] = {
REG_TXPAUSE, REG_BCN_CTRL,
REG_BCN_CTRL_1, REG_GPIO_MUXCFG};
u4Byte Tx_AGC[DP_DPK_NUM][DP_DPK_VALUE_NUM] = {
{0x1e1e1e1e, 0x03901e1e},
{0x18181818, 0x03901818},
{0x0e0e0e0e, 0x03900e0e}
};
u4Byte AFE_on_off[PATH_NUM] = {
0x04db25a4, 0x0b1b25a4}; //path A on path B off / path A off path B on
u1Byte RetryCount = 0;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("==>phy_DigitalPredistortion_8814A()\n"));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_DigitalPredistortion_8814A for %s %s\n", (is2T ? "2T2R" : "1T1R")));
//save BB default value
for(index=0; index<DP_BB_REG_NUM; index++)
BB_backup[index] = ODM_GetBBReg(pDM_Odm, BB_REG[index], bMaskDWord);
//save MAC default value
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
_PHY_SaveMACRegisters_8814A(pAdapter, BB_REG, MAC_backup);
#else
_PHY_SaveMACRegisters_8814A(pDM_Odm, BB_REG, MAC_backup);
#endif
//save RF default value
for(path=0; path<DP_PATH_NUM; path++)
{
for(index=0; index<DP_RF_REG_NUM; index++)
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
RF_backup[path][index] = PHY_QueryRFReg(pAdapter, path, RF_REG[index], bMaskDWord);
#else
RF_backup[path][index] = ODM_GetRFReg(pAdapter, path, RF_REG[index], bMaskDWord);
#endif
}
//save AFE default value
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
_PHY_SaveADDARegisters_8814A(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM);
#else
RF_backup[path][index] = ODM_GetRFReg(pAdapter, path, RF_REG[index], bMaskDWord);
#endif
//Path A/B AFE all on
for(index = 0; index < IQK_ADDA_REG_NUM ; index++)
ODM_SetBBReg(pDM_Odm, AFE_REG[index], bMaskDWord, 0x6fdb25a4);
//BB register setting
for(index = 0; index < DP_BB_REG_NUM; index++)
{
if(index < 4)
ODM_SetBBReg(pDM_Odm, BB_REG[index], bMaskDWord, BB_settings[index]);
else if (index == 4)
ODM_SetBBReg(pDM_Odm,BB_REG[index], bMaskDWord, BB_backup[index]|BIT10|BIT26);
else
ODM_SetBBReg(pDM_Odm, BB_REG[index], BIT10, 0x00);
}
//MAC register setting
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
_PHY_MACSettingCalibration_8814A(pAdapter, MAC_REG, MAC_backup);
#else
_PHY_MACSettingCalibration_8814A(pDM_Odm, MAC_REG, MAC_backup);
#endif
//PAGE-E IQC setting
ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00);
ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00);
ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_B, bMaskDWord, 0x01008c00);
ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_B, bMaskDWord, 0x01008c00);
//path_A DPK
//Path B to standby mode
ODM_SetRFReg(pDM_Odm, RF_PATH_B, RF_AC, bMaskDWord, 0x10000);
// PA gain = 11 & PAD1 => tx_agc 1f ~11
// PA gain = 11 & PAD2 => tx_agc 10~0e
// PA gain = 01 => tx_agc 0b~0d
// PA gain = 00 => tx_agc 0a~00
ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x40000000);
ODM_SetBBReg(pDM_Odm, 0xbc0, bMaskDWord, 0x0005361f);
ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000);
//do inner loopback DPK 3 times
for(i = 0; i < 3; i++)
{
//PA gain = 11 & PAD2 => tx_agc = 0x0f/0x0c/0x07
for(index = 0; index < 3; index++)
ODM_SetBBReg(pDM_Odm, 0xe00+index*4, bMaskDWord, Tx_AGC[i][0]);
ODM_SetBBReg(pDM_Odm,0xe00+index*4, bMaskDWord, Tx_AGC[i][1]);
for(index = 0; index < 4; index++)
ODM_SetBBReg(pDM_Odm,0xe10+index*4, bMaskDWord, Tx_AGC[i][0]);
// PAGE_B for Path-A inner loopback DPK setting
ODM_SetBBReg(pDM_Odm,rPdp_AntA, bMaskDWord, 0x02097098);
ODM_SetBBReg(pDM_Odm,rPdp_AntA_4, bMaskDWord, 0xf76d9f84);
ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x0004ab87);
ODM_SetBBReg(pDM_Odm,rConfig_AntA, bMaskDWord, 0x00880000);
//----send one shot signal----//
// Path A
ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x80047788);
ODM_delay_ms(1);
ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x00047788);
ODM_delay_ms(50);
}
//PA gain = 11 => tx_agc = 1a
for(index = 0; index < 3; index++)
ODM_SetBBReg(pDM_Odm,0xe00+index*4, bMaskDWord, 0x34343434);
ODM_SetBBReg(pDM_Odm,0xe08+index*4, bMaskDWord, 0x03903434);
for(index = 0; index < 4; index++)
ODM_SetBBReg(pDM_Odm,0xe10+index*4, bMaskDWord, 0x34343434);
//====================================
// PAGE_B for Path-A DPK setting
//====================================
// open inner loopback @ b00[19]:10 od 0xb00 0x01097018
ODM_SetBBReg(pDM_Odm,rPdp_AntA, bMaskDWord, 0x02017098);
ODM_SetBBReg(pDM_Odm,rPdp_AntA_4, bMaskDWord, 0xf76d9f84);
ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x0004ab87);
ODM_SetBBReg(pDM_Odm,rConfig_AntA, bMaskDWord, 0x00880000);
//rf_lpbk_setup
//1.rf 00:5205a, rf 0d:0e52c
ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x0c, bMaskDWord, 0x8992b);
ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x0d, bMaskDWord, 0x0e52c);
ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x00, bMaskDWord, 0x5205a );
//----send one shot signal----//
// Path A
ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x800477c0);
ODM_delay_ms(1);
ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x000477c0);
ODM_delay_ms(50);
while(RetryCount < DP_RETRY_LIMIT && !pDM_Odm->RFCalibrateInfo.bDPPathAOK)
{
//----read back measurement results----//
ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x0c297018);
tmpReg = ODM_GetBBReg(pDM_Odm, 0xbe0, bMaskDWord);
ODM_delay_ms(10);
ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x0c29701f);
tmpReg2 = ODM_GetBBReg(pDM_Odm, 0xbe8, bMaskDWord);
ODM_delay_ms(10);
tmpReg = (tmpReg & bMaskHWord) >> 16;
tmpReg2 = (tmpReg2 & bMaskHWord) >> 16;
if(tmpReg < 0xf0 || tmpReg > 0x105 || tmpReg2 > 0xff )
{
ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x02017098);
ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x80000000);
ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000);
ODM_delay_ms(1);
ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x800477c0);
ODM_delay_ms(1);
ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x000477c0);
ODM_delay_ms(50);
RetryCount++;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path A DPK RetryCount %d 0xbe0[31:16] %x 0xbe8[31:16] %x\n", RetryCount, tmpReg, tmpReg2));
}
else
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path A DPK Sucess\n"));
pDM_Odm->RFCalibrateInfo.bDPPathAOK = TRUE;
break;
}
}
RetryCount = 0;
//DPP path A
if(pDM_Odm->RFCalibrateInfo.bDPPathAOK)
{
// DP settings
ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x01017098);
ODM_SetBBReg(pDM_Odm, rPdp_AntA_4, bMaskDWord, 0x776d9f84);
ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x0004ab87);
ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x00880000);
ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x40000000);
for(i=rPdp_AntA; i<=0xb3c; i+=4)
{
ODM_SetBBReg(pDM_Odm, i, bMaskDWord, 0x40004000);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path A ofsset = 0x%x\n", i));
}
//pwsf
ODM_SetBBReg(pDM_Odm, 0xb40, bMaskDWord, 0x40404040);
ODM_SetBBReg(pDM_Odm, 0xb44, bMaskDWord, 0x28324040);
ODM_SetBBReg(pDM_Odm, 0xb48, bMaskDWord, 0x10141920);
for(i=0xb4c; i<=0xb5c; i+=4)
{
ODM_SetBBReg(pDM_Odm, i, bMaskDWord, 0x0c0c0c0c);
}
//TX_AGC boundary
ODM_SetBBReg(pDM_Odm, 0xbc0, bMaskDWord, 0x0005361f);
ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000);
}
else
{
ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x00000000);
ODM_SetBBReg(pDM_Odm, rPdp_AntA_4, bMaskDWord, 0x00000000);
}
//DPK path B
if(is2T)
{
//Path A to standby mode
ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_AC, bMaskDWord, 0x10000);
// LUTs => tx_agc
// PA gain = 11 & PAD1, => tx_agc 1f ~11
// PA gain = 11 & PAD2, => tx_agc 10 ~0e
// PA gain = 01 => tx_agc 0b ~0d
// PA gain = 00 => tx_agc 0a ~00
ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x40000000);
ODM_SetBBReg(pDM_Odm, 0xbc4, bMaskDWord, 0x0005361f);
ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000);
//do inner loopback DPK 3 times
for(i = 0; i < 3; i++)
{
//PA gain = 11 & PAD2 => tx_agc = 0x0f/0x0c/0x07
for(index = 0; index < 4; index++)
ODM_SetBBReg(pDM_Odm, 0x830+index*4, bMaskDWord, Tx_AGC[i][0]);
for(index = 0; index < 2; index++)
ODM_SetBBReg(pDM_Odm, 0x848+index*4, bMaskDWord, Tx_AGC[i][0]);
for(index = 0; index < 2; index++)
ODM_SetBBReg(pDM_Odm, 0x868+index*4, bMaskDWord, Tx_AGC[i][0]);
// PAGE_B for Path-A inner loopback DPK setting
ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x02097098);
ODM_SetBBReg(pDM_Odm, rPdp_AntB_4, bMaskDWord, 0xf76d9f84);
ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x0004ab87);
ODM_SetBBReg(pDM_Odm, rConfig_AntB, bMaskDWord, 0x00880000);
//----send one shot signal----//
// Path B
ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntB, bMaskDWord, 0x80047788);
ODM_delay_ms(1);
ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x00047788);
ODM_delay_ms(50);
}
// PA gain = 11 => tx_agc = 1a
for(index = 0; index < 4; index++)
ODM_SetBBReg(pDM_Odm, 0x830+index*4, bMaskDWord, 0x34343434);
for(index = 0; index < 2; index++)
ODM_SetBBReg(pDM_Odm, 0x848+index*4, bMaskDWord, 0x34343434);
for(index = 0; index < 2; index++)
ODM_SetBBReg(pDM_Odm, 0x868+index*4, bMaskDWord, 0x34343434);
// PAGE_B for Path-B DPK setting
ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x02017098);
ODM_SetBBReg(pDM_Odm, rPdp_AntB_4, bMaskDWord, 0xf76d9f84);
ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x0004ab87);
ODM_SetBBReg(pDM_Odm, rConfig_AntB, bMaskDWord, 0x00880000);
// RF lpbk switches on
ODM_SetBBReg(pDM_Odm, 0x840, bMaskDWord, 0x0101000f);
ODM_SetBBReg(pDM_Odm, 0x840, bMaskDWord, 0x01120103);
//Path-B RF lpbk
ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x0c, bMaskDWord, 0x8992b);
ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x0d, bMaskDWord, 0x0e52c);
ODM_SetRFReg(pDM_Odm, RF_PATH_B, RF_AC, bMaskDWord, 0x5205a);
//----send one shot signal----//
ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x800477c0);
ODM_delay_ms(1);
ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x000477c0);
ODM_delay_ms(50);
while(RetryCount < DP_RETRY_LIMIT && !pDM_Odm->RFCalibrateInfo.bDPPathBOK)
{
//----read back measurement results----//
ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x0c297018);
tmpReg = ODM_GetBBReg(pDM_Odm, 0xbf0, bMaskDWord);
ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x0c29701f);
tmpReg2 = ODM_GetBBReg(pDM_Odm, 0xbf8, bMaskDWord);
tmpReg = (tmpReg & bMaskHWord) >> 16;
tmpReg2 = (tmpReg2 & bMaskHWord) >> 16;
if(tmpReg < 0xf0 || tmpReg > 0x105 || tmpReg2 > 0xff)
{
ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x02017098);
ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x80000000);
ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000);
ODM_delay_ms(1);
ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x800477c0);
ODM_delay_ms(1);
ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x000477c0);
ODM_delay_ms(50);
RetryCount++;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path B DPK RetryCount %d 0xbf0[31:16] %x, 0xbf8[31:16] %x\n", RetryCount , tmpReg, tmpReg2));
}
else
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path B DPK Success\n"));
pDM_Odm->RFCalibrateInfo.bDPPathBOK = TRUE;
break;
}
}
//DPP path B
if(pDM_Odm->RFCalibrateInfo.bDPPathBOK)
{
// DP setting
// LUT by SRAM
ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x01017098);
ODM_SetBBReg(pDM_Odm, rPdp_AntB_4, bMaskDWord, 0x776d9f84);
ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x0004ab87);
ODM_SetBBReg(pDM_Odm, rConfig_AntB, bMaskDWord, 0x00880000);
ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x40000000);
for(i=0xb60; i<=0xb9c; i+=4)
{
ODM_SetBBReg(pDM_Odm, i, bMaskDWord, 0x40004000);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path B ofsset = 0x%x\n", i));
}
// PWSF
ODM_SetBBReg(pDM_Odm, 0xba0, bMaskDWord, 0x40404040);
ODM_SetBBReg(pDM_Odm, 0xba4, bMaskDWord, 0x28324050);
ODM_SetBBReg(pDM_Odm, 0xba8, bMaskDWord, 0x0c141920);
for(i=0xbac; i<=0xbbc; i+=4)
{
ODM_SetBBReg(pDM_Odm, i, bMaskDWord, 0x0c0c0c0c);
}
// tx_agc boundary
ODM_SetBBReg(pDM_Odm, 0xbc4, bMaskDWord, 0x0005361f);
ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000);
}
else
{
ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x00000000);
ODM_SetBBReg(pDM_Odm, rPdp_AntB_4, bMaskDWord, 0x00000000);
}
}
//reload BB default value
for(index=0; index<DP_BB_REG_NUM; index++)
ODM_SetBBReg(pDM_Odm, BB_REG[index], bMaskDWord, BB_backup[index]);
//reload RF default value
for(path = 0; path<DP_PATH_NUM; path++)
{
for( i = 0 ; i < DP_RF_REG_NUM ; i++){
ODM_SetRFReg(pDM_Odm, path, RF_REG[i], bMaskDWord, RF_backup[path][i]);
}
}
ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_MODE1, bMaskDWord, 0x1000f); //standby mode
ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_MODE2, bMaskDWord, 0x20101); //RF lpbk switches off
//reload AFE default value
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
_PHY_ReloadADDARegisters_8814A(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM);
//reload MAC default value
_PHY_ReloadMACRegisters_8814A(pAdapter, MAC_REG, MAC_backup);
#else
_PHY_ReloadADDARegisters_8814A(pDM_Odm, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM);
//reload MAC default value
_PHY_ReloadMACRegisters_8814A(pDM_Odm, MAC_REG, MAC_backup);
#endif
pDM_Odm->RFCalibrateInfo.bDPdone = TRUE;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("<==phy_DigitalPredistortion_8814A()\n"));
#endif
}
VOID
phy_DigitalPredistortion_8814A_8814A(
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
@ -1638,12 +1128,6 @@ VOID
{
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
PDM_ODM_T pDM_Odm = &pHalData->odmpriv;
#endif
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc;
#endif
#endif
#if DISABLE_BB_RF
return;
@ -1666,8 +1150,6 @@ VOID
}
}
//return value TRUE => Main; FALSE => Aux
BOOLEAN phy_QueryRFPathSwitch_8814A(
@ -1681,12 +1163,6 @@ VOID
{
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
PDM_ODM_T pDM_Odm = &pHalData->odmpriv;
#endif
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc;
#endif
#endif
if(!pAdapter->bHWInitReady)
{
@ -1714,8 +1190,6 @@ VOID
}
}
//return value TRUE => Main; FALSE => Aux
BOOLEAN PHY_QueryRFPathSwitch_8814A(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
@ -1749,4 +1223,3 @@ VOID
}
#endif

80
hal/phydm/rtl8812a/halhwimg8812a_bb.c
View File

@ -110,15 +110,6 @@ check_positive(
} else
return false;
}
static boolean
check_negative(
struct dm_struct *dm,
const u32 condition1,
const u32 condition2
)
{
return true;
}
/******************************************************************************
* agc_tab.TXT
@ -1065,14 +1056,6 @@ odm_read_and_config_mp_8812a_phy_reg_pg(struct dm_struct *dm)
u32 array_len = sizeof(array_mp_8812a_phy_reg_pg) / sizeof(u32);
u32 *array = array_mp_8812a_phy_reg_pg;
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
void *adapter = dm->adapter;
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
PlatformZeroMemory(hal_data->BufOfLinesPwrByRate, MAX_LINES_HWCONFIG_TXT * MAX_BYTES_LINE_HWCONFIG_TXT);
hal_data->nLinesReadPwrByRate = array_len / 6;
#endif
PHYDM_DBG(dm, ODM_COMP_INIT, "===> %s\n", __func__);
dm->phy_reg_pg_version = 1;
@ -1088,15 +1071,9 @@ odm_read_and_config_mp_8812a_phy_reg_pg(struct dm_struct *dm)
odm_config_bb_phy_reg_pg_8812a(dm, v1, v2, v3, v4, v5, v6);
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
rsprintf((char *)hal_data->BufOfLinesPwrByRate[i / 6], 100, "%s, %s, %s, 0x%X, 0x%08X, 0x%08X,",
(v1 == 0 ? "2.4G" : " 5G"), (v2 == 0 ? "A" : "B"), (v3 == 0 ? "1Tx" : "2Tx"), v4, v5, v6);
#endif
}
}
/******************************************************************************
* phy_reg_pg_asus.TXT
******************************************************************************/
@ -1157,14 +1134,6 @@ odm_read_and_config_mp_8812a_phy_reg_pg_asus(struct dm_struct *dm)
u32 array_len = sizeof(array_mp_8812a_phy_reg_pg_asus) / sizeof(u32);
u32 *array = array_mp_8812a_phy_reg_pg_asus;
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
void *adapter = dm->adapter;
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
PlatformZeroMemory(hal_data->BufOfLinesPwrByRate, MAX_LINES_HWCONFIG_TXT * MAX_BYTES_LINE_HWCONFIG_TXT);
hal_data->nLinesReadPwrByRate = array_len / 6;
#endif
PHYDM_DBG(dm, ODM_COMP_INIT, "===> %s\n", __func__);
dm->phy_reg_pg_version = 1;
@ -1180,15 +1149,9 @@ odm_read_and_config_mp_8812a_phy_reg_pg_asus(struct dm_struct *dm)
odm_config_bb_phy_reg_pg_8812a(dm, v1, v2, v3, v4, v5, v6);
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
rsprintf((char *)hal_data->BufOfLinesPwrByRate[i / 6], 100, "%s, %s, %s, 0x%X, 0x%08X, 0x%08X,",
(v1 == 0 ? "2.4G" : " 5G"), (v2 == 0 ? "A" : "B"), (v3 == 0 ? "1Tx" : "2Tx"), v4, v5, v6);
#endif
}
}
/******************************************************************************
* phy_reg_pg_dni.TXT
******************************************************************************/
@ -1249,14 +1212,6 @@ odm_read_and_config_mp_8812a_phy_reg_pg_dni(struct dm_struct *dm)
u32 array_len = sizeof(array_mp_8812a_phy_reg_pg_dni) / sizeof(u32);
u32 *array = array_mp_8812a_phy_reg_pg_dni;
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
void *adapter = dm->adapter;
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
PlatformZeroMemory(hal_data->BufOfLinesPwrByRate, MAX_LINES_HWCONFIG_TXT * MAX_BYTES_LINE_HWCONFIG_TXT);
hal_data->nLinesReadPwrByRate = array_len / 6;
#endif
PHYDM_DBG(dm, ODM_COMP_INIT, "===> %s\n", __func__);
dm->phy_reg_pg_version = 1;
@ -1272,15 +1227,9 @@ odm_read_and_config_mp_8812a_phy_reg_pg_dni(struct dm_struct *dm)
odm_config_bb_phy_reg_pg_8812a(dm, v1, v2, v3, v4, v5, v6);
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
rsprintf((char *)hal_data->BufOfLinesPwrByRate[i / 6], 100, "%s, %s, %s, 0x%X, 0x%08X, 0x%08X,",
(v1 == 0 ? "2.4G" : " 5G"), (v2 == 0 ? "A" : "B"), (v3 == 0 ? "1Tx" : "2Tx"), v4, v5, v6);
#endif
}
}
/******************************************************************************
* phy_reg_pg_nec.TXT
******************************************************************************/
@ -1341,14 +1290,6 @@ odm_read_and_config_mp_8812a_phy_reg_pg_nec(struct dm_struct *dm)
u32 array_len = sizeof(array_mp_8812a_phy_reg_pg_nec) / sizeof(u32);
u32 *array = array_mp_8812a_phy_reg_pg_nec;
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
void *adapter = dm->adapter;
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
PlatformZeroMemory(hal_data->BufOfLinesPwrByRate, MAX_LINES_HWCONFIG_TXT * MAX_BYTES_LINE_HWCONFIG_TXT);
hal_data->nLinesReadPwrByRate = array_len / 6;
#endif
PHYDM_DBG(dm, ODM_COMP_INIT, "===> %s\n", __func__);
dm->phy_reg_pg_version = 1;
@ -1364,15 +1305,9 @@ odm_read_and_config_mp_8812a_phy_reg_pg_nec(struct dm_struct *dm)
odm_config_bb_phy_reg_pg_8812a(dm, v1, v2, v3, v4, v5, v6);
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
rsprintf((char *)hal_data->BufOfLinesPwrByRate[i / 6], 100, "%s, %s, %s, 0x%X, 0x%08X, 0x%08X,",
(v1 == 0 ? "2.4G" : " 5G"), (v2 == 0 ? "A" : "B"), (v3 == 0 ? "1Tx" : "2Tx"), v4, v5, v6);
#endif
}
}
/******************************************************************************
* phy_reg_pg_tplink.TXT
******************************************************************************/
@ -1433,14 +1368,6 @@ odm_read_and_config_mp_8812a_phy_reg_pg_tplink(struct dm_struct *dm)
u32 array_len = sizeof(array_mp_8812a_phy_reg_pg_tplink) / sizeof(u32);
u32 *array = array_mp_8812a_phy_reg_pg_tplink;
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
void *adapter = dm->adapter;
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
PlatformZeroMemory(hal_data->BufOfLinesPwrByRate, MAX_LINES_HWCONFIG_TXT * MAX_BYTES_LINE_HWCONFIG_TXT);
hal_data->nLinesReadPwrByRate = array_len / 6;
#endif
PHYDM_DBG(dm, ODM_COMP_INIT, "===> %s\n", __func__);
dm->phy_reg_pg_version = 1;
@ -1455,15 +1382,8 @@ odm_read_and_config_mp_8812a_phy_reg_pg_tplink(struct dm_struct *dm)
u32 v6 = array[i + 5];
odm_config_bb_phy_reg_pg_8812a(dm, v1, v2, v3, v4, v5, v6);
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
rsprintf((char *)hal_data->BufOfLinesPwrByRate[i / 6], 100, "%s, %s, %s, 0x%X, 0x%08X, 0x%08X,",
(v1 == 0 ? "2.4G" : " 5G"), (v2 == 0 ? "A" : "B"), (v3 == 0 ? "1Tx" : "2Tx"), v4, v5, v6);
#endif
}
}
#endif /* end of HWIMG_SUPPORT*/

9
hal/phydm/rtl8812a/halhwimg8812a_mac.c
View File

@ -110,15 +110,6 @@ check_positive(
} else
return false;
}
static boolean
check_negative(
struct dm_struct *dm,
const u32 condition1,
const u32 condition2
)
{
return true;
}
/******************************************************************************
* mac_reg.TXT

9
hal/phydm/rtl8812a/halhwimg8812a_rf.c
View File

@ -110,15 +110,6 @@ check_positive(
} else
return false;
}
static boolean
check_negative(
struct dm_struct *dm,
const u32 condition1,
const u32 condition2
)
{
return true;
}
/******************************************************************************
* radioa.TXT

9
hal/phydm/rtl8814a/halhwimg8814a_bb.c
View File

@ -100,15 +100,6 @@ u32 driver3 = 0;
} else
return FALSE;
}
static BOOLEAN
CheckNegative(
struct dm_struct *pDM_Odm,
const u32 Condition1,
const u32 Condition2
)
{
return TRUE;
}
/******************************************************************************
* AGC_TAB.TXT

9
hal/phydm/rtl8814a/halhwimg8814a_mac.c
View File

@ -100,15 +100,6 @@ u4Byte driver3 = 0;
} else
return FALSE;
}
static BOOLEAN
CheckNegative(
struct dm_struct *pDM_Odm,
u32 Condition1,
u32 Condition2
)
{
return TRUE;
}
/******************************************************************************
* MAC_REG.TXT

9
hal/phydm/rtl8814a/halhwimg8814a_rf.c
View File

@ -100,15 +100,6 @@ u4Byte driver3 = 0;
} else
return FALSE;
}
static BOOLEAN
CheckNegative(
struct dm_struct *pDM_Odm,
u32 Condition1,
u32 Condition2
)
{
return TRUE;
}
/******************************************************************************
* RadioA.TXT

9
hal/phydm/rtl8821a/halhwimg8821a_bb.c
View File

@ -100,15 +100,6 @@ check_positive(
} else
return false;
}
static boolean
check_negative(
struct dm_struct *dm,
const u32 condition1,
const u32 condition2
)
{
return true;
}
/******************************************************************************
* AGC_TAB.TXT

9
hal/phydm/rtl8821a/halhwimg8821a_mac.c
View File

@ -100,15 +100,6 @@ check_positive(
} else
return false;
}
static boolean
check_negative(
struct dm_struct *dm,
const u32 condition1,
const u32 condition2
)
{
return true;
}
/******************************************************************************
* MAC_REG.TXT

9
hal/phydm/rtl8821a/halhwimg8821a_rf.c
View File

@ -100,15 +100,6 @@ check_positive(
} else
return false;
}
static boolean
check_negative(
struct dm_struct *dm,
const u32 condition1,
const u32 condition2
)
{
return true;
}
/******************************************************************************
* RadioA.TXT

12
hal/rtl8814a/rtl8814a_dm.c
View File

@ -36,11 +36,11 @@
// Global var
//============================================================
static VOID
dm_CheckProtection(
IN PADAPTER Adapter
)
{
//static VOID
//dm_CheckProtection(
// IN PADAPTER Adapter
// )
//{
#if 0
PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo);
u1Byte CurRate, RateThreshold;
@ -58,7 +58,7 @@ dm_CheckProtection(
DbgPrint("Enable protect: %x\n", Adapter->TxStats.CurrentInitTxRate);
}
#endif
}
//}
#ifdef CONFIG_SUPPORT_HW_WPS_PBC
static void dm_CheckPbcGPIO(_adapter *padapter)

61
hal/rtl8814a/usb/usb_halinit.c
View File

@ -24,18 +24,6 @@
#endif
static void _dbg_dump_macreg(_adapter *padapter)
{
u32 offset = 0;
u32 val32 = 0;
u32 index = 0 ;
for (index = 0; index < 64; index++) {
offset = index * 4;
val32 = rtw_read32(padapter, offset);
RTW_INFO("offset : 0x%02x ,val:0x%08x\n", offset, val32);
}
}
static VOID
_ConfigChipOutEP_8814(
IN PADAPTER pAdapter,
@ -872,11 +860,11 @@ init_UsbAggregationSetting_8814A(
* 12/10/2010 MHC Create Version 0.
*
*---------------------------------------------------------------------------*/
static VOID
USB_AggModeSwitch(
IN PADAPTER Adapter
)
{
//static VOID
//USB_AggModeSwitch(
// IN PADAPTER Adapter
// )
//{
#if 0
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo);
@ -959,13 +947,13 @@ USB_AggModeSwitch(
#endif
#endif
} // USB_AggModeSwitch
//} // USB_AggModeSwitch
static VOID
_InitOperationMode_8814A(
IN PADAPTER Adapter
)
{
//static VOID
//_InitOperationMode_8814A(
// IN PADAPTER Adapter
// )
//{
#if 0//gtest
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
u8 regBwOpMode = 0;
@ -1028,7 +1016,7 @@ _InitOperationMode_8814A(
//rtw_write32(Adapter, REG_INIRTS_RATE_SEL, regRRSR);
rtw_write8(Adapter, REG_BWOPMODE, regBwOpMode);
#endif
}
//}
/*
// Set CCK and OFDM Block "ON"
@ -1113,11 +1101,11 @@ _InitAntenna_Selection_8814A(IN PADAPTER Adapter)
// If Efuse 0x0e bit1 is not enabled, we can not support selective suspend for Minicard and
// slim card.
//
static VOID
HalDetectSelectiveSuspendMode(
IN PADAPTER Adapter
)
{
//static VOID
//HalDetectSelectiveSuspendMode(
// IN PADAPTER Adapter
// )
//{
#if 0
u8 tmpvalue;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
@ -1151,24 +1139,27 @@ HalDetectSelectiveSuspendMode(
//}
}
#endif
} // HalDetectSelectiveSuspendMode
//} // HalDetectSelectiveSuspendMode
static rt_rf_power_state RfOnOffDetect(IN PADAPTER pAdapter )
{
rt_rf_power_state rfpowerstate = rf_on;
return rfpowerstate;
} // HalDetectPwrDownMode
//static rt_rf_power_state RfOnOffDetect(IN PADAPTER pAdapter )
//{
// rt_rf_power_state rfpowerstate = rf_on;
// return rfpowerstate;
//} // HalDetectPwrDownMode
static void _ps_open_RF(_adapter *padapter) {
//here call with bRegSSPwrLvl 1, bRegSSPwrLvl 2 needs to be verified
//phy_SsPwrSwitch92CU(padapter, rf_on, 1);
}
/*
static void _ps_close_RF(_adapter *padapter){
//here call with bRegSSPwrLvl 1, bRegSSPwrLvl 2 needs to be verified
//phy_SsPwrSwitch92CU(padapter, rf_off, 1);
}
*/
/* A lightweight deinit function */

181
include/hal_data.h
View File

@ -15,7 +15,7 @@
#ifndef __HAL_DATA_H__
#define __HAL_DATA_H__
#if 1/* def CONFIG_SINGLE_IMG */
//#if 1/* def CONFIG_SINGLE_IMG */
#include "../hal/phydm/phydm_precomp.h"
#ifdef CONFIG_BT_COEXIST
@ -23,13 +23,6 @@
#endif
#include <hal_btcoex_wifionly.h>
#ifdef CONFIG_SDIO_HCI
#include <hal_sdio.h>
#endif
#ifdef CONFIG_GSPI_HCI
#include <hal_gspi.h>
#endif
#if defined(CONFIG_RTW_ACS) || defined(CONFIG_BACKGROUND_NOISE_MONITOR)
#include "../hal/hal_dm_acs.h"
#endif
@ -60,13 +53,6 @@ typedef enum _RT_REGULATOR_MODE {
/*
* Interface type.
* */
typedef enum _INTERFACE_SELECT_PCIE {
INTF_SEL0_SOLO_MINICARD = 0, /* WiFi solo-mCard */
INTF_SEL1_BT_COMBO_MINICARD = 1, /* WiFi+BT combo-mCard */
INTF_SEL2_PCIe = 2, /* PCIe Card */
} INTERFACE_SELECT_PCIE, *PINTERFACE_SELECT_PCIE;
typedef enum _INTERFACE_SELECT_USB {
INTF_SEL0_USB = 0, /* USB */
INTF_SEL1_USB_High_Power = 1, /* USB with high power PA */
@ -110,44 +96,10 @@ typedef enum _RX_AGG_MODE {
#endif /* RTW_RX_AGGREGATION */
/* E-Fuse */
#ifdef CONFIG_RTL8188E
#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A)
#define EFUSE_MAP_SIZE 512
#endif
#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8814A)
#define EFUSE_MAP_SIZE 512
#endif
#ifdef CONFIG_RTL8192E
#define EFUSE_MAP_SIZE 512
#endif
#ifdef CONFIG_RTL8723B
#define EFUSE_MAP_SIZE 512
#endif
#ifdef CONFIG_RTL8814A
#define EFUSE_MAP_SIZE 512
#endif
#ifdef CONFIG_RTL8703B
#define EFUSE_MAP_SIZE 512
#endif
#ifdef CONFIG_RTL8723D
#define EFUSE_MAP_SIZE 512
#endif
#ifdef CONFIG_RTL8188F
#define EFUSE_MAP_SIZE 512
#endif
#ifdef CONFIG_RTL8188GTV
#define EFUSE_MAP_SIZE 512
#endif
#ifdef CONFIG_RTL8710B
#define EFUSE_MAP_SIZE 512
#endif
#ifdef CONFIG_RTL8192F
#define EFUSE_MAP_SIZE 512
#endif
#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C)
#if defined(CONFIG_RTL8814A)
#define EFUSE_MAX_SIZE 1024
#elif defined(CONFIG_RTL8188E) || defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV) || defined(CONFIG_RTL8703B) || defined(CONFIG_RTL8710B)
#define EFUSE_MAX_SIZE 256
#else
#define EFUSE_MAX_SIZE 512
#endif
@ -165,16 +117,8 @@ typedef enum _RX_AGG_MODE {
#define Mac_DropPacket 0xA0000000
#ifdef CONFIG_RF_POWER_TRIM
#if defined(CONFIG_RTL8723B)
#define REG_RF_BB_GAIN_OFFSET 0x7f
#define RF_GAIN_OFFSET_MASK 0xfffff
#elif defined(CONFIG_RTL8188E)
#define REG_RF_BB_GAIN_OFFSET 0x55
#define RF_GAIN_OFFSET_MASK 0xfffff
#else
#define REG_RF_BB_GAIN_OFFSET 0x55
#define RF_GAIN_OFFSET_MASK 0xfffff
#endif /* CONFIG_RTL8723B */
#endif /*CONFIG_RF_POWER_TRIM*/
/* For store initial value of BB register */
@ -417,10 +361,6 @@ typedef struct hal_com_data {
u16 EEPROMPID;
u16 EEPROMSDID;
#endif
#ifdef CONFIG_PCI_HCI
u16 EEPROMDID;
u16 EEPROMSMID;
#endif
u8 EEPROMCustomerID;
u8 EEPROMSubCustomerID;
@ -444,13 +384,6 @@ typedef struct hal_com_data {
struct kfree_data_t kfree_data;
#endif /*CONFIG_RF_POWER_TRIM*/
#if defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8703B) || \
defined(CONFIG_RTL8723D) || \
defined(CONFIG_RTL8192F)
u8 adjuseVoltageVal;
u8 need_restore;
#endif
u8 EfuseUsedPercentage;
u16 EfuseUsedBytes;
/*u8 EfuseMap[2][HWSET_MAX_SIZE_JAGUAR];*/
@ -548,8 +481,6 @@ typedef struct hal_com_data {
u8 bScanInProcess;
/******** PHY DM & DM Section **********/
/* 2010/08/09 MH Add CU power down mode. */
BOOLEAN pwrdown;
@ -585,66 +516,6 @@ typedef struct hal_com_data {
u8 rxagg_dma_timeout;
#endif /* RTW_RX_AGGREGATION */
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
/* */
/* For SDIO Interface HAL related */
/* */
/* */
/* SDIO ISR Related */
/*
* u32 IntrMask[1];
* u32 IntrMaskToSet[1];
* LOG_INTERRUPT InterruptLog; */
u32 sdio_himr;
u32 sdio_hisr;
#ifndef RTW_HALMAC
/* */
/* SDIO Tx FIFO related. */
/* */
/* HIQ, MID, LOW, PUB free pages; padapter->xmitpriv.free_txpg */
#ifdef CONFIG_RTL8192F
u16 SdioTxFIFOFreePage[SDIO_TX_FREE_PG_QUEUE];
#else
u8 SdioTxFIFOFreePage[SDIO_TX_FREE_PG_QUEUE];
#endif/*CONFIG_RTL8192F*/
_lock SdioTxFIFOFreePageLock;
u8 SdioTxOQTMaxFreeSpace;
u8 SdioTxOQTFreeSpace;
#else /* RTW_HALMAC */
u16 SdioTxOQTFreeSpace;
#endif /* RTW_HALMAC */
/* */
/* SDIO Rx FIFO related. */
/* */
u8 SdioRxFIFOCnt;
u16 SdioRxFIFOSize;
#ifndef RTW_HALMAC
u32 sdio_tx_max_len[SDIO_MAX_TX_QUEUE];/* H, N, L, used for sdio tx aggregation max length per queue */
#else
#ifdef CONFIG_RTL8821C
u16 tx_high_page;
u16 tx_low_page;
u16 tx_normal_page;
u16 tx_extra_page;
u16 tx_pub_page;
u8 max_oqt_size;
#ifdef XMIT_BUF_SIZE
u32 max_xmit_size_vovi;
u32 max_xmit_size_bebk;
#endif /*XMIT_BUF_SIZE*/
u16 max_xmit_page;
u16 max_xmit_page_vo;
u16 max_xmit_page_vi;
u16 max_xmit_page_be;
u16 max_xmit_page_bk;
#endif /*#ifdef CONFIG_RTL8821C*/
#endif /* !RTW_HALMAC */
#endif /* CONFIG_SDIO_HCI */
#ifdef CONFIG_USB_HCI
/* 2010/12/10 MH Add for USB aggreation mode dynamic shceme. */
@ -671,36 +542,6 @@ typedef struct hal_com_data {
#endif/* CONFIG_USB_RX_AGGREGATION */
#endif /* CONFIG_USB_HCI */
#ifdef CONFIG_PCI_HCI
/* */
/* EEPROM setting. */
/* */
u32 TransmitConfig;
u32 IntrMaskToSet[2];
u32 IntArray[4];
u32 IntrMask[4];
u32 SysIntArray[1];
u32 SysIntrMask[1];
u32 IntrMaskReg[2];
u32 IntrMaskDefault[4];
BOOLEAN bL1OffSupport;
BOOLEAN bSupportBackDoor;
u32 pci_backdoor_ctrl;
u8 bDefaultAntenna;
u8 bInterruptMigration;
u8 bDisableTxInt;
u16 RxTag;
#ifdef CONFIG_PCI_DYNAMIC_ASPM
BOOLEAN bAspmL1LastIdle;
#endif
#endif /* CONFIG_PCI_HCI */
#ifdef DBG_CONFIG_ERROR_DETECT
struct sreset_priv srestpriv;
#endif /* #ifdef DBG_CONFIG_ERROR_DETECT */
@ -710,15 +551,6 @@ typedef struct hal_com_data {
BT_COEXIST bt_coexist;
#endif /* CONFIG_BT_COEXIST */
#if defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8703B) \
|| defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV) || defined(CONFIG_RTL8723D)|| defined(CONFIG_RTL8192F)
#ifndef CONFIG_PCI_HCI /* mutual exclusive with PCI -- so they're SDIO and GSPI */
/* Interrupt relatd register information. */
u32 SysIntrStatus;
u32 SysIntrMask;
#endif
#endif /*endif CONFIG_RTL8723B */
#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
char para_file_buf[MAX_PARA_FILE_BUF_LEN];
char *mac_reg;
@ -754,9 +586,6 @@ typedef struct hal_com_data {
BOOLEAN bCCKinCH14;
BB_INIT_REGISTER RegForRecover[5];
#if defined(CONFIG_PCI_HCI) && defined(RTL8814AE_SW_BCN)
BOOLEAN bCorrectBCN;
#endif
u32 RxGainOffset[4]; /*{2G, 5G_Low, 5G_Middle, G_High}*/
u8 BackUp_IG_REG_4_Chnl_Section[4]; /*{A,B,C,D}*/
@ -1057,8 +886,6 @@ int rtw_halmac_deinit_adapter(struct dvobj_priv *);
#define RX_SMOOTH_FACTOR Rx_Smooth_Factor
extern unsigned char RTW_WPA_OUI[];
extern unsigned char WMM_OUI[];
extern unsigned char WPS_OUI[];
@ -1089,7 +916,7 @@ void autosuspend_enter(_adapter* padapter);
int rtw_resume_process(_adapter *padapter);
#endif
#ifdef CONFIG_ANDROID_POWER
#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
#if defined(CONFIG_USB_HCI)
int rtw_resume_process(PADAPTER padapter);
#endif
#ifdef CONFIG_AUTOSUSPEND

32
include/rtw_mlme.h
View File

@ -23,13 +23,7 @@
/* Commented by Albert 20101105
* Increase the scanning timeout because of increasing the SURVEY_TO value. */
#ifdef PALTFORM_OS_WINCE
#define SCANQUEUE_LIFETIME 12000000 /* unit:us */
#else
#define SCANQUEUE_LIFETIME 20000 /* 20sec, unit:msec */
#endif
#define WIFI_NULL_STATE 0x00000000
#define WIFI_ASOC_STATE 0x00000001 /* Linked */
@ -982,32 +976,6 @@ struct mlme_priv {
_workitem Linkdown_workitem;
#endif
#ifdef CONFIG_INTEL_WIDI
int widi_state;
int listen_state;
_timer listen_timer;
ATOMIC_T rx_probe_rsp; /* 1:receive probe respone from RDS source. */
u8 *l2sdTaBuffer;
u8 channel_idx;
u8 group_cnt; /* In WiDi 3.5, they specified another scan algo. for WFD/RDS co-existed */
u8 sa_ext[L2SDTA_SERVICE_VE_LEN];
u8 widi_enable;
/**
* For WiDi 4; upper layer would set
* p2p_primary_device_type_category_id
* p2p_primary_device_type_sub_category_id
* p2p_secondary_device_type_category_id
* p2p_secondary_device_type_sub_category_id
*/
u16 p2p_pdt_cid;
u16 p2p_pdt_scid;
u8 num_p2p_sdt;
u16 p2p_sdt_cid[MAX_NUM_P2P_SDT];
u16 p2p_sdt_scid[MAX_NUM_P2P_SDT];
u8 p2p_reject_disable; /* When starting NL80211 wpa_supplicant/hostapd, it will call netdev_close */
/* such that it will cause p2p disabled. Use this flag to reject. */
#endif /* CONFIG_INTEL_WIDI */
systime lastscantime;
#ifdef CONFIG_CONCURRENT_MODE
u8 scanning_via_buddy_intf;

7
os_dep/linux/ioctl_cfg80211.c
View File

@ -2525,7 +2525,9 @@ static int cfg80211_rtw_change_iface(struct wiphy *wiphy,
#if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE))
case NL80211_IFTYPE_P2P_CLIENT:
is_p2p = _TRUE;
break;
#endif
case NL80211_IFTYPE_STATION:
networkType = Ndis802_11Infrastructure;
@ -2543,13 +2545,14 @@ static int cfg80211_rtw_change_iface(struct wiphy *wiphy,
#endif
}
#endif /* CONFIG_P2P */
break;
#if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE))
case NL80211_IFTYPE_P2P_GO:
is_p2p = _TRUE;
break;
#endif
case NL80211_IFTYPE_AP:
networkType = Ndis802_11APMode;
@ -6416,7 +6419,7 @@ static int cfg80211_rtw_assoc(struct wiphy *wiphy, struct net_device *ndev,
return 0;
}
#endif /* CONFIG_AP_MODE */
#endif
void rtw_cfg80211_rx_probe_request(_adapter *adapter, union recv_frame *rframe)
{

478
os_dep/linux/ioctl_linux.c
View File

@ -3251,20 +3251,6 @@ static int rtw_wx_read32(struct net_device *dev,
sprintf(extra, "0x%08X", data32);
break;
#if defined(CONFIG_SDIO_HCI) && defined(CONFIG_SDIO_INDIRECT_ACCESS) && defined(DBG_SDIO_INDIRECT_ACCESS)
case 11:
data32 = rtw_sd_iread8(padapter, addr);
sprintf(extra, "0x%02X", data32);
break;
case 12:
data32 = rtw_sd_iread16(padapter, addr);
sprintf(extra, "0x%04X", data32);
break;
case 14:
data32 = rtw_sd_iread32(padapter, addr);
sprintf(extra, "0x%08X", data32);
break;
#endif
default:
RTW_INFO("%s: usage> read [bytes],[address(hex)]\n", __func__);
ret = -EINVAL;
@ -3804,10 +3790,6 @@ static int rtw_wps_start(struct net_device *dev,
else if (u32wps_start == 3) /* WPS Stop because of wps fail */
rtw_led_control(padapter, LED_CTL_STOP_WPS_FAIL);
#ifdef CONFIG_INTEL_WIDI
process_intel_widi_wps_status(padapter, u32wps_start);
#endif /* CONFIG_INTEL_WIDI */
exit:
return ret;
@ -4688,13 +4670,6 @@ static int rtw_p2p_connect(struct net_device *dev,
return ret;
}
#ifdef CONFIG_INTEL_WIDI
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) {
RTW_INFO("[%s] WiFi is under survey!\n", __FUNCTION__);
return ret;
}
#endif /* CONFIG_INTEL_WIDI */
if (pwdinfo->ui_got_wps_info == P2P_NO_WPSINFO)
return -1;
@ -4776,19 +4751,6 @@ static int rtw_p2p_connect(struct net_device *dev,
} else {
RTW_INFO("[%s] Not Found in Scanning Queue~\n", __FUNCTION__);
#ifdef CONFIG_INTEL_WIDI
_cancel_timer_ex(&pwdinfo->restore_p2p_state_timer);
rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH);
rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_NONE);
rtw_free_network_queue(padapter, _TRUE);
/**
* For WiDi, if we can't find candidate device in scanning queue,
* driver will do scanning itself
*/
_enter_critical_bh(&pmlmepriv->lock, &irqL);
rtw_sitesurvey_cmd(padapter, NULL);
_exit_critical_bh(&pmlmepriv->lock, &irqL);
#endif /* CONFIG_INTEL_WIDI */
ret = -1;
}
exit:
@ -5319,12 +5281,6 @@ static int rtw_p2p_prov_disc(struct net_device *dev,
RTW_INFO("[%s] WiFi Direct is disable!\n", __FUNCTION__);
return ret;
} else {
#ifdef CONFIG_INTEL_WIDI
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) {
RTW_INFO("[%s] WiFi is under survey!\n", __FUNCTION__);
return ret;
}
#endif /* CONFIG_INTEL_WIDI */
/* Reset the content of struct tx_provdisc_req_info excluded the wps_config_method_request. */
_rtw_memset(pwdinfo->tx_prov_disc_info.peerDevAddr, 0x00, ETH_ALEN);
@ -5395,18 +5351,6 @@ static int rtw_p2p_prov_disc(struct net_device *dev,
}
#ifdef CONFIG_INTEL_WIDI
/* Some Intel WiDi source may not provide P2P IE, */
/* so we could only compare mac addr by 802.11 Source Address */
if (pmlmepriv->widi_state == INTEL_WIDI_STATE_WFD_CONNECTION
&& uintPeerChannel == 0) {
if (_rtw_memcmp(pnetwork->network.MacAddress, peerMAC, ETH_ALEN)) {
uintPeerChannel = pnetwork->network.Configuration.DSConfig;
break;
}
}
#endif /* CONFIG_INTEL_WIDI */
plist = get_next(plist);
}
@ -5495,15 +5439,6 @@ static int rtw_p2p_prov_disc(struct net_device *dev,
} else {
RTW_INFO("[%s] NOT Found in the Scanning Queue!\n", __FUNCTION__);
#ifdef CONFIG_INTEL_WIDI
_cancel_timer_ex(&pwdinfo->restore_p2p_state_timer);
rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH);
rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_NONE);
rtw_free_network_queue(padapter, _TRUE);
_enter_critical_bh(&pmlmepriv->lock, &irqL);
rtw_sitesurvey_cmd(padapter, NULL);
_exit_critical_bh(&pmlmepriv->lock, &irqL);
#endif /* CONFIG_INTEL_WIDI */
}
exit:
@ -6446,62 +6381,6 @@ static int rtw_dbg_port(struct net_device *dev,
break;
#endif
#if defined(CONFIG_SDIO_HCI) && defined(CONFIG_SDIO_INDIRECT_ACCESS) && defined(DBG_SDIO_INDIRECT_ACCESS)
case 0x1f:
{
int i, j = 0, test_cnts = 0;
static u8 test_code = 0x5A;
static u32 data_misatch_cnt = 0, d_acc_err_cnt = 0;
u32 d_data, i_data;
u32 imr;
test_cnts = extra_arg;
for (i = 0; i < test_cnts; i++) {
if (RTW_CANNOT_IO(padapter))
break;
rtw_write8(padapter, 0x07, test_code);
d_data = rtw_read32(padapter, 0x04);
imr = rtw_read32(padapter, 0x10250014);
rtw_write32(padapter, 0x10250014, 0);
rtw_msleep_os(50);
i_data = rtw_sd_iread32(padapter, 0x04);
rtw_write32(padapter, 0x10250014, imr);
if (d_data != i_data) {
data_misatch_cnt++;
RTW_ERR("d_data :0x%08x, i_data : 0x%08x\n", d_data, i_data);
}
if (test_code != (i_data >> 24)) {
d_acc_err_cnt++;
rtw_write8(padapter, 0x07, 0xAA);
RTW_ERR("test_code :0x%02x, i_data : 0x%08x\n", test_code, i_data);
}
if ((j++) == 100) {
rtw_msleep_os(2000);
RTW_INFO(" Indirect access testing..........%d/%d\n", i, test_cnts);
j = 0;
}
test_code = ~test_code;
rtw_msleep_os(50);
}
RTW_INFO("========Indirect access test=========\n");
RTW_INFO(" test_cnts = %d\n", test_cnts);
RTW_INFO(" direct & indirect read32 data missatch cnts = %d\n", data_misatch_cnt);
RTW_INFO(" indirect rdata is not equal to wdata cnts = %d\n", d_acc_err_cnt);
RTW_INFO("========Indirect access test=========\n\n");
data_misatch_cnt = d_acc_err_cnt = 0;
}
break;
#endif
case 0x20:
{
if (arg == 0xAA) {
@ -8685,46 +8564,6 @@ static int rtw_mp_efuse_get(struct net_device *dev,
}
/* RTW_INFO("}\n"); */
} else if (strcmp(tmp[0], "vidpid") == 0) {
#ifdef CONFIG_RTL8188E
#ifdef CONFIG_USB_HCI
addr = EEPROM_VID_88EU;
#endif
#ifdef CONFIG_PCI_HCI
addr = EEPROM_VID_88EE;
#endif
#endif /* CONFIG_RTL8188E */
#ifdef CONFIG_RTL8192E
#ifdef CONFIG_USB_HCI
addr = EEPROM_VID_8192EU;
#endif
#ifdef CONFIG_PCI_HCI
addr = EEPROM_VID_8192EE;
#endif
#endif /* CONFIG_RTL8192E */
#ifdef CONFIG_RTL8723B
addr = EEPROM_VID_8723BU;
#endif /* CONFIG_RTL8192E */
#ifdef CONFIG_RTL8188F
addr = EEPROM_VID_8188FU;
#endif /* CONFIG_RTL8188F */
#ifdef CONFIG_RTL8188GTV
addr = EEPROM_VID_8188GTVU;
#endif
#ifdef CONFIG_RTL8703B
#ifdef CONFIG_USB_HCI
addr = EEPROM_VID_8703BU;
#endif
#endif /* CONFIG_RTL8703B */
#ifdef CONFIG_RTL8723D
#ifdef CONFIG_USB_HCI
addr = EEPROM_VID_8723DU;
#endif /* CONFIG_USB_HCI */
#endif /* CONFIG_RTL8723D */
cnts = 4;
@ -9329,47 +9168,6 @@ static int rtw_mp_efuse_set(struct net_device *dev,
}
/* pidvid,da0b7881 */
#ifdef CONFIG_RTL8188E
#ifdef CONFIG_USB_HCI
addr = EEPROM_VID_88EU;
#endif
#ifdef CONFIG_PCI_HCI
addr = EEPROM_VID_88EE;
#endif
#endif /* CONFIG_RTL8188E */
#ifdef CONFIG_RTL8192E
#ifdef CONFIG_USB_HCI
addr = EEPROM_VID_8192EU;
#endif
#ifdef CONFIG_PCI_HCI
addr = EEPROM_VID_8192EE;
#endif
#endif /* CONFIG_RTL8188E */
#ifdef CONFIG_RTL8723B
addr = EEPROM_VID_8723BU;
#endif
#ifdef CONFIG_RTL8188F
addr = EEPROM_VID_8188FU;
#endif
#ifdef CONFIG_RTL8188GTV
addr = EEPROM_VID_8188GTVU;
#endif
#ifdef CONFIG_RTL8703B
#ifdef CONFIG_USB_HCI
addr = EEPROM_VID_8703BU;
#endif /* CONFIG_USB_HCI */
#endif /* CONFIG_RTL8703B */
#ifdef CONFIG_RTL8723D
#ifdef CONFIG_USB_HCI
addr = EEPROM_VID_8723DU;
#endif /* CONFIG_USB_HCI */
#endif /* CONFIG_RTL8723D */
cnts = strlen(tmp[1]);
if (cnts % 2) {
@ -10099,141 +9897,6 @@ static int rtw_priv_mp_get(struct net_device *dev,
}
#endif /*#if defined(CONFIG_MP_INCLUDED)*/
#ifdef CONFIG_SDIO_INDIRECT_ACCESS
#define DBG_MP_SDIO_INDIRECT_ACCESS 1
static int rtw_mp_sd_iread(struct net_device *dev
, struct iw_request_info *info
, struct iw_point *wrqu
, char *extra)
{
char input[16];
u8 width;
unsigned long addr;
u32 ret = 0;
PADAPTER padapter = rtw_netdev_priv(dev);
if (wrqu->length > 16) {
RTW_INFO(FUNC_ADPT_FMT" wrqu->length:%d\n", FUNC_ADPT_ARG(padapter), wrqu->length);
ret = -EINVAL;
goto exit;
}
if (copy_from_user(input, wrqu->pointer, wrqu->length)) {
RTW_INFO(FUNC_ADPT_FMT" copy_from_user fail\n", FUNC_ADPT_ARG(padapter));
ret = -EFAULT;
goto exit;
}
_rtw_memset(extra, 0, wrqu->length);
if (sscanf(input, "%hhu,%lx", &width, &addr) != 2) {
RTW_INFO(FUNC_ADPT_FMT" sscanf fail\n", FUNC_ADPT_ARG(padapter));
ret = -EINVAL;
goto exit;
}
if (addr > 0x3FFF) {
RTW_INFO(FUNC_ADPT_FMT" addr:0x%lx\n", FUNC_ADPT_ARG(padapter), addr);
ret = -EINVAL;
goto exit;
}
if (DBG_MP_SDIO_INDIRECT_ACCESS)
RTW_INFO(FUNC_ADPT_FMT" width:%u, addr:0x%lx\n", FUNC_ADPT_ARG(padapter), width, addr);
switch (width) {
case 1:
sprintf(extra, "0x%02x", rtw_sd_iread8(padapter, addr));
wrqu->length = strlen(extra);
break;
case 2:
sprintf(extra, "0x%04x", rtw_sd_iread16(padapter, addr));
wrqu->length = strlen(extra);
break;
case 4:
sprintf(extra, "0x%08x", rtw_sd_iread32(padapter, addr));
wrqu->length = strlen(extra);
break;
default:
wrqu->length = 0;
ret = -EINVAL;
break;
}
exit:
return ret;
}
static int rtw_mp_sd_iwrite(struct net_device *dev
, struct iw_request_info *info
, struct iw_point *wrqu
, char *extra)
{
char width;
unsigned long addr, data;
int ret = 0;
PADAPTER padapter = rtw_netdev_priv(dev);
char input[32];
if (wrqu->length > 32) {
RTW_INFO(FUNC_ADPT_FMT" wrqu->length:%d\n", FUNC_ADPT_ARG(padapter), wrqu->length);
ret = -EINVAL;
goto exit;
}
if (copy_from_user(input, wrqu->pointer, wrqu->length)) {
RTW_INFO(FUNC_ADPT_FMT" copy_from_user fail\n", FUNC_ADPT_ARG(padapter));
ret = -EFAULT;
goto exit;
}
_rtw_memset(extra, 0, wrqu->length);
if (sscanf(input, "%hhu,%lx,%lx", &width, &addr, &data) != 3) {
RTW_INFO(FUNC_ADPT_FMT" sscanf fail\n", FUNC_ADPT_ARG(padapter));
ret = -EINVAL;
goto exit;
}
if (addr > 0x3FFF) {
RTW_INFO(FUNC_ADPT_FMT" addr:0x%lx\n", FUNC_ADPT_ARG(padapter), addr);
ret = -EINVAL;
goto exit;
}
if (DBG_MP_SDIO_INDIRECT_ACCESS)
RTW_INFO(FUNC_ADPT_FMT" width:%u, addr:0x%lx, data:0x%lx\n", FUNC_ADPT_ARG(padapter), width, addr, data);
switch (width) {
case 1:
if (data > 0xFF) {
ret = -EINVAL;
break;
}
rtw_sd_iwrite8(padapter, addr, data);
break;
case 2:
if (data > 0xFFFF) {
ret = -EINVAL;
break;
}
rtw_sd_iwrite16(padapter, addr, data);
break;
case 4:
rtw_sd_iwrite32(padapter, addr, data);
break;
default:
wrqu->length = 0;
ret = -EINVAL;
break;
}
exit:
return ret;
}
#endif /* CONFIG_SDIO_INDIRECT_ACCESS */
static int rtw_priv_set(struct net_device *dev,
struct iw_request_info *info,
union iwreq_data *wdata, char *extra)
@ -10334,20 +9997,7 @@ static int rtw_priv_get(struct net_device *dev,
}
switch (subcmd) {
#if defined(CONFIG_RTL8723B)
case MP_SetBT:
RTW_INFO("set MP_SetBT\n");
rtw_mp_SetBT(dev, info, wdata, extra);
break;
#endif
#ifdef CONFIG_SDIO_INDIRECT_ACCESS
case MP_SD_IREAD:
rtw_mp_sd_iread(dev, info, wrqu, extra);
break;
case MP_SD_IWRITE:
rtw_mp_sd_iwrite(dev, info, wrqu, extra);
break;
#endif
#ifdef CONFIG_APPEND_VENDOR_IE_ENABLE
case VENDOR_IE_GET:
RTW_INFO("get case VENDOR_IE_GET\n");
@ -11207,104 +10857,12 @@ static int rtw_tdls_get(struct net_device *dev,
return ret;
}
#ifdef CONFIG_INTEL_WIDI
static int rtw_widi_set(struct net_device *dev,
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra)
{
int ret = 0;
_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
process_intel_widi_cmd(padapter, extra);
return ret;
}
static int rtw_widi_set_probe_request(struct net_device *dev,
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra)
{
int ret = 0;
u8 *pbuf = NULL;
_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
pbuf = rtw_malloc(sizeof(l2_msg_t));
if (pbuf) {
if (copy_from_user(pbuf, wrqu->data.pointer, wrqu->data.length))
ret = -EFAULT;
/* _rtw_memcpy(pbuf, wrqu->data.pointer, wrqu->data.length); */
if (wrqu->data.flags == 0)
intel_widi_wk_cmd(padapter, INTEL_WIDI_ISSUE_PROB_WK, pbuf, sizeof(l2_msg_t));
else if (wrqu->data.flags == 1)
rtw_set_wfd_rds_sink_info(padapter, (l2_msg_t *)pbuf);
}
return ret;
}
#endif /* CONFIG_INTEL_WIDI */
#ifdef CONFIG_MAC_LOOPBACK_DRIVER
#if defined(CONFIG_RTL8188E)
#include <rtl8188e_hal.h>
extern void rtl8188e_cal_txdesc_chksum(struct tx_desc *ptxdesc);
#define cal_txdesc_chksum rtl8188e_cal_txdesc_chksum
#ifdef CONFIG_SDIO_HCI || defined(CONFIG_GSPI_HCI)
extern void rtl8188es_fill_default_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf);
#define fill_default_txdesc rtl8188es_fill_default_txdesc
#endif /* CONFIG_SDIO_HCI */
#endif /* CONFIG_RTL8188E */
#if defined(CONFIG_RTL8723B)
extern void rtl8723b_cal_txdesc_chksum(struct tx_desc *ptxdesc);
#define cal_txdesc_chksum rtl8723b_cal_txdesc_chksum
extern void rtl8723b_fill_default_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf);
#define fill_default_txdesc rtl8723b_fill_default_txdesc
#endif /* CONFIG_RTL8723B */
#if defined(CONFIG_RTL8703B)
/* extern void rtl8703b_cal_txdesc_chksum(struct tx_desc *ptxdesc); */
#define cal_txdesc_chksum rtl8703b_cal_txdesc_chksum
/* extern void rtl8703b_fill_default_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf); */
#define fill_default_txdesc rtl8703b_fill_default_txdesc
#endif /* CONFIG_RTL8703B */
#if defined(CONFIG_RTL8723D)
/* extern void rtl8723d_cal_txdesc_chksum(struct tx_desc *ptxdesc); */
#define cal_txdesc_chksum rtl8723d_cal_txdesc_chksum
/* extern void rtl8723d_fill_default_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf); */
#define fill_default_txdesc rtl8723d_fill_default_txdesc
#endif /* CONFIG_RTL8723D */
#if defined(CONFIG_RTL8710B)
#define cal_txdesc_chksum rtl8710b_cal_txdesc_chksum
#define fill_default_txdesc rtl8710b_fill_default_txdesc
#endif /* CONFIG_RTL8710B */
#if defined(CONFIG_RTL8192E)
extern void rtl8192e_cal_txdesc_chksum(struct tx_desc *ptxdesc);
#define cal_txdesc_chksum rtl8192e_cal_txdesc_chksum
#ifdef CONFIG_SDIO_HCI || defined(CONFIG_GSPI_HCI)
extern void rtl8192es_fill_default_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf);
#define fill_default_txdesc rtl8192es_fill_default_txdesc
#endif /* CONFIG_SDIO_HCI */
#endif /* CONFIG_RTL8192E */
#if defined(CONFIG_RTL8192F)
/* extern void rtl8192f_cal_txdesc_chksum(struct tx_desc *ptxdesc); */
#define cal_txdesc_chksum rtl8192f_cal_txdesc_chksum
/* extern void rtl8192f_fill_default_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf); */
#define fill_default_txdesc rtl8192f_fill_default_txdesc
#endif /* CONFIG_RTL8192F */
static s32 initLoopback(PADAPTER padapter)
{
PLOOPBACKDATA ploopback;
if (padapter->ploopback == NULL) {
ploopback = (PLOOPBACKDATA)rtw_zmalloc(sizeof(LOOPBACKDATA));
if (ploopback == NULL)
@ -11519,16 +11077,6 @@ static struct xmit_frame *createloopbackpkt(PADAPTER padapter, u32 size)
desc->txdw5 = cpu_to_le32(desc->txdw5);
desc->txdw6 = cpu_to_le32(desc->txdw6);
desc->txdw7 = cpu_to_le32(desc->txdw7);
#ifdef CONFIG_PCI_HCI
desc->txdw8 = cpu_to_le32(desc->txdw8);
desc->txdw9 = cpu_to_le32(desc->txdw9);
desc->txdw10 = cpu_to_le32(desc->txdw10);
desc->txdw11 = cpu_to_le32(desc->txdw11);
desc->txdw12 = cpu_to_le32(desc->txdw12);
desc->txdw13 = cpu_to_le32(desc->txdw13);
desc->txdw14 = cpu_to_le32(desc->txdw14);
desc->txdw15 = cpu_to_le32(desc->txdw15);
#endif
cal_txdesc_chksum(desc);
@ -12118,17 +11666,6 @@ static const struct iw_priv_args rtw_private_args[] = {
IW_PRIV_TYPE_CHAR | 40, IW_PRIV_TYPE_CHAR | 0x7FF, "test"
},
#ifdef CONFIG_INTEL_WIDI
{
SIOCIWFIRSTPRIV + 0x1E,
IW_PRIV_TYPE_CHAR | 1024, 0, "widi_set"
},
{
SIOCIWFIRSTPRIV + 0x1F,
IW_PRIV_TYPE_CHAR | 128, 0, "widi_prob_req"
},
#endif /* CONFIG_INTEL_WIDI */
{ SIOCIWFIRSTPRIV + 0x0E, IW_PRIV_TYPE_CHAR | 1024, 0 , ""}, /* set */
{ SIOCIWFIRSTPRIV + 0x0F, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK , ""},/* get
* --- sub-ioctls definitions --- */
@ -12137,10 +11674,6 @@ static const struct iw_priv_args rtw_private_args[] = {
{ VENDOR_IE_SET, IW_PRIV_TYPE_CHAR | 1024 , 0 , "vendor_ie_set" },
{ VENDOR_IE_GET, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "vendor_ie_get" },
#endif
#if defined(CONFIG_RTL8723B)
{ MP_SetBT, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_setbt" },
{ MP_DISABLE_BT_COEXIST, IW_PRIV_TYPE_CHAR | 1024, 0, "mp_disa_btcoex"},
#endif
#ifdef CONFIG_WOWLAN
{ MP_WOW_ENABLE , IW_PRIV_TYPE_CHAR | 1024, 0, "wow_mode" },
{ MP_WOW_SET_PATTERN , IW_PRIV_TYPE_CHAR | 1024, 0, "wow_set_pattern" },
@ -12148,13 +11681,8 @@ static const struct iw_priv_args rtw_private_args[] = {
#ifdef CONFIG_AP_WOWLAN
{ MP_AP_WOW_ENABLE , IW_PRIV_TYPE_CHAR | 1024, 0, "ap_wow_mode" }, /* set */
#endif
#ifdef CONFIG_SDIO_INDIRECT_ACCESS
{ MP_SD_IREAD, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "sd_iread" },
{ MP_SD_IWRITE, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "sd_iwrite" },
#endif
};
static const struct iw_priv_args rtw_mp_private_args[] = {
/* --- sub-ioctls definitions --- */
#ifdef CONFIG_MP_INCLUDED
@ -12265,10 +11793,6 @@ static iw_handler rtw_private_handler[] = {
#endif
NULL, /* 0x1C is reserved for hostapd */
rtw_test, /* 0x1D */
#ifdef CONFIG_INTEL_WIDI
rtw_widi_set, /* 0x1E */
rtw_widi_set_probe_request, /* 0x1F */
#endif /* CONFIG_INTEL_WIDI */
};
#endif

151
os_dep/linux/os_intfs.c
View File

@ -56,19 +56,9 @@ int rtw_scan_mode = 1;/* active, passive */
#ifdef CONFIG_USB_HCI
int rtw_lps_level = LPS_NORMAL; /*USB default LPS level*/
#else /*SDIO,PCIE*/
#if defined(CONFIG_LPS_PG)
/*int rtw_lps_level = LPS_PG;*//*FW not support yet*/
int rtw_lps_level = LPS_LCLK;
#elif defined(CONFIG_LPS_PG_DDMA)
int rtw_lps_level = LPS_PG;
#elif defined(CONFIG_LPS_LCLK)
int rtw_lps_level = LPS_LCLK;
#else
int rtw_lps_level = LPS_NORMAL;
#endif
#endif/*CONFIG_USB_HCI*/
int rtw_lps_chk_by_tp = 1;
#endif
#else /* !CONFIG_POWER_SAVING */
int rtw_power_mgnt = PS_MODE_ACTIVE;
int rtw_ips_mode = IPS_NONE;
@ -170,9 +160,6 @@ int rtw_uapsd_ac_enable = 0x0;
#if defined(CONFIG_RTL8814A)
int rtw_pwrtrim_enable = 2; /* disable kfree , rename to power trim disable */
#elif defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822B)
/*PHYDM API, must enable by default*/
int rtw_pwrtrim_enable = 1;
#else
int rtw_pwrtrim_enable = 0; /* Default Enalbe power trim by efuse config */
#endif
@ -200,8 +187,6 @@ int rtw_ampdu_enable = 1;/* for enable tx_ampdu , */ /* 0: disable, 0x1:enable *
int rtw_rx_stbc = 3;/* 0: disable, bit(0):enable 2.4g, bit(1):enable 5g, default is set to enable 2.4GHZ for IOT issue with bufflao's AP at 5GHZ */
#if (defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B)) && defined(CONFIG_PCI_HCI)
int rtw_rx_ampdu_amsdu = 2;/* 0: disabled, 1:enabled, 2:auto . There is an IOT issu with DLINK DIR-629 when the flag turn on */
#elif (defined(CONFIG_RTL8822B) && defined(CONFIG_SDIO_HCI))
int rtw_rx_ampdu_amsdu = 1;
#else
int rtw_rx_ampdu_amsdu;/* 0: disabled, 1:enabled, 2:auto . There is an IOT issu with DLINK DIR-629 when the flag turn on */
#endif
@ -358,13 +343,6 @@ int rtw_mc2u_disable = 0;
int rtw_80211d = 0;
#endif
#ifdef CONFIG_PCI_ASPM
/* CLK_REQ:BIT0 L0s:BIT1 ASPM_L1:BIT2 L1Off:BIT3*/
int rtw_pci_aspm_enable = 0x5;
#else
int rtw_pci_aspm_enable;
#endif
#ifdef CONFIG_QOS_OPTIMIZATION
int rtw_qos_opt_enable = 1; /* 0: disable,1:enable */
#else
@ -1089,9 +1067,6 @@ uint loadparam(_adapter *padapter)
#ifdef CONFIG_LAYER2_ROAMING
registry_par->max_roaming_times = (u8)rtw_max_roaming_times;
#ifdef CONFIG_INTEL_WIDI
registry_par->max_roaming_times = (u8)rtw_max_roaming_times + 2;
#endif /* CONFIG_INTEL_WIDI */
#endif
#ifdef CONFIG_IOL
@ -1194,10 +1169,6 @@ uint loadparam(_adapter *padapter)
#endif
registry_par->wowlan_sta_mix_mode = rtw_wowlan_sta_mix_mode;
#ifdef CONFIG_PCI_HCI
registry_par->pci_aspm_config = rtw_pci_aspm_enable;
#endif
#ifdef CONFIG_RTW_NAPI
registry_par->en_napi = (u8)rtw_en_napi;
#ifdef CONFIG_RTW_NAPI_DYNAMIC
@ -1690,12 +1661,6 @@ int rtw_os_ndev_alloc(_adapter *adapter)
SET_NETDEV_DEV(ndev, dvobj_to_dev(adapter_to_dvobj(adapter)));
#endif
#ifdef CONFIG_PCI_HCI
if (adapter_to_dvobj(adapter)->bdma64)
ndev->features |= NETIF_F_HIGHDMA;
ndev->irq = adapter_to_dvobj(adapter)->irq;
#endif
#if defined(CONFIG_IOCTL_CFG80211)
if (rtw_cfg80211_ndev_res_alloc(adapter) != _SUCCESS) {
rtw_warn_on(1);
@ -1751,9 +1716,6 @@ int rtw_os_ndev_register(_adapter *adapter, const char *name)
ret = _FAIL;
goto exit;
}
#endif
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 19, 0)) && defined(CONFIG_PCI_HCI)
ndev->gro_flush_timeout = 100000;
#endif
/* alloc netdev name */
rtw_init_netdev_name(ndev, name);
@ -1958,9 +1920,6 @@ u32 rtw_start_drv_threads(_adapter *padapter)
RTW_INFO(FUNC_ADPT_FMT" enter\n", FUNC_ADPT_ARG(padapter));
#ifdef CONFIG_XMIT_THREAD_MODE
#if defined(CONFIG_SDIO_HCI)
if (is_primary_adapter(padapter))
#endif
{
if (padapter->xmitThread == NULL) {
RTW_INFO(FUNC_ADPT_FMT " start RTW_XMIT_THREAD\n", FUNC_ADPT_ARG(padapter));
@ -2031,10 +1990,6 @@ void rtw_stop_drv_threads(_adapter *padapter)
#ifdef CONFIG_XMIT_THREAD_MODE
/* Below is to termindate tx_thread... */
#if defined(CONFIG_SDIO_HCI)
/* Only wake-up primary adapter */
if (is_primary_adapter(padapter))
#endif /*SDIO_HCI */
{
if (padapter->xmitThread) {
_rtw_up_sema(&padapter->xmitpriv.xmit_sema);
@ -2180,9 +2135,6 @@ struct dvobj_priv *devobj_init(void)
_rtw_mutex_init(&pdvobj->setch_mutex);
_rtw_mutex_init(&pdvobj->setbw_mutex);
_rtw_mutex_init(&pdvobj->rf_read_reg_mutex);
#ifdef CONFIG_SDIO_INDIRECT_ACCESS
_rtw_mutex_init(&pdvobj->sd_indirect_access_mutex);
#endif
#ifdef CONFIG_SYSON_INDIRECT_ACCESS
_rtw_mutex_init(&pdvobj->syson_indirect_access_mutex);
#endif
@ -2201,9 +2153,6 @@ struct dvobj_priv *devobj_init(void)
#endif
_rtw_spinlock_init(&pdvobj->cam_ctl.lock);
_rtw_mutex_init(&pdvobj->cam_ctl.sec_cam_access_mutex);
#if defined(RTK_129X_PLATFORM) && defined(CONFIG_PCI_HCI)
_rtw_spinlock_init(&pdvobj->io_reg_lock);
#endif
#ifdef CONFIG_MBSSID_CAM
rtw_mbid_cam_init(pdvobj);
#endif
@ -2270,9 +2219,6 @@ void devobj_deinit(struct dvobj_priv *pdvobj)
_rtw_mutex_free(&pdvobj->setch_mutex);
_rtw_mutex_free(&pdvobj->setbw_mutex);
_rtw_mutex_free(&pdvobj->rf_read_reg_mutex);
#ifdef CONFIG_SDIO_INDIRECT_ACCESS
_rtw_mutex_free(&pdvobj->sd_indirect_access_mutex);
#endif
#ifdef CONFIG_SYSON_INDIRECT_ACCESS
_rtw_mutex_free(&pdvobj->syson_indirect_access_mutex);
#endif
@ -2285,9 +2231,6 @@ void devobj_deinit(struct dvobj_priv *pdvobj)
_rtw_spinlock_free(&pdvobj->cam_ctl.lock);
_rtw_mutex_free(&pdvobj->cam_ctl.sec_cam_access_mutex);
#if defined(RTK_129X_PLATFORM) && defined(CONFIG_PCI_HCI)
_rtw_spinlock_free(&pdvobj->io_reg_lock);
#endif
#ifdef CONFIG_MBSSID_CAM
rtw_mbid_cam_deinit(pdvobj);
#endif
@ -2510,14 +2453,6 @@ u8 rtw_init_drv_sw(_adapter *padapter)
rtw_hal_sreset_init(padapter);
#endif
#ifdef CONFIG_INTEL_WIDI
if (rtw_init_intel_widi(padapter) == _FAIL) {
RTW_INFO("Can't rtw_init_intel_widi\n");
ret8 = _FAIL;
goto exit;
}
#endif /* CONFIG_INTEL_WIDI */
#ifdef CONFIG_WAPI_SUPPORT
padapter->WapiSupport = true; /* set true temp, will revise according to Efuse or Registry value later. */
rtw_wapi_init(padapter);
@ -2642,10 +2577,6 @@ u8 rtw_free_drv_sw(_adapter *padapter)
_rtw_spinlock_free(&padapter->br_ext_lock);
#endif /* CONFIG_BR_EXT */
#ifdef CONFIG_INTEL_WIDI
rtw_free_intel_widi(padapter);
#endif /* CONFIG_INTEL_WIDI */
free_mlme_ext_priv(&padapter->mlmeextpriv);
#ifdef CONFIG_TDLS
@ -4383,14 +4314,6 @@ int rtw_suspend_wow(_adapter *padapter)
/* 0. Power off LED */
rtw_led_control(padapter, LED_CTL_POWER_OFF);
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
/* 2.only for SDIO disable interrupt */
rtw_intf_stop(padapter);
/* 2.1 clean interrupt */
rtw_hal_clear_interrupt(padapter);
#endif /* CONFIG_SDIO_HCI */
/* 1. stop thread */
rtw_set_drv_stopped(padapter); /*for stop thread*/
rtw_mi_stop_drv_threads(padapter);
@ -4401,13 +4324,6 @@ int rtw_suspend_wow(_adapter *padapter)
/* rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0, "WOWLAN"); */
/* #endif */
#ifdef CONFIG_SDIO_HCI
/* 2.2 free irq */
#if !(CONFIG_RTW_SDIO_KEEP_IRQ)
sdio_free_irq(adapter_to_dvobj(padapter));
#endif
#endif/*CONFIG_SDIO_HCI*/
#ifdef CONFIG_RUNTIME_PORT_SWITCH
if (rtw_port_switch_chk(padapter)) {
RTW_INFO(" ### PORT SWITCH ###\n");
@ -4506,26 +4422,12 @@ int rtw_suspend_ap_wow(_adapter *padapter)
/* 0. Power off LED */
rtw_led_control(padapter, LED_CTL_POWER_OFF);
#ifdef CONFIG_SDIO_HCI
/* 2.only for SDIO disable interrupt*/
rtw_intf_stop(padapter);
/* 2.1 clean interrupt */
rtw_hal_clear_interrupt(padapter);
#endif /* CONFIG_SDIO_HCI */
/* 1. stop thread */
rtw_set_drv_stopped(padapter); /*for stop thread*/
rtw_mi_stop_drv_threads(padapter);
rtw_clr_drv_stopped(padapter); /*for 32k command*/
#ifdef CONFIG_SDIO_HCI
/* 2.2 free irq */
#if !(CONFIG_RTW_SDIO_KEEP_IRQ)
sdio_free_irq(adapter_to_dvobj(padapter));
#endif
#endif/*CONFIG_SDIO_HCI*/
#ifdef CONFIG_RUNTIME_PORT_SWITCH
if (rtw_port_switch_chk(padapter)) {
RTW_INFO(" ### PORT SWITCH ###\n");
@ -4611,14 +4513,6 @@ int rtw_suspend_normal(_adapter *padapter)
#endif
rtw_dev_unload(padapter);
#ifdef CONFIG_SDIO_HCI
sdio_deinit(adapter_to_dvobj(padapter));
#if !(CONFIG_RTW_SDIO_KEEP_IRQ)
sdio_free_irq(adapter_to_dvobj(padapter));
#endif
#endif /*CONFIG_SDIO_HCI*/
RTW_INFO("<== "FUNC_ADPT_FMT" exit....\n", FUNC_ADPT_ARG(padapter));
return ret;
}
@ -4756,20 +4650,6 @@ int rtw_resume_process_wow(_adapter *padapter)
pwrpriv->bFwCurrentInPSMode = _FALSE;
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_PCI_HCI)
rtw_mi_intf_stop(padapter);
rtw_hal_clear_interrupt(padapter);
#endif
#ifdef CONFIG_SDIO_HCI
#if !(CONFIG_RTW_SDIO_KEEP_IRQ)
if (sdio_alloc_irq(adapter_to_dvobj(padapter)) != _SUCCESS) {
ret = -1;
goto exit;
}
#endif
#endif/*CONFIG_SDIO_HCI*/
/* Disable WOW, set H2C command */
poidparam.subcode = WOWLAN_DISABLE;
rtw_hal_set_hwreg(padapter, HW_VAR_WOWLAN, (u8 *)&poidparam);
@ -4901,18 +4781,10 @@ int rtw_resume_process_ap_wow(_adapter *padapter)
pwrpriv->bFwCurrentInPSMode = _FALSE;
rtw_hal_disable_interrupt(padapter);
//rtw_hal_disable_interrupt(padapter);
rtw_hal_clear_interrupt(padapter);
#ifdef CONFIG_SDIO_HCI
#if !(CONFIG_RTW_SDIO_KEEP_IRQ)
if (sdio_alloc_irq(adapter_to_dvobj(padapter)) != _SUCCESS) {
ret = -1;
goto exit;
}
#endif
#endif/*CONFIG_SDIO_HCI*/
/* Disable WOW, set H2C command */
poidparam.subcode = WOWLAN_AP_DISABLE;
rtw_hal_set_hwreg(padapter, HW_VAR_WOWLAN, (u8 *)&poidparam);
@ -5041,25 +4913,8 @@ int rtw_resume_process_normal(_adapter *padapter)
RTW_INFO("==> "FUNC_ADPT_FMT" entry....\n", FUNC_ADPT_ARG(padapter));
#ifdef CONFIG_SDIO_HCI
/* interface init */
if (sdio_init(adapter_to_dvobj(padapter)) != _SUCCESS) {
ret = -1;
goto exit;
}
#endif/*CONFIG_SDIO_HCI*/
rtw_clr_surprise_removed(padapter);
rtw_hal_disable_interrupt(padapter);
#ifdef CONFIG_SDIO_HCI
#if !(CONFIG_RTW_SDIO_KEEP_IRQ)
if (sdio_alloc_irq(adapter_to_dvobj(padapter)) != _SUCCESS) {
ret = -1;
goto exit;
}
#endif
#endif/*CONFIG_SDIO_HCI*/
//rtw_hal_disable_interrupt(padapter);
rtw_mi_reset_drv_sw(padapter);