mirror of
https://github.com/aircrack-ng/rtl8812au.git
synced 2024-11-25 14:44:09 +00:00
Some more cleanup
This commit is contained in:
kimocoder
parent
e213a19057
commit
86d3be356a
4
Makefile
4
Makefile
@ -218,7 +218,6 @@ else
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EXTRA_CFLAGS += -DDRV_NAME=\"rtl8812au\"
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endif
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ifeq ($(CONFIG_USB2_EXTERNAL_POWER), y)
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EXTRA_CFLAGS += -DCONFIG_USE_EXTERNAL_POWER
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endif
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@ -612,7 +611,6 @@ EXTRA_CFLAGS += -DCONFIG_BR_EXT
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EXTRA_CFLAGS += '-DCONFIG_BR_EXT_BRNAME="'$(BR_NAME)'"'
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endif
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ifeq ($(CONFIG_TDLS), y)
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EXTRA_CFLAGS += -DCONFIG_TDLS
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endif
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@ -770,7 +768,6 @@ KSRC := $(KERNEL_BUILD_PATH)
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MODULE_NAME :=wlan
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endif
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ifeq ($(CONFIG_PLATFORM_ACTIONS_ATM705X), y)
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EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
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#EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC
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@ -1503,7 +1500,6 @@ ifeq ($(CONFIG_PCI_HCI), y)
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MODULE_NAME := rtw_pci
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endif
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endif
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USER_MODULE_NAME ?=
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@ -1,5 +1,5 @@
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PACKAGE_NAME="realtek-rtl88xxau"
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PACKAGE_VERSION="5.2.20.2~20181229"
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PACKAGE_VERSION="5.2.20.2~20190101"
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CLEAN="'make' clean"
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BUILT_MODULE_NAME[0]=88XXau
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PROCS_NUM=`nproc`
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@ -1,23 +0,0 @@
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/******************************************************************************
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*
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* Copyright(c) 2016 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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#ifndef __RTL8812C_DM_H__
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#define __RTL8812C_DM_H__
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void rtl8821c_phy_init_dm_priv(PADAPTER);
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void rtl8821c_phy_deinit_dm_priv(PADAPTER);
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void rtl8821c_phy_init_haldm(PADAPTER);
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void rtl8821c_phy_haldm_watchdog(PADAPTER);
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#endif
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@ -1,83 +0,0 @@
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/******************************************************************************
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*
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* Copyright(c) 2016 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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#ifndef _RTL8821C_HAL_H_
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#define _RTL8821C_HAL_H_
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#include <osdep_service.h> /* BIT(x) */
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#include "../hal/halmac/halmac_api.h" /* MAC REG definition */
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#include "hal_data.h"
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#include "rtl8821c_spec.h"
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#include "../hal/rtl8821c/hal8821c_fw.h"
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#ifdef CONFIG_USB_HCI
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#include <rtl8821cu_hal.h>
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#endif
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#ifdef CONFIG_SDIO_HCI
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#include <rtl8821cs_hal.h>
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#endif
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#ifdef CONFIG_PCI_HCI
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#include <rtl8821ce_hal.h>
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#endif
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#ifdef CONFIG_SUPPORT_TRX_SHARED
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#define FIFO_BLOCK_SIZE 32768 /*@Block size = 32K*/
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#define RX_FIFO_EXPANDING (1 * FIFO_BLOCK_SIZE)
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#else
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#define RX_FIFO_EXPANDING 0
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#endif
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#if defined(CONFIG_USB_HCI)
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#ifndef MAX_RECVBUF_SZ
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#ifndef CONFIG_MINIMAL_MEMORY_USAGE
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/* 8821C - RX FIFO :16K ,for RX agg DMA mode = 16K, Rx agg USB mode could large than 16k*/
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/* #define MAX_RECVBUF_SZ (16384 + RX_FIFO_EXPANDING)*/
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/* For Max throughput issue , need to use USB AGG mode to replace DMA AGG mode*/
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#define MAX_RECVBUF_SZ (32768)
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/*#define MAX_RECVBUF_SZ_8821C (24576)*/ /* 24k*/
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/*#define MAX_RECVBUF_SZ_8821C (20480)*/ /*20K*/
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/*#define MAX_RECVBUF_SZ_8821C (10240) */ /*10K*/
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/*#define MAX_RECVBUF_SZ_8821C (15360)*/ /*15k < 16k*/
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/*#define MAX_RECVBUF_SZ_8821C (8192+1024)*/ /* 8K+1k*/
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#else
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#define MAX_RECVBUF_SZ (4096 + RX_FIFO_EXPANDING) /* about 4K */
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#endif
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#endif/* !MAX_RECVBUF_SZ*/
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#elif defined(CONFIG_PCI_HCI)
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/*#ifndef CONFIG_MINIMAL_MEMORY_USAGE
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#define MAX_RECVBUF_SZ (9100)
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#else*/
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#define MAX_RECVBUF_SZ (4096 + RX_FIFO_EXPANDING) /* about 4K */
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/*#endif*/
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#elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
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#define MAX_RECVBUF_SZ (16384 + RX_FIFO_EXPANDING)
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#endif
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void init_hal_spec_rtl8821c(PADAPTER);
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/* MP Functions */
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#ifdef CONFIG_MP_INCLUDED
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void rtl8821c_prepare_mp_txdesc(PADAPTER, struct mp_priv *); /* rtw_mp.c */
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void rtl8821c_mp_config_rfpath(PADAPTER); /* hal_mp.c */
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#endif
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#ifdef CONFIG_PCI_HCI
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u16 get_txbd_rw_reg(u16 q_idx);
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#endif
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#endif /* _RTL8821C_HAL_H_ */
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@ -1,191 +0,0 @@
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/******************************************************************************
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*
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* Copyright(c) 2016 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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#ifndef __RTL8821C_SPEC_H__
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#define __RTL8821C_SPEC_H__
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#define EFUSE_MAP_SIZE HALMAC_EFUSE_SIZE_8821C
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/*
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* MAC Register definition
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*/
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#define REG_AFE_XTAL_CTRL REG_AFE_CTRL1_8821C /* hal_com.c & phydm */
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#define REG_AFE_PLL_CTRL REG_AFE_CTRL2_8821C /* hal_com.c & phydm */
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#define REG_MAC_PHY_CTRL REG_AFE_CTRL3_8821C /* phydm only */
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#define REG_LEDCFG0 REG_LED_CFG_8821C /* rtw_mp.c */
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#define MSR (REG_CR_8821C + 2) /* rtw_mp.c */
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#define MSR1 REG_CR_EXT_8821C /* rtw_mp.c & hal_com.c */
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#define REG_C2HEVT_MSG_NORMAL 0x1A0 /* hal_com.c */
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#define REG_C2HEVT_CLEAR 0x1AF /* hal_com.c */
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#define REG_BCN_CTRL_1 REG_BCN_CTRL_CLINT0_8821C/* hal_com.c */
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#define REG_TSFTR1 REG_FREERUN_CNT_8821C /* hal_com.c */
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#define REG_WOWLAN_WAKE_REASON 0x01C7
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#define REG_GPIO_PIN_CTRL_2 REG_GPIO_EXT_CTRL_8821C
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/* RXERR_RPT, for rtw_mp.c */
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#define RXERR_TYPE_OFDM_PPDU 0
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#define RXERR_TYPE_OFDM_FALSE_ALARM 2
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#define RXERR_TYPE_OFDM_MPDU_OK 0
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#define RXERR_TYPE_OFDM_MPDU_FAIL 1
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#define RXERR_TYPE_CCK_PPDU 3
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#define RXERR_TYPE_CCK_FALSE_ALARM 5
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#define RXERR_TYPE_CCK_MPDU_OK 3
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#define RXERR_TYPE_CCK_MPDU_FAIL 4
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#define RXERR_TYPE_HT_PPDU 8
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#define RXERR_TYPE_HT_FALSE_ALARM 9
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#define RXERR_TYPE_HT_MPDU_TOTAL 6
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#define RXERR_TYPE_HT_MPDU_OK 6
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#define RXERR_TYPE_HT_MPDU_FAIL 7
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#define RXERR_TYPE_RX_FULL_DROP 10
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#define RXERR_COUNTER_MASK BIT_MASK_RPT_COUNTER_8821C
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#define RXERR_RPT_RST BIT_RXERR_RPT_RST_8821C
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#define _RXERR_RPT_SEL(type) (BIT_RXERR_RPT_SEL_V1_3_0_8821C(type) \
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| ((type & 0x10) ? BIT_RXERR_RPT_SEL_V1_4_8821C : 0))
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/*
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* BB Register definition
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*/
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#define rPMAC_Reset 0x100 /* hal_mp.c */
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#define rFPGA0_RFMOD 0x800
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#define rFPGA0_TxInfo 0x804
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#define rOFDMCCKEN_Jaguar 0x808 /* hal_mp.c */
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#define rFPGA0_TxGainStage 0x80C /* phydm only */
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#define rFPGA0_XA_HSSIParameter1 0x820 /* hal_mp.c */
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#define rFPGA0_XA_HSSIParameter2 0x824 /* hal_mp.c */
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#define rFPGA0_XB_HSSIParameter1 0x828 /* hal_mp.c */
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#define rFPGA0_XB_HSSIParameter2 0x82C /* hal_mp.c */
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#define rTxAGC_B_Rate18_06 0x830
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#define rTxAGC_B_Rate54_24 0x834
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#define rTxAGC_B_CCK1_55_Mcs32 0x838
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#define rCCAonSec_Jaguar 0x838 /* hal_mp.c */
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#define rTxAGC_B_Mcs03_Mcs00 0x83C
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#define rTxAGC_B_Mcs07_Mcs04 0x848
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#define rTxAGC_B_Mcs11_Mcs08 0x84C
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#define rFPGA0_XA_RFInterfaceOE 0x860
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#define rFPGA0_XB_RFInterfaceOE 0x864
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#define rTxAGC_B_Mcs15_Mcs12 0x868
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#define rTxAGC_B_CCK11_A_CCK2_11 0x86C
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#define rFPGA0_XAB_RFInterfaceSW 0x870
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#define rFPGA0_XAB_RFParameter 0x878
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#define rFPGA0_AnalogParameter4 0x88C /* hal_mp.c & phydm */
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#define rFPGA0_XB_LSSIReadBack 0x8A4 /* phydm */
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#define rHSSIRead_Jaguar 0x8B0 /* RF read addr (rtl8821c_phy.c) */
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#define rC_TxScale_Jaguar2 0x181C /* Pah_C TX scaling factor (hal_mp.c) */
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#define rC_IGI_Jaguar2 0x1850 /* Initial Gain for path-C (hal_mp.c) */
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#define rFPGA1_TxInfo 0x90C /* hal_mp.c */
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#define rSingleTone_ContTx_Jaguar 0x914 /* hal_mp.c */
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#define rCCK0_System 0xA00
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#define rCCK0_AFESetting 0xA04
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#define rCCK0_DSPParameter2 0xA1C
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#define rCCK0_TxFilter1 0xA20
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#define rCCK0_TxFilter2 0xA24
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#define rCCK0_DebugPort 0xA28
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#define rCCK0_FalseAlarmReport 0xA2C
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#define rD_TxScale_Jaguar2 0x1A1C /* Path_D TX scaling factor (hal_mp.c) */
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#define rD_IGI_Jaguar2 0x1A50 /* Initial Gain for path-D (hal_mp.c) */
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#define rOFDM0_TRxPathEnable 0xC04
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#define rOFDM0_TRMuxPar 0xC08
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#define rA_TxScale_Jaguar 0xC1C /* Pah_A TX scaling factor (hal_mp.c) */
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#define rOFDM0_RxDetector1 0xC30 /* rtw_mp.c */
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#define rOFDM0_ECCAThreshold 0xC4C /* phydm only */
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#define rOFDM0_XAAGCCore1 0xC50 /* phydm only */
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#define rA_IGI_Jaguar 0xC50 /* Initial Gain for path-A (hal_mp.c) */
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#define rOFDM0_XBAGCCore1 0xC58 /* phydm only */
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#define rOFDM0_XATxIQImbalance 0xC80 /* phydm only */
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#define rA_LSSIWrite_Jaguar 0xC90 /* RF write addr, LSSI Parameter (rtl8821c_phy.c) */
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#define rA_RFE_Pinmux_Jaguar 0xCB0 /* hal_mp.c */
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#define rOFDM1_LSTF 0xD00
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#define rOFDM1_TRxPathEnable 0xD04 /* hal_mp.c */
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#define rA_PIRead_Jaguar 0xD04 /* RF readback with PI (rtl8821c_phy.c) */
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#define rA_SIRead_Jaguar 0xD08 /* RF readback with SI (rtl8821c_phy.c) */
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#define rB_PIRead_Jaguar 0xD44 /* RF readback with PI (rtl8821c_phy.c) */
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#define rB_SIRead_Jaguar 0xD48 /* RF readback with SI (rtl8821c_phy.c) */
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#define rTxAGC_A_Rate18_06 0xE00
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#define rTxAGC_A_Rate54_24 0xE04
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#define rTxAGC_A_CCK1_Mcs32 0xE08
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#define rTxAGC_A_Mcs03_Mcs00 0xE10
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#define rTxAGC_A_Mcs07_Mcs04 0xE14
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#define rTxAGC_A_Mcs11_Mcs08 0xE18
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#define rTxAGC_A_Mcs15_Mcs12 0xE1C
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#define rB_TxScale_Jaguar 0xE1C /* Path_B TX scaling factor (hal_mp.c) */
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#define rB_IGI_Jaguar 0xE50 /* Initial Gain for path-B (hal_mp.c) */
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#define rB_LSSIWrite_Jaguar 0xE90 /* RF write addr, LSSI Parameter (rtl8821c_phy.c) */
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#define rB_RFE_Pinmux_Jaguar 0xEB0 /* hal_mp.c */
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/* Page1(0x100) */
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#define bBBResetB 0x100
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/* Page8(0x800) */
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#define bCCKEn 0x1000000
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#define bOFDMEn 0x2000000
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/* Reg 0x80C rFPGA0_TxGainStage */
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#define bXBTxAGC 0xF00
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#define bXCTxAGC 0xF000
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#define bXDTxAGC 0xF0000
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/* PageA(0xA00) */
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#define bCCKBBMode 0x3
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#define bCCKScramble 0x8
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#define bCCKTxRate 0x3000
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/* General */
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#define bMaskByte0 0xFF /* mp, rtw_odm.c & phydm */
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#define bMaskByte1 0xFF00 /* hal_mp.c & phydm */
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#define bMaskByte2 0xFF0000 /* hal_mp.c & phydm */
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#define bMaskByte3 0xFF000000 /* hal_mp.c & phydm */
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#define bMaskHWord 0xFFFF0000 /* hal_com.c, rtw_mp.c */
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#define bMaskLWord 0x0000FFFF /* mp, hal_com.c & phydm */
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#define bMaskDWord 0xFFFFFFFF /* mp, hal, rtw_odm.c & phydm */
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#define bEnable 0x1 /* hal_mp.c, rtw_mp.c */
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#define bDisable 0x0 /* rtw_mp.c */
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#define MAX_STALL_TIME 50 /* unit: us, hal_com_phycfg.c */
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#define Rx_Smooth_Factor 20 /* phydm only */
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/*
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* RF Register definition
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*/
|
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#define RF_AC 0x00
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#define RF_AC_Jaguar 0x00 /* hal_mp.c */
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#define RF_CHNLBW 0x18 /* rtl8821c_phy.c */
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#define RF_0x52 0x52
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struct hw_port_reg {
|
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u32 net_type; /*reg_offset*/
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u8 net_type_shift;
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u32 macaddr; /*reg_offset*/
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u32 bssid; /*reg_offset*/
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u32 bcn_ctl; /*reg_offset*/
|
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u32 tsf_rst; /*reg_offset*/
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u8 tsf_rst_bit;
|
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u32 bcn_space; /*reg_offset*/
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u8 bcn_space_shift;
|
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u16 bcn_space_mask;
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u32 ps_aid; /*reg_offset*/
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||||
};
|
||||
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#endif /* __RTL8192E_SPEC_H__ */
|
||||
@ -1,23 +0,0 @@
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/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2016 - 2017 Realtek Corporation.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
*****************************************************************************/
|
||||
#ifndef _RTL8821CE_HAL_H_
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#define _RTL8821CE_HAL_H_
|
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|
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#include <drv_types.h> /* PADAPTER */
|
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|
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/* rtl8821ce_ops.c */
|
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void rtl8821ce_set_hal_ops(PADAPTER);
|
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|
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#endif /* _RTL8821CE_HAL_H_ */
|
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@ -1,23 +0,0 @@
|
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/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2016 - 2017 Realtek Corporation.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
*****************************************************************************/
|
||||
#ifndef _RTL8821CS_HAL_H_
|
||||
#define _RTL8821CS_HAL_H_
|
||||
|
||||
#include <drv_types.h> /* PADAPTER */
|
||||
|
||||
/* rtl8821cs_ops.c */
|
||||
u8 rtl8821cs_set_hal_ops(PADAPTER);
|
||||
|
||||
#endif /* _RTL8821CS_HAL_H_ */
|
||||
@ -1,24 +0,0 @@
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/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2016 - 2017 Realtek Corporation.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
*****************************************************************************/
|
||||
#ifndef _RTL8821CU_HAL_H_
|
||||
#define _RTL8821CU_HAL_H_
|
||||
|
||||
#include <drv_types.h> /* PADAPTER */
|
||||
|
||||
/* rtl8821cu_ops.c */
|
||||
u8 rtl8821cu_set_hal_ops(PADAPTER);
|
||||
void rtl8821cu_set_hw_type(struct dvobj_priv *pdvobj);
|
||||
|
||||
#endif /* _RTL8821CU_HAL_H_ */
|
||||
Loading…
Reference in New Issue
Block a user