mirror of
https://github.com/aircrack-ng/rtl8812au.git
synced 2024-12-31 07:03:59 +00:00
Remove some testchip code
This commit is contained in:
parent
00e931f0f3
commit
6ffe53ba47
@ -1877,10 +1877,6 @@ odm_cmn_info_init(
|
||||
p_dm->support_interface = (u8)value;
|
||||
break;
|
||||
|
||||
case ODM_CMNINFO_MP_TEST_CHIP:
|
||||
p_dm->is_mp_chip = (u8)value;
|
||||
break;
|
||||
|
||||
case ODM_CMNINFO_IC_TYPE:
|
||||
p_dm->support_ic_type = (u32)value;
|
||||
break;
|
||||
|
@ -98,11 +98,11 @@ extern const u16 phy_rate_table[28];
|
||||
#define dm_type_by_driver 1
|
||||
|
||||
struct phydm_phystatus_statistic {
|
||||
|
||||
|
||||
/*[CCK]*/
|
||||
u32 rssi_cck_sum;
|
||||
u32 rssi_cck_cnt;
|
||||
/*[OFDM]*/
|
||||
/*[OFDM]*/
|
||||
u32 rssi_ofdm_sum;
|
||||
u32 rssi_ofdm_cnt;
|
||||
u32 evm_ofdm_sum;
|
||||
@ -138,7 +138,7 @@ struct phydm_phystatus_statistic {
|
||||
#if (defined(PHYDM_COMPILE_ABOVE_4SS))
|
||||
u32 rssi_4ss_cnt;
|
||||
u32 rssi_4ss_sum[4];
|
||||
u32 evm_4ss_sum[4];
|
||||
u32 evm_4ss_sum[4];
|
||||
u32 snr_4ss_sum[4];
|
||||
u16 evm_4ss_hist[4][PHY_HIST_SIZE];
|
||||
u16 snr_4ss_hist[4][PHY_HIST_SIZE];
|
||||
@ -146,7 +146,7 @@ struct phydm_phystatus_statistic {
|
||||
};
|
||||
|
||||
struct phydm_phystatus_avg {
|
||||
|
||||
|
||||
/*[CCK]*/
|
||||
u8 rssi_cck_avg;
|
||||
/*[OFDM]*/
|
||||
@ -172,7 +172,7 @@ struct phydm_phystatus_avg {
|
||||
/*[4SS]*/
|
||||
#if (defined(PHYDM_COMPILE_ABOVE_4SS))
|
||||
u8 rssi_4ss_avg[4];
|
||||
u8 evm_4ss_avg[4];
|
||||
u8 evm_4ss_avg[4];
|
||||
u8 snr_4ss_avg[4];
|
||||
#endif
|
||||
};
|
||||
@ -449,7 +449,7 @@ enum phydm_dbg_comp {
|
||||
DBG_DFS = BIT(F11_DFS),
|
||||
DBG_DYN_ARFR = BIT(F12_DYN_ARFR),
|
||||
DBG_ADPTVTY = BIT(F13_ADPTVTY),
|
||||
DBG_CFO_TRK = BIT(F14_CFO_TRK),
|
||||
DBG_CFO_TRK = BIT(F14_CFO_TRK),
|
||||
DBG_ENV_MNTR = BIT(F15_ENV_MNTR),
|
||||
DBG_PRI_CCA = BIT(F16_PRI_CCA),
|
||||
DBG_ADPTV_SOML = BIT(F17_ADPTV_SOML),
|
||||
@ -562,7 +562,7 @@ struct phydm_iot_center {
|
||||
/*-----------HOOK BEFORE REG INIT-----------*/
|
||||
|
||||
u8 support_platform;/*PHYDM Platform info WIN/AP/CE = 1/2/3 */
|
||||
u8 normal_rx_path;
|
||||
u8 normal_rx_path;
|
||||
boolean brxagcswitch; /* for rx AGC table switch in Microsoft case */
|
||||
u8 support_interface;/*PHYDM PCIE/USB/SDIO = 1/2/3*/
|
||||
u32 support_ic_type; /*PHYDM supported IC*/
|
||||
@ -609,9 +609,9 @@ struct phydm_iot_center {
|
||||
u8 is_receiver_blocking_en;
|
||||
u16 fw_offload_ability;
|
||||
/*-----------HOOK BEFORE REG INIT-----------*/
|
||||
/*===========================================================*/
|
||||
/*===========================================================*/
|
||||
/*====[ CALL BY Reference ]=========================================*/
|
||||
/*===========================================================*/
|
||||
/*===========================================================*/
|
||||
|
||||
u64 *p_num_tx_bytes_unicast; /*TX Unicast byte count*/
|
||||
u64 *p_num_rx_bytes_unicast; /*RX Unicast byte count*/
|
||||
@ -644,9 +644,9 @@ struct phydm_iot_center {
|
||||
u8 *p_mp_mode;
|
||||
u32 *p_interrupt_mask;
|
||||
u8 *p_bb_op_mode;
|
||||
/*===========================================================*/
|
||||
/*===========================================================*/
|
||||
/*====[ CALL BY VALUE ]===========================================*/
|
||||
/*===========================================================*/
|
||||
/*===========================================================*/
|
||||
|
||||
u8 disable_phydm_watchdog;
|
||||
boolean is_link_in_process;
|
||||
|
@ -205,7 +205,6 @@ phydm_bb_debug_info_n_series(
|
||||
s32 scfo_a = 0, scfo_b = 0, avg_cfo_a = 0, avg_cfo_b = 0;
|
||||
s32 cfo_end_a = 0, cfo_end_b = 0, acq_cfo_a = 0, acq_cfo_b = 0;
|
||||
|
||||
PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s\n", "BB Report Info"));
|
||||
|
||||
/*AGC result*/
|
||||
value32 = odm_get_bb_reg(p_dm, 0xdd0, MASKDWORD);
|
||||
|
@ -23,26 +23,12 @@
|
||||
#define READ_AND_CONFIG_MP(ic, txt) (odm_read_and_config_mp_##ic##txt(p_dm))
|
||||
#define READ_AND_CONFIG_TC(ic, txt) (odm_read_and_config_tc_##ic##txt(p_dm))
|
||||
|
||||
|
||||
#if (PHYDM_TESTCHIP_SUPPORT == 1)
|
||||
#define READ_AND_CONFIG(ic, txt) do {\
|
||||
if (p_dm->is_mp_chip)\
|
||||
READ_AND_CONFIG_MP(ic, txt);\
|
||||
else\
|
||||
READ_AND_CONFIG_TC(ic, txt);\
|
||||
} while (0)
|
||||
#else
|
||||
#define READ_AND_CONFIG READ_AND_CONFIG_MP
|
||||
#endif
|
||||
|
||||
#define GET_VERSION_MP(ic, txt) (odm_get_version_mp_##ic##txt())
|
||||
#define GET_VERSION_TC(ic, txt) (odm_get_version_tc_##ic##txt())
|
||||
|
||||
#if (PHYDM_TESTCHIP_SUPPORT == 1)
|
||||
#define GET_VERSION(ic, txt) (p_dm->is_mp_chip ? GET_VERSION_MP(ic, txt) : GET_VERSION_TC(ic, txt))
|
||||
#else
|
||||
#define GET_VERSION(ic, txt) GET_VERSION_MP(ic, txt)
|
||||
#endif
|
||||
#define GET_VERSION(ic, txt) GET_VERSION_MP(ic, txt)
|
||||
|
||||
enum hal_status
|
||||
odm_config_rf_with_header_file(
|
||||
|
Loading…
Reference in New Issue
Block a user