mirror of
https://github.com/chinawrj/rtl8812au
synced 2024-11-14 09:55:50 +00:00
516 lines
15 KiB
C
516 lines
15 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2007 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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#define _RTL8812A_XMIT_C_
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/* #include <drv_types.h> */
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#include <rtl8812a_hal.h>
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void _dbg_dump_tx_info(_adapter *padapter, int frame_tag, u8 *ptxdesc)
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{
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u8 bDumpTxPkt;
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u8 bDumpTxDesc = _FALSE;
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rtw_hal_get_def_var(padapter, HAL_DEF_DBG_DUMP_TXPKT, &(bDumpTxPkt));
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if (bDumpTxPkt == 1) { /* dump txdesc for data frame */
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RTW_INFO("dump tx_desc for data frame\n");
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if ((frame_tag & 0x0f) == DATA_FRAMETAG)
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bDumpTxDesc = _TRUE;
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} else if (bDumpTxPkt == 2) { /* dump txdesc for mgnt frame */
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RTW_INFO("dump tx_desc for mgnt frame\n");
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if ((frame_tag & 0x0f) == MGNT_FRAMETAG)
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bDumpTxDesc = _TRUE;
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} else if (bDumpTxPkt == 3) { /* dump early info */
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}
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if (bDumpTxDesc) {
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/* ptxdesc->txdw4 = cpu_to_le32(0x00001006); */ /* RTS Rate=24M */
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/* ptxdesc->txdw6 = 0x6666f800; */
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RTW_INFO("=====================================\n");
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RTW_INFO("Offset00(0x%08x)\n", *((u32 *)(ptxdesc)));
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RTW_INFO("Offset04(0x%08x)\n", *((u32 *)(ptxdesc + 4)));
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RTW_INFO("Offset08(0x%08x)\n", *((u32 *)(ptxdesc + 8)));
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RTW_INFO("Offset12(0x%08x)\n", *((u32 *)(ptxdesc + 12)));
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RTW_INFO("Offset16(0x%08x)\n", *((u32 *)(ptxdesc + 16)));
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RTW_INFO("Offset20(0x%08x)\n", *((u32 *)(ptxdesc + 20)));
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RTW_INFO("Offset24(0x%08x)\n", *((u32 *)(ptxdesc + 24)));
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RTW_INFO("Offset28(0x%08x)\n", *((u32 *)(ptxdesc + 28)));
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RTW_INFO("Offset32(0x%08x)\n", *((u32 *)(ptxdesc + 32)));
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RTW_INFO("Offset36(0x%08x)\n", *((u32 *)(ptxdesc + 36)));
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RTW_INFO("=====================================\n");
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}
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}
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/*
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* Description:
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* Aggregation packets and send to hardware
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*
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* Return:
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* 0 Success
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* -1 Hardware resource(TX FIFO) not ready
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* -2 Software resource(xmitbuf) not ready
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*/
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#ifdef CONFIG_TX_EARLY_MODE
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/* #define DBG_EMINFO */
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#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1
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#define EARLY_MODE_MAX_PKT_NUM 10
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#else
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#define EARLY_MODE_MAX_PKT_NUM 5
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#endif
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struct EMInfo {
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u8 EMPktNum;
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u16 EMPktLen[EARLY_MODE_MAX_PKT_NUM];
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};
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void
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InsertEMContent_8812(
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struct EMInfo *pEMInfo,
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IN pu1Byte VirtualAddress)
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{
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#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1
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u1Byte index = 0;
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u4Byte dwtmp = 0;
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#endif
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_rtw_memset(VirtualAddress, 0, EARLY_MODE_INFO_SIZE);
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if (pEMInfo->EMPktNum == 0)
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return;
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#ifdef DBG_EMINFO
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{
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int i;
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RTW_INFO("\n%s ==> pEMInfo->EMPktNum =%d\n", __FUNCTION__, pEMInfo->EMPktNum);
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for (i = 0; i < EARLY_MODE_MAX_PKT_NUM; i++)
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RTW_INFO("%s ==> pEMInfo->EMPktLen[%d] =%d\n", __FUNCTION__, i, pEMInfo->EMPktLen[i]);
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}
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#endif
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#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1
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SET_EARLYMODE_PKTNUM(VirtualAddress, pEMInfo->EMPktNum);
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if (pEMInfo->EMPktNum == 1)
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dwtmp = pEMInfo->EMPktLen[0];
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else {
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dwtmp = pEMInfo->EMPktLen[0];
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dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
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dwtmp += pEMInfo->EMPktLen[1];
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}
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SET_EARLYMODE_LEN0(VirtualAddress, dwtmp);
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if (pEMInfo->EMPktNum <= 3)
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dwtmp = pEMInfo->EMPktLen[2];
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else {
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dwtmp = pEMInfo->EMPktLen[2];
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dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
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dwtmp += pEMInfo->EMPktLen[3];
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}
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SET_EARLYMODE_LEN1(VirtualAddress, dwtmp);
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if (pEMInfo->EMPktNum <= 5)
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dwtmp = pEMInfo->EMPktLen[4];
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else {
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dwtmp = pEMInfo->EMPktLen[4];
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dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
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dwtmp += pEMInfo->EMPktLen[5];
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}
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SET_EARLYMODE_LEN2_1(VirtualAddress, dwtmp & 0xF);
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SET_EARLYMODE_LEN2_2(VirtualAddress, dwtmp >> 4);
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if (pEMInfo->EMPktNum <= 7)
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dwtmp = pEMInfo->EMPktLen[6];
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else {
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dwtmp = pEMInfo->EMPktLen[6];
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dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
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dwtmp += pEMInfo->EMPktLen[7];
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}
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SET_EARLYMODE_LEN3(VirtualAddress, dwtmp);
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if (pEMInfo->EMPktNum <= 9)
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dwtmp = pEMInfo->EMPktLen[8];
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else {
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dwtmp = pEMInfo->EMPktLen[8];
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dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
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dwtmp += pEMInfo->EMPktLen[9];
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}
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SET_EARLYMODE_LEN4(VirtualAddress, dwtmp);
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#else
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SET_EARLYMODE_PKTNUM(VirtualAddress, pEMInfo->EMPktNum);
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SET_EARLYMODE_LEN0(VirtualAddress, pEMInfo->EMPktLen[0]);
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SET_EARLYMODE_LEN1(VirtualAddress, pEMInfo->EMPktLen[1]);
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SET_EARLYMODE_LEN2_1(VirtualAddress, pEMInfo->EMPktLen[2] & 0xF);
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SET_EARLYMODE_LEN2_2(VirtualAddress, pEMInfo->EMPktLen[2] >> 4);
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SET_EARLYMODE_LEN3(VirtualAddress, pEMInfo->EMPktLen[3]);
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SET_EARLYMODE_LEN4(VirtualAddress, pEMInfo->EMPktLen[4]);
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#endif
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}
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void UpdateEarlyModeInfo8812(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf)
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{
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/* _adapter *padapter, struct xmit_frame *pxmitframe,struct tx_servq *ptxservq */
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int index, j;
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u16 offset, pktlen;
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PTXDESC_8812 ptxdesc;
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u8 *pmem, *pEMInfo_mem;
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s8 node_num_0 = 0, node_num_1 = 0;
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struct EMInfo eminfo;
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struct agg_pkt_info *paggpkt;
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struct xmit_frame *pframe = (struct xmit_frame *)pxmitbuf->priv_data;
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pmem = pframe->buf_addr;
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#ifdef DBG_EMINFO
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RTW_INFO("\n%s ==> agg_num:%d\n", __FUNCTION__, pframe->agg_num);
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for (index = 0; index < pframe->agg_num; index++) {
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offset = pxmitpriv->agg_pkt[index].offset;
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pktlen = pxmitpriv->agg_pkt[index].pkt_len;
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RTW_INFO("%s ==> agg_pkt[%d].offset=%d\n", __FUNCTION__, index, offset);
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RTW_INFO("%s ==> agg_pkt[%d].pkt_len=%d\n", __FUNCTION__, index, pktlen);
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}
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#endif
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if (pframe->agg_num > EARLY_MODE_MAX_PKT_NUM) {
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node_num_0 = pframe->agg_num;
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node_num_1 = EARLY_MODE_MAX_PKT_NUM - 1;
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}
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for (index = 0; index < pframe->agg_num; index++) {
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offset = pxmitpriv->agg_pkt[index].offset;
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pktlen = pxmitpriv->agg_pkt[index].pkt_len;
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_rtw_memset(&eminfo, 0, sizeof(struct EMInfo));
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if (pframe->agg_num > EARLY_MODE_MAX_PKT_NUM) {
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if (node_num_0 > EARLY_MODE_MAX_PKT_NUM) {
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eminfo.EMPktNum = EARLY_MODE_MAX_PKT_NUM;
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node_num_0--;
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} else {
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eminfo.EMPktNum = node_num_1;
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node_num_1--;
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}
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} else
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eminfo.EMPktNum = pframe->agg_num - (index + 1);
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for (j = 0; j < eminfo.EMPktNum ; j++) {
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eminfo.EMPktLen[j] = pxmitpriv->agg_pkt[index + 1 + j].pkt_len + 4; /* 4 bytes CRC */
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}
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if (pmem) {
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if (index == 0) {
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ptxdesc = (PTXDESC_8812)(pmem);
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pEMInfo_mem = ((u8 *)ptxdesc) + TXDESC_SIZE;
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} else {
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pmem = pmem + pxmitpriv->agg_pkt[index - 1].offset;
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ptxdesc = (PTXDESC_8812)(pmem);
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pEMInfo_mem = ((u8 *)ptxdesc) + TXDESC_SIZE;
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}
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#ifdef DBG_EMINFO
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RTW_INFO("%s ==> desc.pkt_len=%d\n", __FUNCTION__, ptxdesc->pktlen);
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#endif
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InsertEMContent_8812(&eminfo, pEMInfo_mem);
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}
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}
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_rtw_memset(pxmitpriv->agg_pkt, 0, sizeof(struct agg_pkt_info) * MAX_AGG_PKT_NUM);
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}
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#endif
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void rtl8812a_cal_txdesc_chksum(u8 *ptxdesc)
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{
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u16 *usPtr;
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u32 count;
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u32 index;
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u16 checksum = 0;
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usPtr = (u16 *)ptxdesc;
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/* checksume is always calculated by first 32 bytes, */
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/* and it doesn't depend on TX DESC length. */
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/* Thomas,Lucas@SD4,20130515 */
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count = 16;
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/* Clear first */
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SET_TX_DESC_TX_DESC_CHECKSUM_8812(ptxdesc, 0);
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for (index = 0 ; index < count ; index++)
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checksum = checksum ^ le16_to_cpu(*(usPtr + index));
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SET_TX_DESC_TX_DESC_CHECKSUM_8812(ptxdesc, checksum);
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}
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/*
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* Description: In normal chip, we should send some packet to Hw which will be used by Fw
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* in FW LPS mode. The function is to fill the Tx descriptor of this packets, then
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* Fw can tell Hw to send these packet derectly.
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* */
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void rtl8812a_fill_fake_txdesc(
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PADAPTER padapter,
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u8 *pDesc,
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u32 BufferLen,
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u8 IsPsPoll,
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u8 IsBTQosNull,
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u8 bDataFrame)
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{
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struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
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/* Clear all status */
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_rtw_memset(pDesc, 0, TXDESC_SIZE);
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SET_TX_DESC_FIRST_SEG_8812(pDesc, 1);
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SET_TX_DESC_LAST_SEG_8812(pDesc, 1);
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SET_TX_DESC_OFFSET_8812(pDesc, TXDESC_SIZE);
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SET_TX_DESC_PKT_SIZE_8812(pDesc, BufferLen);
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SET_TX_DESC_QUEUE_SEL_8812(pDesc, QSLT_MGNT);
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if (pmlmeext->cur_wireless_mode & WIRELESS_11B)
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SET_TX_DESC_RATE_ID_8812(pDesc, RATEID_IDX_B);
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else
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SET_TX_DESC_RATE_ID_8812(pDesc, RATEID_IDX_G);
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/* Set NAVUSEHDR to prevent Ps-poll AId filed to be changed to error vlaue by Hw. */
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if (IsPsPoll)
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SET_TX_DESC_NAV_USE_HDR_8812(pDesc, 1);
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else {
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SET_TX_DESC_HWSEQ_EN_8812(pDesc, 1); /* Hw set sequence number */
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}
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if (IsBTQosNull)
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SET_TX_DESC_BT_INT_8812(pDesc, 1);
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SET_TX_DESC_USE_RATE_8812(pDesc, 1);
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SET_TX_DESC_OWN_8812(pDesc, 1);
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/* */
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/* Encrypt the data frame if under security mode excepct null data. Suggested by CCW. */
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/* */
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if (_TRUE == bDataFrame) {
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u32 EncAlg;
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EncAlg = padapter->securitypriv.dot11PrivacyAlgrthm;
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switch (EncAlg) {
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case _NO_PRIVACY_:
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SET_TX_DESC_SEC_TYPE_8812(pDesc, 0x0);
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break;
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case _WEP40_:
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case _WEP104_:
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case _TKIP_:
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SET_TX_DESC_SEC_TYPE_8812(pDesc, 0x1);
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break;
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case _SMS4_:
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SET_TX_DESC_SEC_TYPE_8812(pDesc, 0x2);
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break;
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case _AES_:
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SET_TX_DESC_SEC_TYPE_8812(pDesc, 0x3);
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break;
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default:
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SET_TX_DESC_SEC_TYPE_8812(pDesc, 0x0);
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break;
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}
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}
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SET_TX_DESC_TX_RATE_8812(pDesc, MRateToHwRate(pmlmeext->tx_rate));
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#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
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/* USB interface drop packet if the checksum of descriptor isn't correct. */
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/* Using this checksum can let hardware recovery from packet bulk out error (e.g. Cancel URC, Bulk out error.). */
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rtl8812a_cal_txdesc_chksum(pDesc);
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#endif
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}
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#if defined(CONFIG_CONCURRENT_MODE)
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void fill_txdesc_force_bmc_camid(struct pkt_attrib *pattrib, u8 *ptxdesc)
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{
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if ((pattrib->encrypt > 0) && (!pattrib->bswenc)
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&& (pattrib->bmc_camid != INVALID_SEC_MAC_CAM_ID)) {
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SET_TX_DESC_EN_DESC_ID_8812(ptxdesc, 1);
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SET_TX_DESC_MACID_8812(ptxdesc, pattrib->bmc_camid);
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}
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}
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#endif
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void fill_txdesc_bmc_tx_rate(struct pkt_attrib *pattrib, u8 *ptxdesc)
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{
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SET_TX_DESC_USE_RATE_8812(ptxdesc, 1);
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SET_TX_DESC_TX_RATE_8812(ptxdesc, MRateToHwRate(pattrib->rate));
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SET_TX_DESC_DISABLE_FB_8812(ptxdesc, 1);
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}
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void rtl8812a_fill_txdesc_sectype(struct pkt_attrib *pattrib, u8 *ptxdesc)
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{
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if ((pattrib->encrypt > 0) && !pattrib->bswenc) {
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switch (pattrib->encrypt) {
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/* SEC_TYPE : 0:NO_ENC,1:WEP40/TKIP,2:WAPI,3:AES */
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case _WEP40_:
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case _WEP104_:
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case _TKIP_:
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case _TKIP_WTMIC_:
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SET_TX_DESC_SEC_TYPE_8812(ptxdesc, 0x1);
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break;
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#ifdef CONFIG_WAPI_SUPPORT
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case _SMS4_:
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SET_TX_DESC_SEC_TYPE_8812(ptxdesc, 0x2);
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break;
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#endif
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case _AES_:
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SET_TX_DESC_SEC_TYPE_8812(ptxdesc, 0x3);
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break;
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case _NO_PRIVACY_:
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default:
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SET_TX_DESC_SEC_TYPE_8812(ptxdesc, 0x0);
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break;
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}
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}
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}
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void rtl8812a_fill_txdesc_vcs(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc)
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{
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struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
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struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
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/* RTW_INFO("vcs_mode=%d\n", pattrib->vcs_mode); */
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if (pattrib->vcs_mode) {
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switch (pattrib->vcs_mode) {
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case RTS_CTS:
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SET_TX_DESC_RTS_ENABLE_8812(ptxdesc, 1);
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break;
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case CTS_TO_SELF:
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SET_TX_DESC_CTS2SELF_8812(ptxdesc, 1);
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break;
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case NONE_VCS:
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default:
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break;
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}
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if (pmlmeinfo->preamble_mode == PREAMBLE_SHORT)
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SET_TX_DESC_RTS_SHORT_8812(ptxdesc, 1);
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SET_TX_DESC_RTS_RATE_8812(ptxdesc, 0x8);/* RTS Rate=24M */
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SET_TX_DESC_RTS_RATE_FB_LIMIT_8812(ptxdesc, 0xf);
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/* Enable HW RTS */
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if (IS_HARDWARE_TYPE_8821(padapter))
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SET_TX_DESC_HW_RTS_ENABLE_8812(ptxdesc, 1);
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}
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}
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void rtl8812a_fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc)
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{
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/* RTW_INFO("bwmode=%d, ch_off=%d\n", pattrib->bwmode, pattrib->ch_offset); */
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if (pattrib->ht_en) {
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/* Set Bandwidth and sub-channel settings. */
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SET_TX_DESC_DATA_BW_8812(ptxdesc, BWMapping_8812(padapter, pattrib));
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SET_TX_DESC_DATA_SC_8812(ptxdesc, SCMapping_8812(padapter, pattrib));
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}
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}
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u8
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BWMapping_8812(
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IN PADAPTER Adapter,
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IN struct pkt_attrib *pattrib
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)
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{
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u8 BWSettingOfDesc = 0;
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PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
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|
|
/* RTW_INFO("BWMapping pHalData->current_channel_bw %d, pattrib->bwmode %d\n",pHalData->current_channel_bw,pattrib->bwmode); */
|
|
|
|
if (pHalData->current_channel_bw == CHANNEL_WIDTH_80) {
|
|
if (pattrib->bwmode == CHANNEL_WIDTH_80)
|
|
BWSettingOfDesc = 2;
|
|
else if (pattrib->bwmode == CHANNEL_WIDTH_40)
|
|
BWSettingOfDesc = 1;
|
|
else
|
|
BWSettingOfDesc = 0;
|
|
} else if (pHalData->current_channel_bw == CHANNEL_WIDTH_40) {
|
|
if ((pattrib->bwmode == CHANNEL_WIDTH_40) || (pattrib->bwmode == CHANNEL_WIDTH_80))
|
|
BWSettingOfDesc = 1;
|
|
else
|
|
BWSettingOfDesc = 0;
|
|
} else
|
|
BWSettingOfDesc = 0;
|
|
|
|
return BWSettingOfDesc;
|
|
}
|
|
|
|
u8
|
|
SCMapping_8812(
|
|
IN PADAPTER Adapter,
|
|
IN struct pkt_attrib *pattrib
|
|
)
|
|
{
|
|
u8 SCSettingOfDesc = 0;
|
|
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
|
|
/* RTW_INFO("SCMapping: pHalData->current_channel_bw %d, pHalData->nCur80MhzPrimeSC %d, pHalData->nCur40MhzPrimeSC %d\n",pHalData->current_channel_bw,pHalData->nCur80MhzPrimeSC,pHalData->nCur40MhzPrimeSC); */
|
|
|
|
if (pHalData->current_channel_bw == CHANNEL_WIDTH_80) {
|
|
if (pattrib->bwmode == CHANNEL_WIDTH_80)
|
|
SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE;
|
|
else if (pattrib->bwmode == CHANNEL_WIDTH_40) {
|
|
if (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)
|
|
SCSettingOfDesc = VHT_DATA_SC_40_LOWER_OF_80MHZ;
|
|
else if (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)
|
|
SCSettingOfDesc = VHT_DATA_SC_40_UPPER_OF_80MHZ;
|
|
else
|
|
RTW_INFO("SCMapping: DONOT CARE Mode Setting\n");
|
|
} else {
|
|
if ((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER))
|
|
SCSettingOfDesc = VHT_DATA_SC_20_LOWEST_OF_80MHZ;
|
|
else if ((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER))
|
|
SCSettingOfDesc = VHT_DATA_SC_20_LOWER_OF_80MHZ;
|
|
else if ((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER))
|
|
SCSettingOfDesc = VHT_DATA_SC_20_UPPER_OF_80MHZ;
|
|
else if ((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER))
|
|
SCSettingOfDesc = VHT_DATA_SC_20_UPPERST_OF_80MHZ;
|
|
else
|
|
RTW_INFO("SCMapping: DONOT CARE Mode Setting\n");
|
|
}
|
|
} else if (pHalData->current_channel_bw == CHANNEL_WIDTH_40) {
|
|
/* RTW_INFO("SCMapping: HT Case: pHalData->current_channel_bw %d, pHalData->nCur40MhzPrimeSC %d\n",pHalData->current_channel_bw,pHalData->nCur40MhzPrimeSC); */
|
|
|
|
if (pattrib->bwmode == CHANNEL_WIDTH_40)
|
|
SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE;
|
|
else if (pattrib->bwmode == CHANNEL_WIDTH_20) {
|
|
if (pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)
|
|
SCSettingOfDesc = VHT_DATA_SC_20_UPPER_OF_80MHZ;
|
|
else if (pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)
|
|
SCSettingOfDesc = VHT_DATA_SC_20_LOWER_OF_80MHZ;
|
|
else
|
|
SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE;
|
|
|
|
}
|
|
} else
|
|
SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE;
|
|
|
|
return SCSettingOfDesc;
|
|
}
|