mirror of
https://github.com/chinawrj/rtl8812au
synced 2024-11-14 09:55:50 +00:00
114 lines
2.9 KiB
C
114 lines
2.9 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2007 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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/* ************************************************************
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* include files
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* ************************************************************ */
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#include "mp_precomp.h"
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#include "../phydm_precomp.h"
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#if (RTL8812A_SUPPORT == 1)
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s8 phydm_cck_rssi_8812a(struct dm_struct *dm, u16 lna_idx, u8 vga_idx)
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{
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s8 rx_pwr_all = 0;
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switch (lna_idx) {
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case 7:
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if (vga_idx <= 27)
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rx_pwr_all = -94 + 2 * (27 - vga_idx);
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else
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rx_pwr_all = -94;
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break;
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case 6:
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rx_pwr_all = -42 + 2 * (2 - vga_idx);
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break;
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case 5:
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rx_pwr_all = -36 + 2 * (7 - vga_idx);
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break;
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case 4:
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rx_pwr_all = -30 + 2 * (7 - vga_idx);
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break;
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case 3:
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rx_pwr_all = -18 + 2 * (7 - vga_idx);
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break;
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case 2:
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rx_pwr_all = 2 * (5 - vga_idx);
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break;
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case 1:
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rx_pwr_all = 14 - 2 * vga_idx;
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break;
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case 0:
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rx_pwr_all = 20 - 2 * vga_idx;
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break;
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default:
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break;
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}
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return rx_pwr_all;
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}
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#ifdef DYN_ANT_WEIGHTING_SUPPORT
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void phydm_dynamic_ant_weighting_8812a(void *dm_void)
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{
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struct dm_struct *dm = (struct dm_struct *)dm_void;
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u8 rssi_l2h = 43, rssi_h2l = 37;
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u8 reg_8;
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if (dm->is_disable_dym_ant_weighting)
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return;
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if (*dm->channel <= 14) {
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if (dm->rssi_min >= rssi_l2h) {
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odm_set_bb_reg(dm, R_0x854, BIT(3), 0x1);
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odm_set_bb_reg(dm, R_0x850, BIT(21) | BIT(22), 0x0);
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/*equal weighting*/
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reg_8 = (u8)odm_get_bb_reg(dm, R_0xf94, BIT(0) | BIT(1) | BIT(2));
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PHYDM_DBG(dm, ODM_COMP_API,
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"Equal weighting ,rssi_min = %d\n, 0xf94[2:0] = 0x%x\n",
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dm->rssi_min, reg_8);
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} else if (dm->rssi_min <= rssi_h2l) {
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odm_set_bb_reg(dm, R_0x854, BIT(3), 0x1);
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odm_set_bb_reg(dm, R_0x850, BIT(21) | BIT(22), 0x1);
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/*fix sec_min_wgt = 1/2*/
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reg_8 = (u8)odm_get_bb_reg(dm, R_0xf94, BIT(0) | BIT(1) | BIT(2));
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PHYDM_DBG(dm, ODM_COMP_API,
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"AGC weighting ,rssi_min = %d\n, 0xf94[2:0] = 0x%x\n",
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dm->rssi_min, reg_8);
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}
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} else {
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odm_set_bb_reg(dm, R_0x854, BIT(3), 0x1);
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odm_set_bb_reg(dm, R_0x850, BIT(21) | BIT(22), 0x1);
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reg_8 = (u8)odm_get_bb_reg(dm, R_0xf94, BIT(0) | BIT(1) | BIT(2));
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PHYDM_DBG(dm, ODM_COMP_API,
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"AGC weighting ,rssi_min = %d\n, 0xf94[2:0] = 0x%x\n",
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dm->rssi_min, reg_8);
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/*fix sec_min_wgt = 1/2*/
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}
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}
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#endif
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void phydm_hwsetting_8812a(struct dm_struct *dm)
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{
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phydm_dynamic_ant_weighting(dm);
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}
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#endif /* #if (RTL8812A_SUPPORT == 1) */
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