mirror of
https://github.com/chinawrj/rtl8812au
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120 lines
3.1 KiB
C
120 lines
3.1 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2007 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* wlanfae <wlanfae@realtek.com>
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* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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* Hsinchu 300, Taiwan.
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*
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* Larry Finger <Larry.Finger@lwfinger.net>
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*
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*****************************************************************************/
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#ifndef __HALRF_KFREE_H__
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#define __HALRF_KFREE_H__
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#define KFREE_VERSION "1.0"
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#define KFREE_BAND_NUM 6
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#define KFREE_CH_NUM 3
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#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_AP))
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#define BB_GAIN_NUM 6
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#endif
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#define KFREE_FLAG_ON BIT(0)
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#define KFREE_FLAG_THERMAL_K_ON BIT(1)
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#define KFREE_FLAG_ON_2G BIT(2)
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#define KFREE_FLAG_ON_5G BIT(3)
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#define PA_BIAS_FLAG_ON BIT(4)
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#define PPG_THERMAL_OFFSET_98F 0x50
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#define PPG_2GM_TXAB_98F 0x51
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#define PPG_2GM_TXCD_98F 0x52
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#define PPG_2GL_TXAB_98F 0x53
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#define PPG_2GL_TXCD_98F 0x54
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#define PPG_5GH_TXAB_98F 0x55
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#define PPG_5GH_TXCD_98F 0x56
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#define PPG_THERMAL_OFFSET_21C 0x1EF
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#define PPG_2G_TXAB_21C 0x1EE
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#define PPG_5GL1_TXA_21C 0x1EC
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#define PPG_5GL2_TXA_21C 0x1E8
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#define PPG_5GM1_TXA_21C 0x1E4
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#define PPG_5GM2_TXA_21C 0x1E0
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#define PPG_5GH1_TXA_21C 0x1DC
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#define PPG_THERMAL_OFFSET_22B 0x3EF
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#define PPG_2G_TXAB_22B 0x3EE
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#define PPG_2G_TXCD_22B 0x3ED
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#define PPG_5GL1_TXA_22B 0x3EC
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#define PPG_5GL1_TXB_22B 0x3EB
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#define PPG_5GL1_TXC_22B 0x3EA
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#define PPG_5GL1_TXD_22B 0x3E9
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#define PPG_5GL2_TXA_22B 0x3E8
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#define PPG_5GL2_TXB_22B 0x3E7
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#define PPG_5GL2_TXC_22B 0x3E6
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#define PPG_5GL2_TXD_22B 0x3E5
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#define PPG_5GM1_TXA_22B 0x3E4
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#define PPG_5GM1_TXB_22B 0x3E3
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#define PPG_5GM1_TXC_22B 0x3E2
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#define PPG_5GM1_TXD_22B 0x3E1
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#define PPG_5GM2_TXA_22B 0x3E0
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#define PPG_5GM2_TXB_22B 0x3DF
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#define PPG_5GM2_TXC_22B 0x3DE
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#define PPG_5GM2_TXD_22B 0x3DD
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#define PPG_5GH1_TXA_22B 0x3DC
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#define PPG_5GH1_TXB_22B 0x3DB
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#define PPG_5GH1_TXC_22B 0x3DA
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#define PPG_5GH1_TXD_22B 0x3D9
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#define PPG_PABIAS_2GA_22B 0x3D5
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#define PPG_PABIAS_2GB_22B 0x3D6
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struct odm_power_trim_data {
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u8 flag;
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u8 pa_bias_flag;
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s8 bb_gain[KFREE_BAND_NUM][MAX_RF_PATH];
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s8 thermal;
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};
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enum phydm_kfree_channeltosw {
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PHYDM_2G = 0,
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PHYDM_5GLB1 = 1,
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PHYDM_5GLB2 = 2,
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PHYDM_5GMB1 = 3,
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PHYDM_5GMB2 = 4,
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PHYDM_5GHB = 5,
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};
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void phydm_get_thermal_trim_offset(void *dm_void);
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void phydm_get_power_trim_offset(void *dm_void);
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void phydm_get_pa_bias_offset(void *dm_void);
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s8 phydm_get_thermal_offset(void *dm_void);
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void phydm_clear_kfree_to_rf(void *dm_void, u8 e_rf_path, u8 data);
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void phydm_config_kfree(void *dm_void, u8 channel_to_sw);
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#endif /*__HALRF_KFREE_H__*/
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