rtl8812au-chinawrj/hal/phydm/phydm_ccx.h

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/******************************************************************************
*
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* Copyright(c) 2007 - 2017 Realtek Corporation.
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*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
*
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* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
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*****************************************************************************/
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#ifndef __PHYDMCCX_H__
#define __PHYDMCCX_H__
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/* @1 ============================================================
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* 1 Definition
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* 1 ============================================================
*/
#define ENV_MNTR_DBG 0 /*@debug for the HW processing time from NHM/CLM trigger and get result*/
#define ENV_MNTR_DBG_1 0 /*@debug 8812A & 8821A P2P Fail to get result*/
#define ENV_MNTR_DBG_2 0 /*@debug for read reister*/
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#define CCX_EN 1
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#define MAX_ENV_MNTR_TIME 8 /*second*/
#define IGI_TO_NHM_TH_MULTIPLIER 2
#define MS_TO_4US_RATIO 250
#define CCA_CAP 14
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#define CLM_MAX_REPORT_TIME 10
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#define DEVIDER_ERROR 0xffff
#define CLM_PERIOD_MAX 65535
#define NHM_PERIOD_MAX 65534
#define NHM_TH_NUM 11 /*threshold number of NHM*/
#define NHM_RPT_NUM 12
#define IGI_2_NHM_TH(igi) ((igi) << 1)/*NHM_threshold = IGI * 2*/
#define NTH_TH_2_RSSI(th) ((th >> 1) - 10)
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/*@FAHM*/
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#define FAHM_INCLD_FA BIT(0)
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#define FAHM_INCLD_CRC_OK BIT(1)
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#define FAHM_INCLD_CRC_ER BIT(2)
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#define NHM_SUCCESS BIT(0)
#define CLM_SUCCESS BIT(1)
#define FAHM_SUCCESS BIT(2)
#define ENV_MNTR_FAIL 0xff
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/* @1 ============================================================
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* 1 enumrate
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* 1 ============================================================
*/
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enum phydm_clm_level {
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CLM_RELEASE = 0,
CLM_LV_1 = 1, /* @Low Priority function */
CLM_LV_2 = 2, /* @Middle Priority function */
CLM_LV_3 = 3, /* @High priority function (ex: Check hang function) */
CLM_LV_4 = 4, /* @Debug function (the highest priority) */
CLM_MAX_NUM = 5
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};
enum phydm_nhm_level {
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NHM_RELEASE = 0,
NHM_LV_1 = 1, /* @Low Priority function */
NHM_LV_2 = 2, /* @Middle Priority function */
NHM_LV_3 = 3, /* @High priority function (ex: Check hang function) */
NHM_LV_4 = 4, /* @Debug function (the highest priority) */
NHM_MAX_NUM = 5
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};
enum nhm_divider_opt_all {
NHM_CNT_ALL = 0, /*nhm SUM report <= 255*/
NHM_VALID = 1, /*nhm SUM report = 255*/
NHM_CNT_INIT
};
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enum nhm_setting {
SET_NHM_SETTING,
STORE_NHM_SETTING,
RESTORE_NHM_SETTING
};
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enum nhm_option_cca_all {
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NHM_EXCLUDE_CCA = 0,
NHM_INCLUDE_CCA = 1,
NHM_CCA_INIT
};
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enum nhm_option_txon_all {
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NHM_EXCLUDE_TXON = 0,
NHM_INCLUDE_TXON = 1,
NHM_TXON_INIT
};
enum nhm_application {
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NHM_BACKGROUND = 0,/*@default*/
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NHM_ACS = 1,
IEEE_11K_HIGH = 2,
IEEE_11K_LOW = 3,
INTEL_XBOX = 4,
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NHM_DBG = 5, /*@manual trigger*/
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};
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enum clm_application {
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CLM_BACKGROUND = 0,/*@default*/
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CLM_ACS = 1,
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};
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enum clm_monitor_mode {
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CLM_DRIVER_MNTR = 1,
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CLM_FW_MNTR = 2
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};
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/* @1 ============================================================
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* 1 structure
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* 1 ============================================================
*/
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struct env_trig_rpt {
u8 nhm_rpt_stamp;
u8 clm_rpt_stamp;
};
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struct env_mntr_rpt {
u8 nhm_ratio;
u8 nhm_result[NHM_RPT_NUM];
u8 clm_ratio;
u8 nhm_rpt_stamp;
u8 clm_rpt_stamp;
};
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struct nhm_para_info {
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enum nhm_option_txon_all incld_txon; /*@Include TX on*/
enum nhm_option_cca_all incld_cca; /*@Include CCA*/
enum nhm_divider_opt_all div_opt; /*@divider option*/
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enum nhm_application nhm_app;
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enum phydm_nhm_level nhm_lv;
u16 mntr_time; /*@0~262 unit ms*/
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};
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struct clm_para_info {
enum clm_application clm_app;
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enum phydm_clm_level clm_lv;
u16 mntr_time; /*@0~262 unit ms*/
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};
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struct ccx_info {
u32 nhm_trigger_time;
u32 clm_trigger_time;
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u64 start_time; /*@monitor for the test duration*/
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#ifdef NHM_SUPPORT
enum nhm_application nhm_app;
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enum nhm_option_txon_all nhm_include_txon;
enum nhm_option_cca_all nhm_include_cca;
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enum nhm_divider_opt_all nhm_divider_opt;
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/*Report*/
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u8 nhm_th[NHM_TH_NUM];
u8 nhm_result[NHM_RPT_NUM];
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u16 nhm_period; /* @4us per unit */
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u8 nhm_igi;
u8 nhm_manual_ctrl;
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u8 nhm_ratio; /*@1% per nuit, it means the interference igi can't overcome.*/
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u8 nhm_rpt_sum;
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u16 nhm_duration; /*@Real time of NHM_VALID */
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u8 nhm_set_lv;
boolean nhm_ongoing;
u8 nhm_rpt_stamp;
#endif
#ifdef CLM_SUPPORT
enum clm_application clm_app;
u8 clm_manual_ctrl;
u8 clm_set_lv;
boolean clm_ongoing;
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u16 clm_period; /* @4us per unit */
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u16 clm_result;
u8 clm_ratio;
u32 clm_fw_result_acc;
u8 clm_fw_result_cnt;
enum clm_monitor_mode clm_mntr_mode;
u8 clm_rpt_stamp;
#endif
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#ifdef FAHM_SUPPORT
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boolean fahm_ongoing;
u8 env_mntr_igi;
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u8 fahm_nume_sel; /*@fahm_numerator_sel: select {FA, CRCOK, CRC_fail} */
u8 fahm_denom_sel; /*@fahm_denominator_sel: select {FA, CRCOK, CRC_fail} */
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u16 fahm_period; /*unit: 4us*/
#endif
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};
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/* @1 ============================================================
* 1 Function Prototype
* 1 ============================================================
*/
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#ifdef FAHM_SUPPORT
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void phydm_fahm_init(void *dm_void);
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void phydm_fahm_dbg(void *dm_void, char input[][16], u32 *_used, char *output,
u32 *_out_len);
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#endif
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/*@NHM*/
#ifdef NHM_SUPPORT
void phydm_nhm_trigger(void *dm_void);
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void phydm_nhm_init(void *dm_void);
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void phydm_nhm_dbg(void *dm_void, char input[][16], u32 *_used, char *output,
u32 *_out_len);
u8 phydm_get_igi(void *dm_void, enum bb_path path);
#endif
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/*@CLM*/
#ifdef CLM_SUPPORT
void phydm_clm_c2h_report_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len);
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void phydm_clm_h2c(void *dm_void, u16 obs_time, u8 fw_clm_en);
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void phydm_clm_setting(void *dm_void, u16 clm_period);
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void phydm_clm_trigger(void *dm_void);
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boolean phydm_clm_check_rdy(void *dm_void);
void phydm_clm_get_utility(void *dm_void);
boolean phydm_clm_get_result(void *dm_void);
u8 phydm_clm_mntr_set(void *dm_void, struct clm_para_info *clm_para);
void phydm_set_clm_mntr_mode(void *dm_void, enum clm_monitor_mode mode);
void phydm_clm_dbg(void *dm_void, char input[][16], u32 *_used, char *output,
u32 *_out_len);
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#endif
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u8 phydm_env_mntr_trigger(void *dm_void, struct nhm_para_info *nhm_para,
struct clm_para_info *clm_para,
struct env_trig_rpt *rpt);
u8 phydm_env_mntr_result(void *dm_void, struct env_mntr_rpt *rpt);
void phydm_env_mntr_watchdog(void *dm_void);
void phydm_env_monitor_init(void *dm_void);
void phydm_env_mntr_dbg(void *dm_void, char input[][16], u32 *_used,
char *output, u32 *_out_len);
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#endif