mirror of
https://github.com/chinawrj/rtl8812au
synced 2024-11-15 02:16:08 +00:00
317 lines
12 KiB
C
317 lines
12 KiB
C
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/******************************************************************************
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*
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* Copyright(c) 2007 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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#include "mp_precomp.h"
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#include "../../phydm_precomp.h"
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/*---------------------------Define Local Constant---------------------------*/
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/* 2010/04/25 MH Define the max tx power tracking tx agc power. */
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#define ODM_TXPWRTRACK_MAX_IDX8821A 6
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/*---------------------------Define Local Constant---------------------------*/
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/* 3 ============================================================
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* 3 Tx Power Tracking
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* 3 ============================================================ */
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void halrf_rf_lna_setting_8821a(
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struct dm_struct *dm,
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enum halrf_lna_set type
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)
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{
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/*phydm_disable_lna*/
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if (type == HALRF_LNA_DISABLE) {
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odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x1);
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odm_set_rf_reg(dm, RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/
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odm_set_rf_reg(dm, RF_PATH_A, 0x31, 0xfffff, 0x0002f);
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odm_set_rf_reg(dm, RF_PATH_A, 0x32, 0xfffff, 0xfb09b); /*disable LNA*/
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odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x0);
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} else if (type == HALRF_LNA_ENABLE) {
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odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x1);
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odm_set_rf_reg(dm, RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/
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odm_set_rf_reg(dm, RF_PATH_A, 0x31, 0xfffff, 0x0002f);
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odm_set_rf_reg(dm, RF_PATH_A, 0x32, 0xfffff, 0xfb0bb); /*disable LNA*/
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odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x0);
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}
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}
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void
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odm_tx_pwr_track_set_pwr8821a(
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void *dm_void,
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enum pwrtrack_method method,
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u8 rf_path,
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u8 channel_mapped_index
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)
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{
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struct dm_struct *dm = (struct dm_struct *)dm_void;
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struct _ADAPTER *adapter = dm->adapter;
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PHAL_DATA_TYPE hal_data = GET_HAL_DATA(adapter);
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u8 pwr_tracking_limit = 26; /* +1.0dB */
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u8 tx_rate = 0xFF;
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u8 final_ofdm_swing_index = 0;
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u8 final_cck_swing_index = 0;
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u8 i = 0;
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u32 final_bb_swing_idx[1];
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struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info);
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struct _hal_rf_ *rf = &(dm->rf_table);
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if (*(dm->mp_mode) == true) {
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#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
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#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
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#if (MP_DRIVER == 1)
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PMPT_CONTEXT p_mpt_ctx = &(adapter->mpt_ctx);
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tx_rate = mpt_to_mgnt_rate(p_mpt_ctx->mpt_rate_index);
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#endif
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#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
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#ifdef CONFIG_MP_INCLUDED
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PMPT_CONTEXT p_mpt_ctx = &(adapter->mppriv.mpt_ctx);
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tx_rate = mpt_to_mgnt_rate(p_mpt_ctx->mpt_rate_index);
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#endif
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#endif
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#endif
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} else {
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u16 rate = *(dm->forced_data_rate);
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if (!rate) { /*auto rate*/
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#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
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tx_rate = adapter->HalFunc.GetHwRateFromMRateHandler(dm->tx_rate);
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#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
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if (dm->number_linked_client != 0)
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tx_rate = hw_rate_to_m_rate(dm->tx_rate);
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else
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tx_rate = rf->p_rate_index;
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#endif
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} else /*force rate*/
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tx_rate = (u8)rate;
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}
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//PHYDM_DBG(dm, DBG_COMP_MCC, "Power Tracking tx_rate=0x%X\n", tx_rate);
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//PHYDM_DBG(dm, DBG_COMP_MCC, "===>odm_tx_pwr_track_set_pwr8821a\n");
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if (tx_rate != 0xFF) {
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/* 2 CCK */
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if (((tx_rate >= MGN_1M) && (tx_rate <= MGN_5_5M)) || (tx_rate == MGN_11M))
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pwr_tracking_limit = 32; /* +4dB */
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/* 2 OFDM */
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else if ((tx_rate >= MGN_6M) && (tx_rate <= MGN_48M))
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pwr_tracking_limit = 30; /* +3dB */
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else if (tx_rate == MGN_54M)
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pwr_tracking_limit = 28; /* +2dB */
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/* 2 HT */
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else if ((tx_rate >= MGN_MCS0) && (tx_rate <= MGN_MCS2)) /* QPSK/BPSK */
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pwr_tracking_limit = 34; /* +5dB */
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else if ((tx_rate >= MGN_MCS3) && (tx_rate <= MGN_MCS4)) /* 16QAM */
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pwr_tracking_limit = 30; /* +3dB */
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else if ((tx_rate >= MGN_MCS5) && (tx_rate <= MGN_MCS7)) /* 64QAM */
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pwr_tracking_limit = 28; /* +2dB */
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/* 2 VHT */
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else if ((tx_rate >= MGN_VHT1SS_MCS0) && (tx_rate <= MGN_VHT1SS_MCS2)) /* QPSK/BPSK */
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pwr_tracking_limit = 34; /* +5dB */
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else if ((tx_rate >= MGN_VHT1SS_MCS3) && (tx_rate <= MGN_VHT1SS_MCS4)) /* 16QAM */
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pwr_tracking_limit = 30; /* +3dB */
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else if ((tx_rate >= MGN_VHT1SS_MCS5) && (tx_rate <= MGN_VHT1SS_MCS6)) /* 64QAM */
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pwr_tracking_limit = 28; /* +2dB */
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else if (tx_rate == MGN_VHT1SS_MCS7) /* 64QAM */
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pwr_tracking_limit = 26; /* +1dB */
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else if (tx_rate == MGN_VHT1SS_MCS8) /* 256QAM */
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pwr_tracking_limit = 24; /* +0dB */
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else if (tx_rate == MGN_VHT1SS_MCS9) /* 256QAM */
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pwr_tracking_limit = 22; /* -1dB */
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else
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pwr_tracking_limit = 24;
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}
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//PHYDM_DBG(dm, DBG_COMP_MCC, "tx_rate=0x%x, pwr_tracking_limit=%d\n", tx_rate, pwr_tracking_limit);
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if (method == BBSWING) {
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if (rf_path == RF_PATH_A) {
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final_bb_swing_idx[RF_PATH_A] = (dm->rf_calibrate_info.OFDM_index[RF_PATH_A] > pwr_tracking_limit) ? pwr_tracking_limit : dm->rf_calibrate_info.OFDM_index[RF_PATH_A];
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/*PHYDM_DBG(dm, DBG_COMP_MCC, "dm->rf_calibrate_info.OFDM_index[RF_PATH_A]=%d, dm->RealBbSwingIdx[RF_PATH_A]=%d\n",
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dm->rf_calibrate_info.OFDM_index[RF_PATH_A], final_bb_swing_idx[RF_PATH_A]);*/
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odm_set_bb_reg(dm, REG_A_TX_SCALE_JAGUAR, 0xFFE00000, tx_scaling_table_jaguar[final_bb_swing_idx[RF_PATH_A]]);
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}
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} else if (method == MIX_MODE) {
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/*PHYDM_DBG(dm, DBG_COMP_MCC, "cali_info->default_ofdm_index=%d, cali_info->absolute_ofdm_swing_idx[rf_path]=%d, rf_path = %d\n",
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cali_info->default_ofdm_index, cali_info->absolute_ofdm_swing_idx[rf_path], rf_path);*/
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final_cck_swing_index = cali_info->default_cck_index + cali_info->absolute_ofdm_swing_idx[rf_path];
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final_ofdm_swing_index = cali_info->default_ofdm_index + cali_info->absolute_ofdm_swing_idx[rf_path];
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if (rf_path == RF_PATH_A) {
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if (final_ofdm_swing_index > pwr_tracking_limit) { /*BBSwing higher then Limit*/
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cali_info->remnant_cck_swing_idx = final_cck_swing_index - pwr_tracking_limit;
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cali_info->remnant_ofdm_swing_idx[rf_path] = final_ofdm_swing_index - pwr_tracking_limit;
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odm_set_bb_reg(dm, REG_A_TX_SCALE_JAGUAR, 0xFFE00000, tx_scaling_table_jaguar[pwr_tracking_limit]);
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cali_info->modify_tx_agc_flag_path_a = true;
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phy_set_tx_power_level_by_path(adapter, *dm->channel, RF_PATH_A);
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//PHYDM_DBG(dm, DBG_COMP_MCC, "******Path_A Over BBSwing Limit, pwr_tracking_limit = %d, Remnant tx_agc value = %d\n", pwr_tracking_limit, cali_info->remnant_ofdm_swing_idx[rf_path]);
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} else if (final_ofdm_swing_index <= 0) {
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cali_info->remnant_cck_swing_idx = final_cck_swing_index;
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cali_info->remnant_ofdm_swing_idx[rf_path] = final_ofdm_swing_index;
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odm_set_bb_reg(dm, REG_A_TX_SCALE_JAGUAR, 0xFFE00000, tx_scaling_table_jaguar[0]);
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cali_info->modify_tx_agc_flag_path_a = true;
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phy_set_tx_power_level_by_path(adapter, *dm->channel, RF_PATH_A);
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//PHYDM_DBG(dm, DBG_COMP_MCC, "******Path_A Lower then BBSwing lower bound 0, Remnant tx_agc value = %d\n", cali_info->remnant_ofdm_swing_idx[rf_path]);
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} else {
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odm_set_bb_reg(dm, REG_A_TX_SCALE_JAGUAR, 0xFFE00000, tx_scaling_table_jaguar[final_ofdm_swing_index]);
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//PHYDM_DBG(dm, DBG_COMP_MCC, "******Path_A Compensate with BBSwing, final_ofdm_swing_index = %d\n", final_ofdm_swing_index);
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if (cali_info->modify_tx_agc_flag_path_a) { /*If tx_agc has changed, reset tx_agc again*/
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cali_info->remnant_cck_swing_idx = 0;
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cali_info->remnant_ofdm_swing_idx[rf_path] = 0;
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phy_set_tx_power_level_by_path(adapter, *dm->channel, RF_PATH_A);
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cali_info->modify_tx_agc_flag_path_a = false;
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PHYDM_DBG(dm, DBG_COMP_MCC, "******Path_A dm->Modify_TxAGC_Flag = false\n");
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}
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}
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}
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} else
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return;
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} /* odm_TxPwrTrackSetPwr88E */
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void
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get_delta_swing_table_8821a(
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void *dm_void,
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u8 **temperature_up_a,
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u8 **temperature_down_a,
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u8 **temperature_up_b,
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u8 **temperature_down_b
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)
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{
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struct dm_struct *dm = (struct dm_struct *)dm_void;
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struct _ADAPTER *adapter = dm->adapter;
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struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info);
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struct _hal_rf_ *rf = &(dm->rf_table);
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HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
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u8 tx_rate = 0xFF;
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u8 channel = *dm->channel;
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if (*(dm->mp_mode) == true) {
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#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
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#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
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#if (MP_DRIVER == 1)
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PMPT_CONTEXT p_mpt_ctx = &(adapter->mpt_ctx);
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tx_rate = mpt_to_mgnt_rate(p_mpt_ctx->mpt_rate_index);
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#endif
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#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
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#ifdef CONFIG_MP_INCLUDED
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PMPT_CONTEXT p_mpt_ctx = &(adapter->mppriv.mpt_ctx);
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tx_rate = mpt_to_mgnt_rate(p_mpt_ctx->mpt_rate_index);
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#endif
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#endif
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#endif
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} else {
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u16 rate = *(dm->forced_data_rate);
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if (!rate) { /*auto rate*/
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#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
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tx_rate = adapter->HalFunc.GetHwRateFromMRateHandler(dm->tx_rate);
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#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
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if (dm->number_linked_client != 0)
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tx_rate = hw_rate_to_m_rate(dm->tx_rate);
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else
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tx_rate = rf->p_rate_index;
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#endif
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} else /*force rate*/
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tx_rate = (u8)rate;
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}
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//PHYDM_DBG(dm, DBG_COMP_MCC, "Power Tracking tx_rate=0x%X\n", tx_rate);
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if (1 <= channel && channel <= 14) {
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if (IS_CCK_RATE(tx_rate)) {
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*temperature_up_a = cali_info->delta_swing_table_idx_2g_cck_a_p;
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*temperature_down_a = cali_info->delta_swing_table_idx_2g_cck_a_n;
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*temperature_up_b = cali_info->delta_swing_table_idx_2g_cck_b_p;
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*temperature_down_b = cali_info->delta_swing_table_idx_2g_cck_b_n;
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} else {
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*temperature_up_a = cali_info->delta_swing_table_idx_2ga_p;
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*temperature_down_a = cali_info->delta_swing_table_idx_2ga_n;
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*temperature_up_b = cali_info->delta_swing_table_idx_2gb_p;
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*temperature_down_b = cali_info->delta_swing_table_idx_2gb_n;
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}
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} else if (36 <= channel && channel <= 64) {
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*temperature_up_a = cali_info->delta_swing_table_idx_5ga_p[0];
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*temperature_down_a = cali_info->delta_swing_table_idx_5ga_n[0];
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*temperature_up_b = cali_info->delta_swing_table_idx_5gb_p[0];
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*temperature_down_b = cali_info->delta_swing_table_idx_5gb_n[0];
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} else if (100 <= channel && channel <= 144) {
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*temperature_up_a = cali_info->delta_swing_table_idx_5ga_p[1];
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*temperature_down_a = cali_info->delta_swing_table_idx_5ga_n[1];
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*temperature_up_b = cali_info->delta_swing_table_idx_5gb_p[1];
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*temperature_down_b = cali_info->delta_swing_table_idx_5gb_n[1];
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} else if (149 <= channel && channel <= 177) {
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*temperature_up_a = cali_info->delta_swing_table_idx_5ga_p[2];
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*temperature_down_a = cali_info->delta_swing_table_idx_5ga_n[2];
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*temperature_up_b = cali_info->delta_swing_table_idx_5gb_p[2];
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*temperature_down_b = cali_info->delta_swing_table_idx_5gb_n[2];
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} else {
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*temperature_up_a = (u8 *)delta_swing_table_idx_2ga_p_8188e;
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|
|
*temperature_down_a = (u8 *)delta_swing_table_idx_2ga_n_8188e;
|
||
|
|
*temperature_up_b = (u8 *)delta_swing_table_idx_2ga_p_8188e;
|
||
|
|
*temperature_down_b = (u8 *)delta_swing_table_idx_2ga_n_8188e;
|
||
|
|
}
|
||
|
|
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
|
||
|
|
void configure_txpower_track_8821a(
|
||
|
|
struct txpwrtrack_cfg *config
|
||
|
|
)
|
||
|
|
{
|
||
|
|
config->swing_table_size_cck = TXSCALE_TABLE_SIZE;
|
||
|
|
config->swing_table_size_ofdm = TXSCALE_TABLE_SIZE;
|
||
|
|
config->threshold_iqk = IQK_THRESHOLD;
|
||
|
|
config->average_thermal_num = AVG_THERMAL_NUM_8812A;
|
||
|
|
config->rf_path_count = MAX_PATH_NUM_8821A;
|
||
|
|
config->thermal_reg_addr = RF_T_METER_8812A;
|
||
|
|
|
||
|
|
config->odm_tx_pwr_track_set_pwr = odm_tx_pwr_track_set_pwr8821a;
|
||
|
|
config->do_iqk = do_iqk_8821a;
|
||
|
|
config->phy_lc_calibrate = halrf_lck_trigger;
|
||
|
|
config->get_delta_swing_table = get_delta_swing_table_8821a;
|
||
|
|
}
|
||
|
|
|
||
|
|
void
|
||
|
|
phy_lc_calibrate_8821a(
|
||
|
|
void *dm_void
|
||
|
|
)
|
||
|
|
{
|
||
|
|
struct dm_struct *dm = (struct dm_struct *)dm_void;
|
||
|
|
|
||
|
|
phy_lc_calibrate_8812a(dm);
|
||
|
|
}
|