mirror of
https://github.com/gnab/rtl8812au
synced 2024-11-27 07:34:24 +00:00
326 lines
14 KiB
C
326 lines
14 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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#ifndef __RTL8812A_HAL_H__
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#define __RTL8812A_HAL_H__
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//#include "hal_com.h"
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#if 1
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#include "hal_data.h"
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#else
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#include "../hal/OUTSRC/odm_precomp.h"
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#endif
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//include HAL Related header after HAL Related compiling flags
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#include "rtl8812a_spec.h"
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#include "rtl8812a_rf.h"
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#include "rtl8812a_dm.h"
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#include "rtl8812a_recv.h"
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#include "rtl8812a_xmit.h"
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#include "rtl8812a_cmd.h"
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#include "rtl8812a_led.h"
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#include "Hal8812PwrSeq.h"
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#include "Hal8821APwrSeq.h" //for 8821A/8811A
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#include "Hal8812PhyReg.h"
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#include "Hal8812PhyCfg.h"
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#ifdef DBG_CONFIG_ERROR_DETECT
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#include "rtl8812a_sreset.h"
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#endif
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//---------------------------------------------------------------------
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// RTL8812AU From header
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//---------------------------------------------------------------------
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#define RTL8812_FW_IMG "rtl8812AU\\rtl8812Ufw.bin"
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#define RTL8812_FW_WW_IMG "rtl8812AU\\rtl8812Ufwww.bin"
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#define RTL8812_PHY_REG "rtl8812AU\\PHY_REG.txt"
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#define RTL8812_PHY_RADIO_A "rtl8812AU\\RadioA.txt"
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#define RTL8812_PHY_RADIO_B "rtl8812AU\\RadioB.txt"
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#define RTL8812_TXPWR_TRACK "rtl8812AU\\TxPowerTrack.txt"
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#define RTL8812_AGC_TAB "rtl8812AU\\AGC_TAB.txt"
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#define RTL8812_PHY_MACREG "rtl8812AU\\MAC_REG.txt"
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#define RTL8812_PHY_REG_PG "rtl8812AU\\PHY_REG_PG.txt"
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#define RTL8812_PHY_REG_MP "rtl8812AU\\PHY_REG_MP.txt"
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#define RTL8812_TXPWR_LMT "rtl8812AU\\TXPWR_LMT.txt"
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//---------------------------------------------------------------------
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// RTL8821U From file
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//---------------------------------------------------------------------
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#define RTL8821_FW_IMG "rtl8821AU\\rtl8821Ufw.bin"
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#define RTL8821_FW_WW_IMG "rtl8821AU\\rtl8821Ufwww.bin"
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#define RTL8821_PHY_REG "rtl8821AU\\PHY_REG.txt"
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#define RTL8821_PHY_RADIO_A "rtl8821AU\\RadioA.txt"
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#define RTL8821_PHY_RADIO_B "rtl8821AU\\RadioB.txt"
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#define RTL8821_TXPWR_TRACK "rtl8821AU\\TxPowerTrack.txt"
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#define RTL8821_AGC_TAB "rtl8821AU\\AGC_TAB.txt"
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#define RTL8821_PHY_MACREG "rtl8821AU\\MAC_REG.txt"
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#define RTL8821_PHY_REG_PG "rtl8821AU\\PHY_REG_PG.txt"
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#define RTL8821_PHY_REG_MP "rtl8821AU\\PHY_REG_MP.txt"
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#define RTL8821_TXPWR_LMT "rtl8821AU\\TXPWR_LMT.txt"
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//---------------------------------------------------------------------
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// RTL8812 Power Configuration CMDs for PCIe interface
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//---------------------------------------------------------------------
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#define Rtl8812_NIC_PWR_ON_FLOW rtl8812_power_on_flow
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#define Rtl8812_NIC_RF_OFF_FLOW rtl8812_radio_off_flow
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#define Rtl8812_NIC_DISABLE_FLOW rtl8812_card_disable_flow
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#define Rtl8812_NIC_ENABLE_FLOW rtl8812_card_enable_flow
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#define Rtl8812_NIC_SUSPEND_FLOW rtl8812_suspend_flow
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#define Rtl8812_NIC_RESUME_FLOW rtl8812_resume_flow
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#define Rtl8812_NIC_PDN_FLOW rtl8812_hwpdn_flow
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#define Rtl8812_NIC_LPS_ENTER_FLOW rtl8812_enter_lps_flow
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#define Rtl8812_NIC_LPS_LEAVE_FLOW rtl8812_leave_lps_flow
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//---------------------------------------------------------------------
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// RTL8821 Power Configuration CMDs for PCIe interface
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//---------------------------------------------------------------------
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#define Rtl8821A_NIC_PWR_ON_FLOW rtl8821A_power_on_flow
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#define Rtl8821A_NIC_RF_OFF_FLOW rtl8821A_radio_off_flow
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#define Rtl8821A_NIC_DISABLE_FLOW rtl8821A_card_disable_flow
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#define Rtl8821A_NIC_ENABLE_FLOW rtl8821A_card_enable_flow
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#define Rtl8821A_NIC_SUSPEND_FLOW rtl8821A_suspend_flow
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#define Rtl8821A_NIC_RESUME_FLOW rtl8821A_resume_flow
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#define Rtl8821A_NIC_PDN_FLOW rtl8821A_hwpdn_flow
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#define Rtl8821A_NIC_LPS_ENTER_FLOW rtl8821A_enter_lps_flow
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#define Rtl8821A_NIC_LPS_LEAVE_FLOW rtl8821A_leave_lps_flow
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#if 1 // download firmware related data structure
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#define FW_SIZE_8812 0x8000 // Compatible with RTL8723 Maximal RAM code size 24K. modified to 32k, TO compatible with 92d maximal fw size 32k
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#define FW_START_ADDRESS 0x1000
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#define FW_END_ADDRESS 0x5FFF
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typedef struct _RT_FIRMWARE_8812 {
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FIRMWARE_SOURCE eFWSource;
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#ifdef CONFIG_EMBEDDED_FWIMG
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u8* szFwBuffer;
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#else
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u8 szFwBuffer[FW_SIZE_8812];
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#endif
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u32 ulFwLength;
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#ifdef CONFIG_WOWLAN
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u8* szWoWLANFwBuffer;
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u32 ulWoWLANFwLength;
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#endif //CONFIG_WOWLAN
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} RT_FIRMWARE_8812, *PRT_FIRMWARE_8812;
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//
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// This structure must be cared byte-ordering
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//
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// Added by tynli. 2009.12.04.
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#define IS_FW_HEADER_EXIST_8812(_pFwHdr) ((GET_FIRMWARE_HDR_SIGNATURE_8812(_pFwHdr) &0xFFF0) == 0x9500)
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#define IS_FW_HEADER_EXIST_8821(_pFwHdr) ((GET_FIRMWARE_HDR_SIGNATURE_8812(_pFwHdr) &0xFFF0) == 0x2100)
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//=====================================================
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// Firmware Header(8-byte alinment required)
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//=====================================================
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//--- LONG WORD 0 ----
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#define GET_FIRMWARE_HDR_SIGNATURE_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 0, 16) // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut
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#define GET_FIRMWARE_HDR_CATEGORY_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 16, 8) // AP/NIC and USB/PCI
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#define GET_FIRMWARE_HDR_FUNCTION_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 24, 8) // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions
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#define GET_FIRMWARE_HDR_VERSION_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 0, 16)// FW Version
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#define GET_FIRMWARE_HDR_SUB_VER_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 16, 8) // FW Subversion, default 0x00
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#define GET_FIRMWARE_HDR_RSVD1_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 24, 8)
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//--- LONG WORD 1 ----
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#define GET_FIRMWARE_HDR_MONTH_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 0, 8) // Release time Month field
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#define GET_FIRMWARE_HDR_DATE_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 8, 8) // Release time Date field
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#define GET_FIRMWARE_HDR_HOUR_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 16, 8)// Release time Hour field
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#define GET_FIRMWARE_HDR_MINUTE_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 24, 8)// Release time Minute field
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#define GET_FIRMWARE_HDR_ROMCODE_SIZE_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 0, 16)// The size of RAM code
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#define GET_FIRMWARE_HDR_RSVD2_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 16, 16)
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//--- LONG WORD 2 ----
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#define GET_FIRMWARE_HDR_SVN_IDX_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 0, 32)// The SVN entry index
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#define GET_FIRMWARE_HDR_RSVD3_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+20, 0, 32)
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//--- LONG WORD 3 ----
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#define GET_FIRMWARE_HDR_RSVD4_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 0, 32)
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#define GET_FIRMWARE_HDR_RSVD5_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+28, 0, 32)
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#endif // download firmware related data structure
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#define DRIVER_EARLY_INT_TIME_8812 0x05
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#define BCN_DMA_ATIME_INT_TIME_8812 0x02
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//for 8812
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#define MAX_RX_DMA_BUFFER_SIZE_8812 0x3E80 //0x3FFF // RX 16K
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#define TX_TOTAL_PAGE_NUMBER_8812 0xF8
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#define TX_PAGE_BOUNDARY_8812 (TX_TOTAL_PAGE_NUMBER_8812 + 1)
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#define TX_PAGE_LOAD_FW_BOUNDARY_8812 0x47 //0xA5
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#define TX_PAGE_BOUNDARY_WOWLAN_8812 0xE0
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// For Normal Chip Setting
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// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_92C
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#define NORMAL_PAGE_NUM_PUBQ_8812 0xD8
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#define NORMAL_PAGE_NUM_LPQ_8812 0x10
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#define NORMAL_PAGE_NUM_HPQ_8812 0x10
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#define NORMAL_PAGE_NUM_NPQ_8812 0x00
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//Note: For WMM Normal Chip Setting ,modify later
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#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8812 0xFB
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#define WMM_NORMAL_TX_PAGE_BOUNDARY_8812 (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8812 + 1)
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#define WMM_NORMAL_PAGE_NUM_PUBQ_8812 0x8B
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#define WMM_NORMAL_PAGE_NUM_HPQ_8812 0x30
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#define WMM_NORMAL_PAGE_NUM_LPQ_8812 0x20
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#define WMM_NORMAL_PAGE_NUM_NPQ_8812 0x20
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// for 8821A
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// TX 64K, RX 16K, Page size 256B for TX, 128B for RX
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#define PAGE_SIZE_TX_8821A 256
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#define PAGE_SIZE_RX_8821A 128
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#define MAX_RX_DMA_BUFFER_SIZE_8821 0x3E80 // RX 16K
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// For Normal Chip Setting
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#define TX_TOTAL_PAGE_NUMBER_8821 0xF7
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#define TX_PAGE_BOUNDARY_8821 (TX_TOTAL_PAGE_NUMBER_8821 + 1)
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//#define TX_PAGE_BOUNDARY_WOWLAN_8821 0xE0
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// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER
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#define NORMAL_PAGE_NUM_PUBQ_8821 0xE7
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#define NORMAL_PAGE_NUM_LPQ_8821 0x08
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#define NORMAL_PAGE_NUM_HPQ_8821 0x08
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#define NORMAL_PAGE_NUM_NPQ_8821 0x00
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// For WMM Normal Chip Setting
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#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8821 0xFB
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#define WMM_NORMAL_TX_PAGE_BOUNDARY_8821 (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8821 + 1)
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#define WMM_NORMAL_PAGE_NUM_PUBQ_8821 0x8B
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#define WMM_NORMAL_PAGE_NUM_HPQ_8821 0x30
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#define WMM_NORMAL_PAGE_NUM_LPQ_8821 0x20
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#define WMM_NORMAL_PAGE_NUM_NPQ_8821 0x20
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#define EFUSE_HIDDEN_812AU 0
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#define EFUSE_HIDDEN_812AU_VS 1
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#define EFUSE_HIDDEN_812AU_VL 2
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#define EFUSE_HIDDEN_812AU_VN 3
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#ifdef CONFIG_PCI_HCI
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#define EFUSE_REAL_CONTENT_LEN_JAGUAR 1024
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#define HWSET_MAX_SIZE_JAGUAR 1024
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#else
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#define EFUSE_REAL_CONTENT_LEN_JAGUAR 512
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#define HWSET_MAX_SIZE_JAGUAR 512
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#endif
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#define EFUSE_MAX_BANK_8812A 2
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#define EFUSE_MAP_LEN_JAGUAR 512
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#define EFUSE_MAX_SECTION_JAGUAR 64
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#define EFUSE_MAX_WORD_UNIT_JAGUAR 4
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#define EFUSE_IC_ID_OFFSET_JAGUAR 506 //For some inferiority IC purpose. added by Roger, 2009.09.02.
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#define AVAILABLE_EFUSE_ADDR_8812(addr) (addr < EFUSE_REAL_CONTENT_LEN_JAGUAR)
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// <Roger_Notes> To prevent out of boundary programming case, leave 1byte and program full section
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// 9bytes + 1byt + 5bytes and pre 1byte.
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// For worst case:
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// | 2byte|----8bytes----|1byte|--7bytes--| //92D
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#define EFUSE_OOB_PROTECT_BYTES_JAGUAR 18 // PG data exclude header, dummy 7 bytes frome CP test and reserved 1byte.
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#define EFUSE_PROTECT_BYTES_BANK_JAGUAR 16
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// Added for different registry settings to adjust TxPwr index. added by Roger, 2010.03.09.
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typedef enum _TX_PWR_PERCENTAGE{
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TX_PWR_PERCENTAGE_0 = 0x01, // 12.5%
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TX_PWR_PERCENTAGE_1 = 0x02, // 25%
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TX_PWR_PERCENTAGE_2 = 0x04, // 50%
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TX_PWR_PERCENTAGE_3 = 0x08, //100%, default target output power.
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} TX_PWR_PERCENTAGE;
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#define GET_RF_TYPE(priv) (GET_HAL_DATA(priv)->rf_type)
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#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT)
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#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS)
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//#define IS_MULTI_FUNC_CHIP(_Adapter) (((((PHAL_DATA_TYPE)(_Adapter->HalData))->MultiFunc) & (RT_MULTI_FUNC_BT|RT_MULTI_FUNC_GPS)) ? _TRUE : _FALSE)
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//#define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) )
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#define GetRegTxBBSwing_2G(_Adapter) (_Adapter->registrypriv.TxBBSwing_2G)
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#define GetRegTxBBSwing_5G(_Adapter) (_Adapter->registrypriv.TxBBSwing_5G)
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#define GetRegAmplifierType2G(_Adapter) (_Adapter->registrypriv.AmplifierType_2G)
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#define GetRegAmplifierType5G(_Adapter) (_Adapter->registrypriv.AmplifierType_5G)
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#define GetRegbENRFEType(_Adapter) (_Adapter->registrypriv.bEn_RFE)
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#define GetRegRFEType(_Adapter) (_Adapter->registrypriv.RFE_Type)
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#define GetDefaultAdapter(padapter) padapter
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// rtl8812_hal_init.c
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void _8051Reset8812(PADAPTER padapter);
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s32 FirmwareDownload8812(PADAPTER Adapter, BOOLEAN bUsedWoWLANFw);
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void InitializeFirmwareVars8812(PADAPTER padapter);
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s32 InitLLTTable8812(PADAPTER padapter, u8 txpktbuf_bndy);
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void InitRDGSetting8812A(PADAPTER padapter);
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void CheckAutoloadState8812A(PADAPTER padapter);
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// EFuse
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u8 GetEEPROMSize8812A(PADAPTER padapter);
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void InitPGData8812A(PADAPTER padapter);
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void Hal_EfuseParseIDCode8812A(PADAPTER padapter, u8 *hwinfo);
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void Hal_ReadPROMVersion8812A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail);
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void Hal_ReadTxPowerInfo8812A(PADAPTER padapter,u8* hwinfo,BOOLEAN AutoLoadFail);
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void Hal_ReadBoardType8812A(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail);
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void Hal_ReadThermalMeter_8812A(PADAPTER Adapter,u8* PROMContent,BOOLEAN AutoloadFail);
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void Hal_ReadChannelPlan8812A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail);
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void Hal_EfuseParseXtal_8812A(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail);
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void Hal_ReadAntennaDiversity8812A(PADAPTER pAdapter,u8* PROMContent,BOOLEAN AutoLoadFail);
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void Hal_ReadPAType_8812A(PADAPTER Adapter,u8* PROMContent, BOOLEAN AutoloadFail);
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void Hal_ReadPAType_8821A(PADAPTER Adapter,u8* PROMContent, BOOLEAN AutoloadFail);
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void Hal_ReadRFEType_8812A(PADAPTER Adapter,u8* PROMContent, BOOLEAN AutoloadFail);
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void Hal_EfuseParseBTCoexistInfo8812A(PADAPTER Adapter, u8* hwinfo, BOOLEAN AutoLoadFail);
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void hal_ReadUsbType_8812AU(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail);
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BOOLEAN HalDetectPwrDownMode8812(PADAPTER Adapter);
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#ifdef CONFIG_WOWLAN
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void Hal_DetectWoWMode(PADAPTER pAdapter);
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#endif //CONFIG_WOWLAN
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void _InitBeaconParameters_8812A(PADAPTER padapter);
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void SetBeaconRelatedRegisters8812A(PADAPTER padapter);
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void ReadRFType8812A(PADAPTER padapter);
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void InitDefaultValue8821A(PADAPTER padapter);
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void SetHwReg8812A(PADAPTER padapter, u8 variable, u8 *pval);
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void GetHwReg8812A(PADAPTER padapter, u8 variable, u8 *pval);
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u8 SetHalDefVar8812A(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval);
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u8 GetHalDefVar8812A(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval);
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void rtl8812_set_hal_ops(struct hal_ops *pHalFunc);
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// register
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void SetBcnCtrlReg(PADAPTER padapter, u8 SetBits, u8 ClearBits);
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void rtl8812_clone_haldata(PADAPTER dst_adapter, PADAPTER src_adapter);
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void rtl8812_start_thread(PADAPTER padapter);
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void rtl8812_stop_thread(PADAPTER padapter);
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#endif //__RTL8188E_HAL_H__
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