mirror of
https://github.com/gnab/rtl8812au
synced 2024-11-27 07:34:24 +00:00
151 lines
4.7 KiB
C
151 lines
4.7 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*******************************************************************************/
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#ifndef __RTL8723B_SPEC_H__
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#define __RTL8723B_SPEC_H__
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#include <drv_conf.h>
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#define HAL_NAV_UPPER_UNIT_8723B 128 // micro-second
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//-----------------------------------------------------
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//
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// 0x0000h ~ 0x00FFh System Configuration
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//
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//-----------------------------------------------------
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#define REG_BT_WIFI_ANTENNA_SWITCH_8723B 0x0038
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#define REG_PAD_CTRL1_8723B 0x0064
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#define REG_AFE_CTRL_4_8723B 0x0078
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#define REG_HMEBOX_DBG_0_8723B 0x0088
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#define REG_HMEBOX_DBG_1_8723B 0x008A
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#define REG_HMEBOX_DBG_2_8723B 0x008C
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#define REG_HMEBOX_DBG_3_8723B 0x008E
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//-----------------------------------------------------
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//
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// 0x0100h ~ 0x01FFh MACTOP General Configuration
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//
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//-----------------------------------------------------
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#define REG_C2HEVT_CMD_ID_8723B 0x01A0
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#define REG_C2HEVT_CMD_LEN_8723B 0x01AE
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#define REG_WOWLAN_WAKE_REASON_8723B 0x01C7
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#define REG_HMEBOX_EXT0_8723B 0x01F0
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#define REG_HMEBOX_EXT1_8723B 0x01F4
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#define REG_HMEBOX_EXT2_8723B 0x01F8
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#define REG_HMEBOX_EXT3_8723B 0x01FC
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//-----------------------------------------------------
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//
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// 0x0200h ~ 0x027Fh TXDMA Configuration
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//
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//-----------------------------------------------------
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//-----------------------------------------------------
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//
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// 0x0280h ~ 0x02FFh RXDMA Configuration
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//
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//-----------------------------------------------------
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#define REG_RXDMA_MODE_CTRL_8723B 0x0290
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//-----------------------------------------------------
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//
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// 0x0300h ~ 0x03FFh PCIe
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//
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//-----------------------------------------------------
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//-----------------------------------------------------
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//
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// 0x0400h ~ 0x047Fh Protocol Configuration
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//
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//-----------------------------------------------------
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#define REG_TXPKTBUF_BCNQ_BDNY_8723B 0x0424
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#define REG_TXPKTBUF_MGQ_BDNY_8723B 0x0425
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#define REG_TXPKTBUF_WMAC_LBK_BF_HD_8723B 0x045D
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//-----------------------------------------------------
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//
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// 0x0500h ~ 0x05FFh EDCA Configuration
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//
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//-----------------------------------------------------
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#define REG_SECONDARY_CCA_CTRL_8723B 0x0577
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//-----------------------------------------------------
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//
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// 0x0600h ~ 0x07FFh WMAC Configuration
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//
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//-----------------------------------------------------
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//============================================================================
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// 8723 Regsiter Bit and Content definition
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//============================================================================
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//2 HSISR
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// interrupt mask which needs to clear
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#define MASK_HSISR_CLEAR (HSISR_GPIO12_0_INT |\
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HSISR_SPS_OCP_INT |\
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HSISR_RON_INT |\
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HSISR_PDNINT |\
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HSISR_GPIO9_INT)
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//-----------------------------------------------------
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//
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// 0x0100h ~ 0x01FFh MACTOP General Configuration
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//
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//-----------------------------------------------------
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#define RXDMA_AGG_MODE_EN BIT(1)
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//-----------------------------------------------------
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//
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// 0x0200h ~ 0x027Fh TXDMA Configuration
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//
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//-----------------------------------------------------
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//-----------------------------------------------------
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//
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// 0x0280h ~ 0x02FFh RXDMA Configuration
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//
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//-----------------------------------------------------
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#ifdef CONFIG_WOWLAN_8723
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#define RXPKT_RELEASE_POLL BIT(16)
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#define RXDMA_IDLE BIT(17)
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#define RW_RELEASE_EN BIT(18)
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#endif
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//-----------------------------------------------------
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//
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// 0x0400h ~ 0x047Fh Protocol Configuration
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//
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//-----------------------------------------------------
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//-----------------------------------------------------
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//
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// 0x0500h ~ 0x05FFh EDCA Configuration
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//
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//-----------------------------------------------------
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//-----------------------------------------------------
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//
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// 0x0600h ~ 0x07FFh WMAC Configuration
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//
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//-----------------------------------------------------
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#endif
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