mirror of
https://github.com/gnab/rtl8812au
synced 2024-11-26 23:25:28 +00:00
494 lines
14 KiB
C
494 lines
14 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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#define _HAL_COM_C_
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#include <drv_types.h>
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#include "../hal/OUTSRC/odm_precomp.h"
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void dump_chip_info(HAL_VERSION ChipVersion)
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{
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int cnt = 0;
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u8 buf[128];
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if(IS_81XXC(ChipVersion)){
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cnt += sprintf((buf+cnt), "Chip Version Info: %s_", IS_92C_SERIAL(ChipVersion)?"CHIP_8192C":"CHIP_8188C");
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}
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else if(IS_92D(ChipVersion)){
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cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8192D_");
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}
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else if(IS_8723_SERIES(ChipVersion)){
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cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8723A_");
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}
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else if(IS_8188E(ChipVersion)){
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cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8188E_");
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}
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else if(IS_8812_SERIES(ChipVersion)){
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cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8812_");
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}
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else if(IS_8192E(ChipVersion)){
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cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8192E_");
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}
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else if(IS_8821_SERIES(ChipVersion)){
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cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8821_");
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}
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else if(IS_8723B_SERIES(ChipVersion)){
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cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8723B_");
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}
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cnt += sprintf((buf+cnt), "%s_", IS_NORMAL_CHIP(ChipVersion)?"Normal_Chip":"Test_Chip");
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if(IS_CHIP_VENDOR_TSMC(ChipVersion))
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cnt += sprintf((buf+cnt), "%s_","TSMC");
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else if(IS_CHIP_VENDOR_UMC(ChipVersion))
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cnt += sprintf((buf+cnt), "%s_","UMC");
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else if(IS_CHIP_VENDOR_SMIC(ChipVersion))
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cnt += sprintf((buf+cnt), "%s_","SMIC");
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if(IS_A_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "A_CUT_");
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else if(IS_B_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "B_CUT_");
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else if(IS_C_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "C_CUT_");
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else if(IS_D_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "D_CUT_");
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else if(IS_E_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "E_CUT_");
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else cnt += sprintf((buf+cnt), "UNKNOWN_CUT(%d)_", ChipVersion.CUTVersion);
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if(IS_1T1R(ChipVersion)) cnt += sprintf((buf+cnt), "1T1R_");
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else if(IS_1T2R(ChipVersion)) cnt += sprintf((buf+cnt), "1T2R_");
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else if(IS_2T2R(ChipVersion)) cnt += sprintf((buf+cnt), "2T2R_");
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else cnt += sprintf((buf+cnt), "UNKNOWN_RFTYPE(%d)_", ChipVersion.RFType);
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cnt += sprintf((buf+cnt), "RomVer(%d)\n", ChipVersion.ROMVer);
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DBG_871X("%s", buf);
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}
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#define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80
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u8 //return the final channel plan decision
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hal_com_get_channel_plan(
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IN PADAPTER padapter,
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IN u8 hw_channel_plan, //channel plan from HW (efuse/eeprom)
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IN u8 sw_channel_plan, //channel plan from SW (registry/module param)
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IN u8 def_channel_plan, //channel plan used when the former two is invalid
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IN BOOLEAN AutoLoadFail
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)
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{
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u8 swConfig;
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u8 chnlPlan;
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swConfig = _TRUE;
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if (!AutoLoadFail)
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{
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if (!rtw_is_channel_plan_valid(sw_channel_plan))
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swConfig = _FALSE;
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if (hw_channel_plan & EEPROM_CHANNEL_PLAN_BY_HW_MASK)
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swConfig = _FALSE;
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}
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if (swConfig == _TRUE)
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chnlPlan = sw_channel_plan;
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else
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chnlPlan = hw_channel_plan & (~EEPROM_CHANNEL_PLAN_BY_HW_MASK);
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if (!rtw_is_channel_plan_valid(chnlPlan))
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chnlPlan = def_channel_plan;
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return chnlPlan;
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}
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BOOLEAN
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HAL_IsLegalChannel(
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IN PADAPTER Adapter,
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IN u32 Channel
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)
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{
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BOOLEAN bLegalChannel = _TRUE;
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if (Channel > 14) {
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if(IsSupported5G(Adapter->registrypriv.wireless_mode) == _FALSE) {
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bLegalChannel = _FALSE;
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DBG_871X("Channel > 14 but wireless_mode do not support 5G\n");
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}
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} else if ((Channel <= 14) && (Channel >=1)){
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if(IsSupported24G(Adapter->registrypriv.wireless_mode) == _FALSE) {
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bLegalChannel = _FALSE;
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DBG_871X("(Channel <= 14) && (Channel >=1) but wireless_mode do not support 2.4G\n");
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}
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} else {
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bLegalChannel = _FALSE;
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DBG_871X("Channel is Invalid !!!\n");
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}
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return bLegalChannel;
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}
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u8 MRateToHwRate(u8 rate)
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{
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u8 ret = DESC_RATE1M;
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switch(rate)
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{
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// CCK and OFDM non-HT rates
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case IEEE80211_CCK_RATE_1MB: ret = DESC_RATE1M; break;
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case IEEE80211_CCK_RATE_2MB: ret = DESC_RATE2M; break;
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case IEEE80211_CCK_RATE_5MB: ret = DESC_RATE5_5M; break;
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case IEEE80211_CCK_RATE_11MB: ret = DESC_RATE11M; break;
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case IEEE80211_OFDM_RATE_6MB: ret = DESC_RATE6M; break;
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case IEEE80211_OFDM_RATE_9MB: ret = DESC_RATE9M; break;
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case IEEE80211_OFDM_RATE_12MB: ret = DESC_RATE12M; break;
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case IEEE80211_OFDM_RATE_18MB: ret = DESC_RATE18M; break;
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case IEEE80211_OFDM_RATE_24MB: ret = DESC_RATE24M; break;
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case IEEE80211_OFDM_RATE_36MB: ret = DESC_RATE36M; break;
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case IEEE80211_OFDM_RATE_48MB: ret = DESC_RATE48M; break;
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case IEEE80211_OFDM_RATE_54MB: ret = DESC_RATE54M; break;
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// HT rates since here
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//case MGN_MCS0: ret = DESC_RATEMCS0; break;
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//case MGN_MCS1: ret = DESC_RATEMCS1; break;
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//case MGN_MCS2: ret = DESC_RATEMCS2; break;
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//case MGN_MCS3: ret = DESC_RATEMCS3; break;
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//case MGN_MCS4: ret = DESC_RATEMCS4; break;
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//case MGN_MCS5: ret = DESC_RATEMCS5; break;
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//case MGN_MCS6: ret = DESC_RATEMCS6; break;
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//case MGN_MCS7: ret = DESC_RATEMCS7; break;
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default: break;
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}
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return ret;
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}
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void HalSetBrateCfg(
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IN PADAPTER Adapter,
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IN u8 *mBratesOS,
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OUT u16 *pBrateCfg)
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{
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u8 i, is_brate, brate;
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for(i=0;i<NDIS_802_11_LENGTH_RATES_EX;i++)
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{
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is_brate = mBratesOS[i] & IEEE80211_BASIC_RATE_MASK;
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brate = mBratesOS[i] & 0x7f;
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if( is_brate )
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{
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switch(brate)
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{
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case IEEE80211_CCK_RATE_1MB: *pBrateCfg |= RATE_1M; break;
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case IEEE80211_CCK_RATE_2MB: *pBrateCfg |= RATE_2M; break;
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case IEEE80211_CCK_RATE_5MB: *pBrateCfg |= RATE_5_5M;break;
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case IEEE80211_CCK_RATE_11MB: *pBrateCfg |= RATE_11M; break;
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case IEEE80211_OFDM_RATE_6MB: *pBrateCfg |= RATE_6M; break;
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case IEEE80211_OFDM_RATE_9MB: *pBrateCfg |= RATE_9M; break;
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case IEEE80211_OFDM_RATE_12MB: *pBrateCfg |= RATE_12M; break;
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case IEEE80211_OFDM_RATE_18MB: *pBrateCfg |= RATE_18M; break;
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case IEEE80211_OFDM_RATE_24MB: *pBrateCfg |= RATE_24M; break;
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case IEEE80211_OFDM_RATE_36MB: *pBrateCfg |= RATE_36M; break;
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case IEEE80211_OFDM_RATE_48MB: *pBrateCfg |= RATE_48M; break;
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case IEEE80211_OFDM_RATE_54MB: *pBrateCfg |= RATE_54M; break;
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}
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}
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}
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}
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static VOID
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_OneOutPipeMapping(
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IN PADAPTER pAdapter
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)
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{
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struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(pAdapter);
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pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];//VO
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pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];//VI
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pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[0];//BE
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pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[0];//BK
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pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN
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pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT
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pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];//HIGH
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pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD
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}
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static VOID
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_TwoOutPipeMapping(
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IN PADAPTER pAdapter,
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IN BOOLEAN bWIFICfg
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)
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{
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struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(pAdapter);
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if(bWIFICfg){ //WMM
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// BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA
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//{ 0, 1, 0, 1, 0, 0, 0, 0, 0 };
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//0:H, 1:N
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pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[1];//VO
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pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];//VI
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pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[1];//BE
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pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[0];//BK
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pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN
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pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT
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pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];//HIGH
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pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD
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}
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else{//typical setting
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//BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA
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//{ 1, 1, 0, 0, 0, 0, 0, 0, 0 };
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//0:H, 1:N
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pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];//VO
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pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];//VI
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pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[1];//BE
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pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[1];//BK
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pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN
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pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT
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pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];//HIGH
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pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD
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}
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}
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static VOID _ThreeOutPipeMapping(
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IN PADAPTER pAdapter,
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IN BOOLEAN bWIFICfg
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)
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{
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struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(pAdapter);
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if(bWIFICfg){//for WMM
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// BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA
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//{ 1, 2, 1, 0, 0, 0, 0, 0, 0 };
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//0:H, 1:N, 2:L
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pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];//VO
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pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];//VI
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pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];//BE
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pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[1];//BK
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pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN
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pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT
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pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];//HIGH
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pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD
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}
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else{//typical setting
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// BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA
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//{ 2, 2, 1, 0, 0, 0, 0, 0, 0 };
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//0:H, 1:N, 2:L
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pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];//VO
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pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];//VI
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pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];//BE
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pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[2];//BK
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pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN
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pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT
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pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];//HIGH
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pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD
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}
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}
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static VOID _FourOutPipeMapping(
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IN PADAPTER pAdapter,
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IN BOOLEAN bWIFICfg
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)
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{
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struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(pAdapter);
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if(bWIFICfg){//for WMM
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// BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA
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//{ 1, 2, 1, 0, 0, 0, 0, 0, 0 };
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//0:H, 1:N, 2:L ,3:E
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pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];//VO
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pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];//VI
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pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];//BE
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pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[1];//BK
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pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN
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pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT
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pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[3];//HIGH
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pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD
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}
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else{//typical setting
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// BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA
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//{ 2, 2, 1, 0, 0, 0, 0, 0, 0 };
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//0:H, 1:N, 2:L
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pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];//VO
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pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];//VI
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pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];//BE
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pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[2];//BK
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pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN
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pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT
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pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[3];//HIGH
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pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD
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}
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}
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BOOLEAN
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Hal_MappingOutPipe(
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IN PADAPTER pAdapter,
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IN u8 NumOutPipe
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)
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{
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struct registry_priv *pregistrypriv = &pAdapter->registrypriv;
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BOOLEAN bWIFICfg = (pregistrypriv->wifi_spec) ?_TRUE:_FALSE;
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BOOLEAN result = _TRUE;
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switch(NumOutPipe)
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{
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case 2:
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_TwoOutPipeMapping(pAdapter, bWIFICfg);
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break;
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case 3:
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case 4:
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_ThreeOutPipeMapping(pAdapter, bWIFICfg);
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break;
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case 1:
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_OneOutPipeMapping(pAdapter);
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break;
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default:
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result = _FALSE;
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break;
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}
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return result;
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}
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void hal_init_macaddr(_adapter *adapter)
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{
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rtw_hal_set_hwreg(adapter, HW_VAR_MAC_ADDR, adapter->eeprompriv.mac_addr);
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#ifdef CONFIG_CONCURRENT_MODE
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if (adapter->pbuddy_adapter)
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rtw_hal_set_hwreg(adapter->pbuddy_adapter, HW_VAR_MAC_ADDR, adapter->pbuddy_adapter->eeprompriv.mac_addr);
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#endif
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}
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/*
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* C2H event format:
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* Field TRIGGER CONTENT CMD_SEQ CMD_LEN CMD_ID
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* BITS [127:120] [119:16] [15:8] [7:4] [3:0]
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*/
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void c2h_evt_clear(_adapter *adapter)
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{
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rtw_write8(adapter, REG_C2HEVT_CLEAR, C2H_EVT_HOST_CLOSE);
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}
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s32 c2h_evt_read(_adapter *adapter, u8 *buf)
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{
|
|
s32 ret = _FAIL;
|
|
struct c2h_evt_hdr *c2h_evt;
|
|
int i;
|
|
u8 trigger;
|
|
|
|
if (buf == NULL)
|
|
goto exit;
|
|
|
|
trigger = rtw_read8(adapter, REG_C2HEVT_CLEAR);
|
|
|
|
if (trigger == C2H_EVT_HOST_CLOSE) {
|
|
goto exit; /* Not ready */
|
|
} else if (trigger != C2H_EVT_FW_CLOSE) {
|
|
goto clear_evt; /* Not a valid value */
|
|
}
|
|
|
|
c2h_evt = (struct c2h_evt_hdr *)buf;
|
|
|
|
_rtw_memset(c2h_evt, 0, 16);
|
|
|
|
*buf = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL);
|
|
*(buf+1) = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + 1);
|
|
|
|
RT_PRINT_DATA(_module_hal_init_c_, _drv_info_, "c2h_evt_read(): ",
|
|
&c2h_evt , sizeof(c2h_evt));
|
|
|
|
if (0) {
|
|
DBG_871X("%s id:%u, len:%u, seq:%u, trigger:0x%02x\n", __func__
|
|
, c2h_evt->id, c2h_evt->plen, c2h_evt->seq, trigger);
|
|
}
|
|
|
|
/* Read the content */
|
|
for (i = 0; i < c2h_evt->plen; i++)
|
|
c2h_evt->payload[i] = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + sizeof(*c2h_evt) + i);
|
|
|
|
RT_PRINT_DATA(_module_hal_init_c_, _drv_info_, "c2h_evt_read(): Command Content:\n",
|
|
c2h_evt->payload, c2h_evt->plen);
|
|
|
|
ret = _SUCCESS;
|
|
|
|
clear_evt:
|
|
/*
|
|
* Clear event to notify FW we have read the command.
|
|
* If this field isn't clear, the FW won't update the next command message.
|
|
*/
|
|
c2h_evt_clear(adapter);
|
|
exit:
|
|
return ret;
|
|
}
|
|
|
|
u8 rtw_hal_networktype_to_raid(_adapter *adapter,unsigned char network_type)
|
|
{
|
|
if(IS_NEW_GENERATION_IC(adapter)){
|
|
return networktype_to_raid_ex(adapter,network_type);
|
|
}
|
|
else{
|
|
return networktype_to_raid(adapter,network_type);
|
|
}
|
|
|
|
}
|
|
u8 rtw_get_mgntframe_raid(_adapter *adapter,unsigned char network_type)
|
|
{
|
|
|
|
u8 raid;
|
|
if(IS_NEW_GENERATION_IC(adapter)){
|
|
|
|
raid = (network_type & WIRELESS_11B) ?RATEID_IDX_B
|
|
:RATEID_IDX_G;
|
|
}
|
|
else{
|
|
raid = (network_type & WIRELESS_11B) ?RATR_INX_WIRELESS_B
|
|
:RATR_INX_WIRELESS_G;
|
|
}
|
|
return raid;
|
|
}
|
|
|
|
|