mirror of
https://github.com/morrownr/8821cu-20210916.git
synced 2024-09-07 23:56:37 +00:00
95 lines
2.9 KiB
C
95 lines
2.9 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2007 - 2019 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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#ifndef __DRV_TYPES_SDIO_H__
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#define __DRV_TYPES_SDIO_H__
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/* SDIO Header Files */
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#ifdef PLATFORM_LINUX
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#include <linux/mmc/sdio_func.h>
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#include <linux/mmc/sdio_ids.h>
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#include <linux/mmc/host.h>
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#include <linux/mmc/card.h>
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#ifdef CONFIG_PLATFORM_SPRD
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#include <linux/gpio.h>
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#include <custom_gpio.h>
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#endif /* CONFIG_PLATFORM_SPRD */
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#endif
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#define RTW_SDIO_CLK_33M 33000000
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#define RTW_SDIO_CLK_40M 40000000
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#define RTW_SDIO_CLK_80M 80000000
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#define RTW_SDIO_CLK_160M 160000000
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typedef struct sdio_data {
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u8 func_number;
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u8 tx_block_mode;
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u8 rx_block_mode;
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u32 block_transfer_len;
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#ifdef PLATFORM_LINUX
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struct mmc_card *card;
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struct sdio_func *func;
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_thread_hdl_ sys_sdio_irq_thd;
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unsigned int clock;
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unsigned int timing;
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u8 sd3_bus_mode;
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#endif
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#ifdef DBG_SDIO
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#ifdef PLATFORM_LINUX
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struct proc_dir_entry *proc_sdio_dbg;
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#endif /* PLATFORM_LINUX */
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u32 cmd52_err_cnt; /* CMD52 I/O error count */
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u32 cmd53_err_cnt; /* CMD53 I/O error count */
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#if (DBG_SDIO >= 1)
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u32 reg_dump_mark; /* reg dump at specific error count */
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#endif /* DBG_SDIO >= 1 */
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#if (DBG_SDIO >= 2)
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u8 *dbg_msg; /* Messages for debug */
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u8 dbg_msg_size;
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u8 *reg_mac; /* Device MAC register, 0x0~0x800 */
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u8 *reg_mac_ext; /* Device MAC extend register, 0x1000~0x1800 */
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u8 *reg_local; /* Device SDIO local register, 0x0~0xFF */
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u8 *reg_cia; /* SDIO CIA(CCCR, FBR and etc.), 0x0~0x1FF */
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#endif /* DBG_SDIO >= 2 */
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#if (DBG_SDIO >= 3)
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u8 dbg_enable; /* 0/1: disable/enable debug mode */
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u8 err_stop; /* Stop(surprise remove) when I/O error happen */
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u8 err_test; /* Simulate error happen */
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u8 err_test_triggered; /* Simulate error already triggered */
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#endif /* DBG_SDIO >= 3 */
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#endif /* DBG_SDIO */
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} SDIO_DATA, *PSDIO_DATA;
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#define dvobj_to_sdio_func(d) ((d)->intf_data.func)
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#define RTW_SDIO_ADDR_CMD52_BIT (1<<17)
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#define RTW_SDIO_ADDR_CMD52_GEN(a) (a | RTW_SDIO_ADDR_CMD52_BIT)
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#define RTW_SDIO_ADDR_CMD52_CLR(a) (a&~RTW_SDIO_ADDR_CMD52_BIT)
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#define RTW_SDIO_ADDR_CMD52_CHK(a) (a&RTW_SDIO_ADDR_CMD52_BIT ? 1 : 0)
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#define RTW_SDIO_ADDR_F0_BIT (1<<18)
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#define RTW_SDIO_ADDR_F0_GEN(a) (a | RTW_SDIO_ADDR_F0_BIT)
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#define RTW_SDIO_ADDR_F0_CLR(a) (a&~RTW_SDIO_ADDR_F0_BIT)
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#define RTW_SDIO_ADDR_F0_CHK(a) (a&RTW_SDIO_ADDR_F0_BIT ? 1 : 0)
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#endif
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