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gdkchanandGitHub 0b52ee6627 Optimize BIC, BSL, BIT, BIF, XTN, ZIP, DUP (Gp), FMADD (Scalar) and FCVT (Scalar) using SSE intrinsics (#405) ...

* Optimize BIC, BSL, BIT, BIF, XTN, ZIP, DUP (Gp), FMADD (Scalar) and FCVT (Scalar) using SSE intrinsics, some CQ improvements

* Remove useless space

* Address PR feedback

* Revert EmitVectorZero32_128 changes

2018-09-26 23:30:21 -03:00

..

AMemory.cs

Optimize BIC, BSL, BIT, BIF, XTN, ZIP, DUP (Gp), FMADD (Scalar) and FCVT (Scalar) using SSE intrinsics (#405)

2018-09-26 23:30:21 -03:00

AMemoryHelper.cs

More flexible memory manager (#307)

2018-08-15 15:59:51 -03:00

IAMemory.cs

NvServices refactoring (#120)

2018-05-07 15:53:23 -03:00