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[Ryujinx.Tests] Address dotnet-format issues (#5389)

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* dotnet format style --severity info

Some changes were manually reverted.

* dotnet format analyzers --serverity info

Some changes have been minimally adapted.

* Restore a few unused methods and variables

* Fix new dotnet-format issues after rebase

* Address review comments

* Address most dotnet format whitespace warnings

* Apply dotnet format whitespace formatting

A few of them have been manually reverted and the corresponding warning was silenced

* Format if-blocks correctly

* Run dotnet format after rebase and remove unused usings

- analyzers
- style
- whitespace

* Add comments to disabled warnings

* Simplify properties and array initialization, Use const when possible, Remove trailing commas

* cpu tests: Disable CA2211 for CodeBaseAddress and DataBaseAddress

* Revert "Simplify properties and array initialization, Use const when possible, Remove trailing commas"

This reverts commit 9462e4136c0a2100dc28b20cf9542e06790aa67e.

* dotnet format whitespace after rebase

* Apply suggestions from code review

Co-authored-by: Ac_K <Acoustik666@gmail.com>

* First dotnet format pass

* Fix naming rule violations

* Remove naming rule violation exceptions

* Fix comment style

* Use targeted new

* Remove redundant code

* Remove comment alignment

* Remove naming rule exceptions

* Add trailing commas

* Use nameof expression

* Reformat to add remaining trailing commas

---------

Co-authored-by: Ac_K <Acoustik666@gmail.com>
This commit is contained in:
TSRBerry
2023-07-01 04:14:34 +02:00
committed by GitHub
parent 6e28a4dd13
commit e9848339dd
62 changed files with 2263 additions and 1929 deletions
Download Patch File Download Diff File Expand all files Collapse all files

25
src/Ryujinx.Tests/Cpu/CpuTestSimdCrypto.cs
View File

@@ -1,7 +1,6 @@
// https://www.intel.com/content/dam/doc/white-paper/advanced-encryption-standard-new-instructions-set-paper.pdf
using ARMeilleure.State;
using NUnit.Framework;
namespace Ryujinx.Tests.Cpu
@@ -13,8 +12,8 @@ namespace Ryujinx.Tests.Cpu
[Values(1u)] uint rn,
[Values(0x7B5B546573745665ul)] ulong valueH,
[Values(0x63746F725D53475Dul)] ulong valueL,
[Random(2)] ulong roundKeyH,
[Random(2)] ulong roundKeyL,
[Random(2)] ulong roundKeyH,
[Random(2)] ulong roundKeyL,
[Values(0x8DCAB9BC035006BCul)] ulong resultH,
[Values(0x8F57161E00CAFD8Dul)] ulong resultL)
{
@@ -22,7 +21,7 @@ namespace Ryujinx.Tests.Cpu
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
V128 v0 = MakeVectorE0E1(roundKeyL ^ valueL, roundKeyH ^ valueH);
V128 v1 = MakeVectorE0E1(roundKeyL, roundKeyH);
V128 v1 = MakeVectorE0E1(roundKeyL, roundKeyH);
ExecutionContext context = SingleOpcode(opcode, v0: v0, v1: v1);
@@ -45,8 +44,8 @@ namespace Ryujinx.Tests.Cpu
[Values(1u)] uint rn,
[Values(0x7B5B546573745665ul)] ulong valueH,
[Values(0x63746F725D53475Dul)] ulong valueL,
[Random(2)] ulong roundKeyH,
[Random(2)] ulong roundKeyL,
[Random(2)] ulong roundKeyH,
[Random(2)] ulong roundKeyL,
[Values(0x8F92A04DFBED204Dul)] ulong resultH,
[Values(0x4C39B1402192A84Cul)] ulong resultL)
{
@@ -54,7 +53,7 @@ namespace Ryujinx.Tests.Cpu
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
V128 v0 = MakeVectorE0E1(roundKeyL ^ valueL, roundKeyH ^ valueH);
V128 v1 = MakeVectorE0E1(roundKeyL, roundKeyH);
V128 v1 = MakeVectorE0E1(roundKeyL, roundKeyH);
ExecutionContext context = SingleOpcode(opcode, v0: v0, v1: v1);
@@ -73,7 +72,7 @@ namespace Ryujinx.Tests.Cpu
}
[Test, Description("AESIMC <Vd>.16B, <Vn>.16B")]
public void Aesimc_V([Values(0u)] uint rd,
public void Aesimc_V([Values(0u)] uint rd,
[Values(1u, 0u)] uint rn,
[Values(0x8DCAB9DC035006BCul)] ulong valueH,
[Values(0x8F57161E00CAFD8Dul)] ulong valueL,
@@ -87,8 +86,8 @@ namespace Ryujinx.Tests.Cpu
ExecutionContext context = SingleOpcode(
opcode,
v0: rn == 0u ? v : default(V128),
v1: rn == 1u ? v : default(V128));
v0: rn == 0u ? v : default,
v1: rn == 1u ? v : default);
Assert.Multiple(() =>
{
@@ -108,7 +107,7 @@ namespace Ryujinx.Tests.Cpu
}
[Test, Description("AESMC <Vd>.16B, <Vn>.16B")]
public void Aesmc_V([Values(0u)] uint rd,
public void Aesmc_V([Values(0u)] uint rd,
[Values(1u, 0u)] uint rn,
[Values(0x627A6F6644B109C8ul)] ulong valueH,
[Values(0x2B18330A81C3B3E5ul)] ulong valueL,
@@ -122,8 +121,8 @@ namespace Ryujinx.Tests.Cpu
ExecutionContext context = SingleOpcode(
opcode,
v0: rn == 0u ? v : default(V128),
v1: rn == 1u ? v : default(V128));
v0: rn == 0u ? v : default,
v1: rn == 1u ? v : default);
Assert.Multiple(() =>
{