mirror of
https://github.com/aircrack-ng/rtl8812au.git
synced 2024-11-23 13:49:57 +00:00
353 lines
11 KiB
C
353 lines
11 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2007 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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/* ************************************************************
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* include files
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* ************************************************************ */
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#include "mp_precomp.h"
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#include "phydm_precomp.h"
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#ifdef CONFIG_DYNAMIC_RX_PATH
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void
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phydm_process_phy_status_for_dynamic_rx_path(
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void *dm_void,
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void *phy_info_void,
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void *pkt_info_void
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)
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{
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struct dm_struct *dm = (struct dm_struct *)dm_void;
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struct phydm_phyinfo_struct *phy_info = (struct phydm_phyinfo_struct *)phy_info_void;
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struct phydm_perpkt_info_struct *pktinfo = (struct phydm_perpkt_info_struct *)pkt_info_void;
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struct _DYNAMIC_RX_PATH_ *p_dm_drp_table = &(dm->dm_drp_table);
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}
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void
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phydm_drp_get_statistic(
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void *dm_void
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)
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{
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struct dm_struct *dm = (struct dm_struct *)dm_void;
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struct _DYNAMIC_RX_PATH_ *p_dm_drp_table = &(dm->dm_drp_table);
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struct phydm_fa_struct *false_alm_cnt = (struct phydm_fa_struct *)phydm_get_structure(dm, PHYDM_FALSEALMCNT);
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odm_false_alarm_counter_statistics(dm);
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PHYDM_DBG(dm, DBG_DYN_RX_PATH, "[CCA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n",
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false_alm_cnt->cnt_cck_cca, false_alm_cnt->cnt_ofdm_cca, false_alm_cnt->cnt_cca_all);
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PHYDM_DBG(dm, DBG_DYN_RX_PATH, "[FA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n",
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false_alm_cnt->cnt_cck_fail, false_alm_cnt->cnt_ofdm_fail, false_alm_cnt->cnt_all);
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}
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void
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phydm_dynamic_rx_path(
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void *dm_void
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)
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{
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struct dm_struct *dm = (struct dm_struct *)dm_void;
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struct _DYNAMIC_RX_PATH_ *p_dm_drp_table = &(dm->dm_drp_table);
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u8 training_set_timmer_en;
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u8 curr_drp_state;
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u32 rx_ok_cal;
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u32 RSSI = 0;
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struct phydm_fa_struct *false_alm_cnt = (struct phydm_fa_struct *)phydm_get_structure(dm, PHYDM_FALSEALMCNT);
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if (!(dm->support_ability & ODM_BB_DYNAMIC_RX_PATH)) {
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PHYDM_DBG(dm, DBG_DYN_RX_PATH, "[Return Init] Not Support Dynamic RX PAth\n");
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return;
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}
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PHYDM_DBG(dm, DBG_DYN_RX_PATH, "Current drp_state = ((%d))\n", p_dm_drp_table->drp_state);
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curr_drp_state = p_dm_drp_table->drp_state;
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if (p_dm_drp_table->drp_state == DRP_INIT_STATE) {
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phydm_drp_get_statistic(dm);
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if (false_alm_cnt->cnt_crc32_ok_all > 20) { /*Signal + Interference*/
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PHYDM_DBG(dm, DBG_DYN_RX_PATH, "[Stop DRP Training] cnt_crc32_ok_all = ((%d))\n", false_alm_cnt->cnt_crc32_ok_all);
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p_dm_drp_table->drp_state = DRP_INIT_STATE;
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training_set_timmer_en = false;
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} else {/*Interference only*/
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PHYDM_DBG(dm, DBG_DYN_RX_PATH, "[Start DRP Training] cnt_crc32_ok_all = ((%d))\n", false_alm_cnt->cnt_crc32_ok_all);
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p_dm_drp_table->drp_state = DRP_TRAINING_STATE_0;
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p_dm_drp_table->curr_rx_path = BB_PATH_AB;
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training_set_timmer_en = true;
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}
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} else if (p_dm_drp_table->drp_state == DRP_TRAINING_STATE_0) {
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phydm_drp_get_statistic(dm);
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p_dm_drp_table->curr_cca_all_cnt_0 = false_alm_cnt->cnt_cca_all;
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p_dm_drp_table->curr_fa_all_cnt_0 = false_alm_cnt->cnt_all;
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p_dm_drp_table->drp_state = DRP_TRAINING_STATE_1;
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p_dm_drp_table->curr_rx_path = BB_PATH_B;
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training_set_timmer_en = true;
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} else if (p_dm_drp_table->drp_state == DRP_TRAINING_STATE_1) {
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phydm_drp_get_statistic(dm);
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p_dm_drp_table->curr_cca_all_cnt_1 = false_alm_cnt->cnt_cca_all;
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p_dm_drp_table->curr_fa_all_cnt_1 = false_alm_cnt->cnt_all;
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#if 1
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p_dm_drp_table->drp_state = DRP_DECISION_STATE;
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#else
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if (*(dm->mp_mode)) {
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rx_ok_cal = dm->phy_dbg_info.num_qry_phy_status_cck + dm->phy_dbg_info.num_qry_phy_status_ofdm;
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RSSI = (rx_ok_cal != 0) ? dm->rx_pwdb_ave / rx_ok_cal : 0;
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PHYDM_DBG(dm, DBG_DYN_RX_PATH, "MP RSSI = ((%d))\n", RSSI);
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}
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if (RSSI > p_dm_drp_table->rssi_threshold)
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p_dm_drp_table->drp_state = DRP_DECISION_STATE;
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else {
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p_dm_drp_table->drp_state = DRP_TRAINING_STATE_2;
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p_dm_drp_table->curr_rx_path = BB_PATH_A;
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training_set_timmer_en = true;
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}
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#endif
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} else if (p_dm_drp_table->drp_state == DRP_TRAINING_STATE_2) {
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phydm_drp_get_statistic(dm);
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p_dm_drp_table->curr_cca_all_cnt_2 = false_alm_cnt->cnt_cca_all;
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p_dm_drp_table->curr_fa_all_cnt_2 = false_alm_cnt->cnt_all;
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p_dm_drp_table->drp_state = DRP_DECISION_STATE;
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}
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if (p_dm_drp_table->drp_state == DRP_DECISION_STATE) {
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PHYDM_DBG(dm, DBG_DYN_RX_PATH, "Current drp_state = ((%d))\n", p_dm_drp_table->drp_state);
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PHYDM_DBG(dm, DBG_DYN_RX_PATH, "[0] {CCA, FA} = {%d, %d}\n", p_dm_drp_table->curr_cca_all_cnt_0, p_dm_drp_table->curr_fa_all_cnt_0);
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PHYDM_DBG(dm, DBG_DYN_RX_PATH, "[1] {CCA, FA} = {%d, %d}\n", p_dm_drp_table->curr_cca_all_cnt_1, p_dm_drp_table->curr_fa_all_cnt_1);
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PHYDM_DBG(dm, DBG_DYN_RX_PATH, "[2] {CCA, FA} = {%d, %d}\n", p_dm_drp_table->curr_cca_all_cnt_2, p_dm_drp_table->curr_fa_all_cnt_2);
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if (p_dm_drp_table->curr_fa_all_cnt_1 < p_dm_drp_table->curr_fa_all_cnt_0) {
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if ((p_dm_drp_table->curr_fa_all_cnt_0 - p_dm_drp_table->curr_fa_all_cnt_1) > p_dm_drp_table->fa_diff_threshold)
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p_dm_drp_table->curr_rx_path = BB_PATH_B;
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else
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p_dm_drp_table->curr_rx_path = BB_PATH_AB;
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} else
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p_dm_drp_table->curr_rx_path = BB_PATH_AB;
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phydm_config_ofdm_rx_path(dm, p_dm_drp_table->curr_rx_path);
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PHYDM_DBG(dm, DBG_DYN_RX_PATH, "[Training Result] curr_rx_path = ((%s%s)),\n",
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((p_dm_drp_table->curr_rx_path & BB_PATH_A) ? "A" : " "), ((p_dm_drp_table->curr_rx_path & BB_PATH_B) ? "B" : " "));
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p_dm_drp_table->drp_state = DRP_INIT_STATE;
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training_set_timmer_en = false;
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}
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PHYDM_DBG(dm, DBG_DYN_RX_PATH, "DRP_state: ((%d)) -> ((%d))\n", curr_drp_state, p_dm_drp_table->drp_state);
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if (training_set_timmer_en) {
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PHYDM_DBG(dm, DBG_DYN_RX_PATH, "[Training en] curr_rx_path = ((%s%s)), training_time = ((%d ms))\n",
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((p_dm_drp_table->curr_rx_path & BB_PATH_A) ? "A" : " "), ((p_dm_drp_table->curr_rx_path & BB_PATH_B) ? "B" : " "), p_dm_drp_table->training_time);
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phydm_config_ofdm_rx_path(dm, p_dm_drp_table->curr_rx_path);
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odm_set_timer(dm, &(p_dm_drp_table->phydm_dynamic_rx_path_timer), p_dm_drp_table->training_time); /*ms*/
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} else
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PHYDM_DBG(dm, DBG_DYN_RX_PATH, "DRP period end\n\n", curr_drp_state, p_dm_drp_table->drp_state);
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}
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#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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void
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phydm_dynamic_rx_path_callback(
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struct phydm_timer_list *timer
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)
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{
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void *adapter = (void *)timer->adapter;
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HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
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struct dm_struct *dm = &(hal_data->DM_OutSrc);
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struct _DYNAMIC_RX_PATH_ *p_dm_drp_table = &(dm->dm_drp_table);
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#if DEV_BUS_TYPE == RT_PCI_INTERFACE
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#if USE_WORKITEM
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odm_schedule_work_item(&(p_dm_drp_table->phydm_dynamic_rx_path_workitem));
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#else
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{
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/* dbg_print("phydm_dynamic_rx_path\n"); */
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phydm_dynamic_rx_path(dm);
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}
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#endif
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#else
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odm_schedule_work_item(&(p_dm_drp_table->phydm_dynamic_rx_path_workitem));
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#endif
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}
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void
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phydm_dynamic_rx_path_workitem_callback(
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void *context
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)
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{
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void *adapter = (void *)context;
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HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
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struct dm_struct *dm = &(hal_data->DM_OutSrc);
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/* dbg_print("phydm_dynamic_rx_path\n"); */
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phydm_dynamic_rx_path(dm);
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}
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#else if (DM_ODM_SUPPORT_TYPE == ODM_CE)
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void
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phydm_dynamic_rx_path_callback(
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void *function_context
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)
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{
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struct dm_struct *dm = (struct dm_struct *)function_context;
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void *padapter = dm->adapter;
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if (*(dm->is_net_closed) == true)
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return;
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#if 0 /* Can't do I/O in timer callback*/
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odm_s0s1_sw_ant_div(dm, SWAW_STEP_DETERMINE);
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#else
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/*rtw_run_in_thread_cmd(padapter, odm_sw_antdiv_workitem_callback, padapter);*/
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#endif
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}
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#endif
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void
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phydm_dynamic_rx_path_timers(
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void *dm_void,
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u8 state
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)
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{
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struct dm_struct *dm = (struct dm_struct *)dm_void;
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struct _DYNAMIC_RX_PATH_ *p_dm_drp_table = &(dm->dm_drp_table);
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if (state == INIT_DRP_TIMMER) {
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odm_initialize_timer(dm, &(p_dm_drp_table->phydm_dynamic_rx_path_timer),
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(void *)phydm_dynamic_rx_path_callback, NULL, "phydm_sw_antenna_switch_timer");
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} else if (state == CANCEL_DRP_TIMMER)
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odm_cancel_timer(dm, &(p_dm_drp_table->phydm_dynamic_rx_path_timer));
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else if (state == RELEASE_DRP_TIMMER)
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odm_release_timer(dm, &(p_dm_drp_table->phydm_dynamic_rx_path_timer));
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}
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void
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phydm_dynamic_rx_path_init(
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void *dm_void
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)
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{
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struct dm_struct *dm = (struct dm_struct *)dm_void;
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struct _DYNAMIC_RX_PATH_ *p_dm_drp_table = &(dm->dm_drp_table);
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boolean ret_value;
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if (!(dm->support_ability & ODM_BB_DYNAMIC_RX_PATH)) {
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PHYDM_DBG(dm, DBG_DYN_RX_PATH, "[Return] Not Support Dynamic RX PAth\n");
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return;
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}
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PHYDM_DBG(dm, DBG_DYN_RX_PATH, "phydm_dynamic_rx_path_init\n");
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p_dm_drp_table->drp_state = DRP_INIT_STATE;
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p_dm_drp_table->rssi_threshold = DRP_RSSI_TH;
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p_dm_drp_table->fa_count_thresold = 50;
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p_dm_drp_table->fa_diff_threshold = 50;
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p_dm_drp_table->training_time = 100; /*ms*/
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p_dm_drp_table->drp_skip_counter = 0;
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p_dm_drp_table->drp_period = 0;
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p_dm_drp_table->drp_init_finished = true;
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ret_value = phydm_api_trx_mode(dm, (enum bb_path)BB_PATH_AB, (enum bb_path)BB_PATH_AB, true);
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}
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void
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phydm_drp_debug(
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void *dm_void,
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u32 *const dm_value,
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u32 *_used,
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char *output,
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u32 *_out_len
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)
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{
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struct dm_struct *dm = (struct dm_struct *)dm_void;
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u32 used = *_used;
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u32 out_len = *_out_len;
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struct _DYNAMIC_RX_PATH_ *p_dm_drp_table = &(dm->dm_drp_table);
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switch (dm_value[0]) {
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case DRP_TRAINING_TIME:
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p_dm_drp_table->training_time = (u16)dm_value[1];
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break;
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case DRP_TRAINING_PERIOD:
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p_dm_drp_table->drp_period = (u8)dm_value[1];
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break;
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case DRP_RSSI_THRESHOLD:
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p_dm_drp_table->rssi_threshold = (u8)dm_value[1];
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break;
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case DRP_FA_THRESHOLD:
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p_dm_drp_table->fa_count_thresold = dm_value[1];
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break;
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case DRP_FA_DIFF_THRESHOLD:
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p_dm_drp_table->fa_diff_threshold = dm_value[1];
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break;
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default:
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PDM_SNPF(out_len, used, output + used, out_len - used,
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"[DRP] unknown command\n");
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break;
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}
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*_used = used;
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*_out_len = out_len;
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}
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void
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phydm_dynamic_rx_path_caller(
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void *dm_void
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)
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{
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struct dm_struct *dm = (struct dm_struct *)dm_void;
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struct _DYNAMIC_RX_PATH_ *p_dm_drp_table = &(dm->dm_drp_table);
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if (p_dm_drp_table->drp_skip_counter < p_dm_drp_table->drp_period)
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p_dm_drp_table->drp_skip_counter++;
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else
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p_dm_drp_table->drp_skip_counter = 0;
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if (p_dm_drp_table->drp_skip_counter != 0)
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return;
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if (p_dm_drp_table->drp_init_finished != true)
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return;
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phydm_dynamic_rx_path(dm);
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}
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#endif
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