diff --git a/Makefile b/Makefile
index 6e8baaf..9b00417 100755
--- a/Makefile
+++ b/Makefile
@@ -27,7 +27,7 @@ CONFIG_AUTOCFG_CP = n
 CONFIG_MULTIDRV = n
 CONFIG_RTL8188E = n
 CONFIG_RTL8812A = y
-CONFIG_RTL8821A = n
+CONFIG_RTL8821A = y
 CONFIG_RTL8192E = n
 CONFIG_RTL8723B = n
 CONFIG_RTL8814A = n
diff --git a/hal/phydm/rtl8821a/halhwimg8821a_fw.c b/hal/phydm/rtl8821a/halhwimg8821a_fw.c
index c1b2e70..dc91392 100755
--- a/hal/phydm/rtl8821a/halhwimg8821a_fw.c
+++ b/hal/phydm/rtl8821a/halhwimg8821a_fw.c
@@ -22,10 +22,14 @@
 #include "mp_precomp.h"
 #include "../phydm_precomp.h"
 
+#ifdef LOAD_FW_HEADER_FROM_DRIVER
+#include "../../rtl8812a/hal8821a_fw.h"
+#endif
+
 #if (RTL8821A_SUPPORT == 1)
 #if (defined(CONFIG_AP_WOWLAN) || (DM_ODM_SUPPORT_TYPE & (ODM_AP)))
 
-
+#ifndef LOAD_FW_HEADER_FROM_DRIVER
 u1Byte Array_MP_8821A_FW_AP[] = {
 0x01, 0x21, 0x20, 0x00, 0x24, 0x00, 0x00, 0x00, 0x06, 0x18, 0x15, 0x06, 0x10, 0x40, 0x00, 0x00, 
 0x7A, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
@@ -1057,7 +1061,7 @@ u1Byte Array_MP_8821A_FW_AP[] = {
 
 };
 u4Byte ArrayLength_MP_8821A_FW_AP = 16432;
-
+#endif
 
 void
 ODM_ReadFirmware_MP_8821A_FW_AP(
@@ -1080,7 +1084,7 @@ ODM_ReadFirmware_MP_8821A_FW_AP(
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) || (DM_ODM_SUPPORT_TYPE & (ODM_CE))
 
-
+#ifndef LOAD_FW_HEADER_FROM_DRIVER
 u1Byte Array_MP_8821A_FW_NIC[] = {
 0x01, 0x21, 0x10, 0x00, 0x24, 0x00, 0x00, 0x00, 0x06, 0x18, 0x15, 0x06, 0x2E, 0x6B, 0x00, 0x00, 
 0x7A, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
@@ -2801,7 +2805,7 @@ u1Byte Array_MP_8821A_FW_NIC[] = {
 0x70, 0x08, 0x22, 0x54, 0x03, 0x4F, 0xFF, 0x75, 0xF0, 0x10, 0x22, 0x00, 0x0B, 0x0D, 
 };
 u4Byte ArrayLength_MP_8821A_FW_NIC = 27470;
-
+#endif
 
 void
 ODM_ReadFirmware_MP_8821A_FW_NIC(
@@ -2818,7 +2822,7 @@ ODM_ReadFirmware_MP_8821A_FW_NIC(
 	*pFirmwareSize = ArrayLength_MP_8821A_FW_NIC;
 }
 
-
+#ifndef LOAD_FW_HEADER_FROM_DRIVER
 u1Byte Array_MP_8821A_FW_NIC_BT[] = {
 0x01, 0x21, 0x13, 0x00, 0x24, 0x00, 0x00, 0x00, 0x06, 0x18, 0x15, 0x07, 0xCC, 0x7F, 0x00, 0x00, 
 0x7A, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
@@ -4869,7 +4873,7 @@ u1Byte Array_MP_8821A_FW_NIC_BT[] = {
 0xEF, 0x22, 0x90, 0xA3, 0xDF, 0xE0, 0x90, 0xA1, 0x63, 0x22, 0x06, 0xC1, 
 };
 u4Byte ArrayLength_MP_8821A_FW_NIC_BT = 32748;
-
+#endif
 
 void
 ODM_ReadFirmware_MP_8821A_FW_NIC_BT(
@@ -4887,6 +4891,7 @@ ODM_ReadFirmware_MP_8821A_FW_NIC_BT(
 }
 
 
+#ifndef LOAD_FW_HEADER_FROM_DRIVER
 u1Byte Array_MP_8821A_FW_WoWLAN[] = {
 0x01, 0x21, 0x30, 0x00, 0x24, 0x00, 0x00, 0x00, 0x06, 0x18, 0x15, 0x06, 0x1A, 0x6B, 0x00, 0x00, 
 0x7A, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
@@ -6606,7 +6611,7 @@ u1Byte Array_MP_8821A_FW_WoWLAN[] = {
 0xF8, 0xE6, 0xFE, 0xED, 0xF4, 0x5E, 0x22, 0x00, 0x4D, 0x48, 
 };
 u4Byte ArrayLength_MP_8821A_FW_WoWLAN = 27450;
-
+#endif
 
 void
 ODM_ReadFirmware_MP_8821A_FW_WoWLAN(
diff --git a/hal/rtl8812a/rtl8812a_phycfg.c b/hal/rtl8812a/rtl8812a_phycfg.c
index 290ba76..ad0ab7a 100644
--- a/hal/rtl8812a/rtl8812a_phycfg.c
+++ b/hal/rtl8812a/rtl8812a_phycfg.c
@@ -1305,7 +1305,8 @@ PHY_SwitchWirelessBand8812(
 	if (Band == BAND_ON_2_4G) {
 		/* 2.4G band */
 
-#ifdef CONFIG_RTL8821A
+//#ifdef CONFIG_RTL8821A
+#if 0
 		/* 20160224 yiwei ,  8811au one antenna  module don't support antenna  div , so driver must to control antenna  band , otherwise one of the band will has issue */
 		if (IS_HARDWARE_TYPE_8821(Adapter)) {
 			if (Adapter->registrypriv.drv_ant_band_switch == 1 && pHalData->AntDivCfg == 0) {
@@ -1362,7 +1363,8 @@ PHY_SwitchWirelessBand8812(
 	} else {	/* 5G band */
 		u16 count = 0, reg41A = 0;
 
-#ifdef CONFIG_RTL8821A
+//#ifdef CONFIG_RTL8821A
+#if 0
 		/* 20160224 yiwei ,  8811a one antenna  module don't support antenna  div , so driver must to control antenna  band , otherwise one of the band will has issue */
 		if (IS_HARDWARE_TYPE_8821(Adapter)) {
 			if (Adapter->registrypriv.drv_ant_band_switch == 1 && pHalData->AntDivCfg == 0) {