2018-06-22 16:48:32 +00:00
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/******************************************************************************
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*
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2018-08-24 20:52:34 +00:00
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* Copyright(c) 2007 - 2017 Realtek Corporation.
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2018-06-22 16:48:32 +00:00
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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2018-08-24 20:52:34 +00:00
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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2018-06-22 16:48:32 +00:00
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* more details.
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*
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2018-08-24 20:52:34 +00:00
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* wlanfae <wlanfae@realtek.com>
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* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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* Hsinchu 300, Taiwan.
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*
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* Larry Finger <Larry.Finger@lwfinger.net>
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*
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2018-06-22 16:48:32 +00:00
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*****************************************************************************/
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2019-05-24 19:43:57 +00:00
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#ifndef __ODM_DBG_H__
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2018-06-22 16:48:32 +00:00
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#define __ODM_DBG_H__
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2019-05-24 19:43:57 +00:00
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/*@#define DEBUG_VERSION "1.1"*/ /*@2015.07.29 YuChen*/
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/*@#define DEBUG_VERSION "1.2"*/ /*@2015.08.28 Dino*/
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/*@#define DEBUG_VERSION "1.3"*/ /*@2016.04.28 YuChen*/
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/*@#define DEBUG_VERSION "1.4"*/ /*@2017.03.13 Dino*/
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#define DEBUG_VERSION "2.0" /*@2018.01.10 Dino*/
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/*@
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* ============================================================
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* Definition
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* ============================================================
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*/
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/*@FW DBG MSG*/
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#define RATE_DECISION 1
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#define INIT_RA_TABLE 2
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#define RATE_UP 4
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2018-08-24 20:52:34 +00:00
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#define RATE_DOWN 8
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#define TRY_DONE 16
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#define RA_H2C 32
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2019-05-24 19:43:57 +00:00
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#define F_RATE_AP_RPT 64
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#define DBC_FW_CLM 9
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2018-07-02 16:49:32 +00:00
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2019-05-24 19:43:57 +00:00
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#define PHYDM_SNPRINT_SIZE 64
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/* @----------------------------------------------------------------------------
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2018-06-22 16:48:32 +00:00
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* Define the tracing components
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*
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* -----------------------------------------------------------------------------
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2019-05-24 19:43:57 +00:00
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* BB FW Functions
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*/
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#define PHYDM_FW_COMP_RA BIT(0)
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#define PHYDM_FW_COMP_MU BIT(1)
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#define PHYDM_FW_COMP_PATH_DIV BIT(2)
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#define PHYDM_FW_COMP_PT BIT(3)
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2018-06-22 16:48:32 +00:00
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2019-05-24 19:43:57 +00:00
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/*@------------------------Export Marco Definition---------------------------*/
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2018-06-22 16:48:32 +00:00
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2019-05-24 19:43:57 +00:00
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#define config_phydm_read_txagc_check(data) (data != INVALID_TXAGC_DATA)
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2018-06-22 16:48:32 +00:00
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#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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2019-05-24 19:43:57 +00:00
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#if (DBG_CMD_SUPPORT == 1)
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extern VOID DCMD_Printf(const char *pMsg);
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#else
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#define DCMD_Printf(_pMsg)
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#endif
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#if OS_WIN_FROM_WIN10(OS_VERSION)
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#define pr_debug(fmt, ...) DbgPrintEx(DPFLTR_IHVNETWORK_ID, DPFLTR_ERROR_LEVEL, fmt, ##__VA_ARGS__)
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#else
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#define pr_debug DbgPrint
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#endif
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2018-08-24 20:52:34 +00:00
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2019-05-24 19:43:57 +00:00
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#define dcmd_printf DCMD_Printf
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#define dcmd_scanf DCMD_Scanf
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#define RT_PRINTK pr_debug
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2018-08-24 20:52:34 +00:00
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#define PRINT_MAX_SIZE 512
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2019-05-24 19:43:57 +00:00
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#define PHYDM_SNPRINTF RT_SPRINTF
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#define PHYDM_TRACE(_MSG_) EXhalPHYDMoutsrc_Print(_MSG_)
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2018-06-22 16:48:32 +00:00
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#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
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2019-05-24 19:43:57 +00:00
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#define PHYDM_SNPRINTF snprintf
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2018-06-22 16:48:32 +00:00
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#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
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2019-05-24 19:43:57 +00:00
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#undef pr_debug
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#define pr_debug printk
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2018-08-24 20:52:34 +00:00
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#define RT_PRINTK(fmt, args...) pr_debug(fmt, ## args)
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2018-06-22 16:48:32 +00:00
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#define RT_DISP(dbgtype, dbgflag, printstr)
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2018-08-24 20:52:34 +00:00
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#define RT_TRACE(adapter, comp, drv_level, fmt, args...) \
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RTW_INFO(fmt, ## args)
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2019-05-24 19:43:57 +00:00
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#define PHYDM_SNPRINTF snprintf
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#elif (DM_ODM_SUPPORT_TYPE == ODM_IOT)
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#define pr_debug(fmt, args...) RTW_PRINT_MSG(fmt, ## args)
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#define RT_DEBUG(comp, drv_level, fmt, args...) \
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RTW_PRINT_MSG(fmt, ## args)
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#define PHYDM_SNPRINTF snprintf
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2018-06-22 16:48:32 +00:00
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#else
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2018-08-24 20:52:34 +00:00
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#define pr_debug panic_printk
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2019-05-24 19:43:57 +00:00
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/*@#define RT_PRINTK(fmt, args...) pr_debug("%s(): " fmt, __FUNCTION__, ## args);*/
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2018-08-24 20:52:34 +00:00
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#define RT_PRINTK(fmt, args...) pr_debug(fmt, ## args)
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2019-05-24 19:43:57 +00:00
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#define PHYDM_SNPRINTF snprintf
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2018-06-22 16:48:32 +00:00
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#endif
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#ifndef ASSERT
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#define ASSERT(expr)
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#endif
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#if DBG
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2018-08-24 20:52:34 +00:00
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#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
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#define PHYDM_DBG(dm, comp, fmt, args...) \
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do { \
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2019-05-24 19:43:57 +00:00
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if ((comp) & dm->debug_components) { \
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2018-08-24 20:52:34 +00:00
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pr_debug("[PHYDM] "); \
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2019-05-24 19:43:57 +00:00
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RT_PRINTK(fmt, ## args); \
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2018-08-24 20:52:34 +00:00
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} \
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2018-06-22 16:48:32 +00:00
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} while (0)
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2018-08-24 20:52:34 +00:00
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#define PHYDM_DBG_F(dm, comp, fmt, args...) \
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do { \
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if ((comp) & dm->debug_components) { \
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2019-05-24 19:43:57 +00:00
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RT_PRINTK(fmt, ## args); \
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2018-08-24 20:52:34 +00:00
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} \
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} while (0)
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#define PHYDM_PRINT_ADDR(dm, comp, title_str, addr) \
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do { \
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if ((comp) & dm->debug_components) { \
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int __i; \
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u8 *__ptr = (u8 *)addr; \
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pr_debug("[PHYDM] "); \
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pr_debug(title_str); \
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pr_debug(" "); \
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for (__i = 0; __i < 6; __i++) \
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pr_debug("%02X%s", __ptr[__i], (__i == 5) ? "" : "-");\
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pr_debug("\n"); \
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} \
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2018-06-22 16:48:32 +00:00
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} while (0)
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2018-08-24 20:52:34 +00:00
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#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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static __inline void PHYDM_DBG(PDM_ODM_T dm, int comp, char *fmt, ...)
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{
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RT_STATUS rt_status;
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va_list args;
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char buf[PRINT_MAX_SIZE] = {0};
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if ((comp & dm->debug_components) == 0)
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return;
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if (fmt == NULL)
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return;
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va_start(args, fmt);
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rt_status = (RT_STATUS)RtlStringCbVPrintfA(buf, PRINT_MAX_SIZE, fmt, args);
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va_end(args);
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if (rt_status != RT_STATUS_SUCCESS) {
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DbgPrint("Failed (%d) to print message to buffer\n", rt_status);
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return;
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}
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2019-05-24 19:43:57 +00:00
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#if OS_WIN_FROM_WIN10(OS_VERSION)
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DbgPrintEx(DPFLTR_IHVNETWORK_ID, DPFLTR_ERROR_LEVEL, "%s", buf);
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#else
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DbgPrint("%s", buf);
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#endif
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2018-08-24 20:52:34 +00:00
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}
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static __inline void PHYDM_DBG_F(PDM_ODM_T dm, int comp, char *fmt, ...)
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{
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RT_STATUS rt_status;
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va_list args;
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char buf[PRINT_MAX_SIZE] = {0};
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if ((comp & dm->debug_components) == 0)
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return;
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if (fmt == NULL)
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return;
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va_start(args, fmt);
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rt_status = (RT_STATUS)RtlStringCbVPrintfA(buf, PRINT_MAX_SIZE, fmt, args);
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va_end(args);
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if (rt_status != RT_STATUS_SUCCESS) {
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2019-05-24 19:43:57 +00:00
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/*@DbgPrint("DM Print Fail\n");*/
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2018-08-24 20:52:34 +00:00
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return;
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}
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2019-05-24 19:43:57 +00:00
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#if OS_WIN_FROM_WIN10(OS_VERSION)
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DbgPrintEx(DPFLTR_IHVNETWORK_ID, DPFLTR_ERROR_LEVEL, "%s", buf);
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#else
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2018-08-24 20:52:34 +00:00
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DbgPrint("%s", buf);
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2019-05-24 19:43:57 +00:00
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#endif
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2018-08-24 20:52:34 +00:00
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}
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2018-06-22 16:48:32 +00:00
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2019-05-24 19:43:57 +00:00
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#define PHYDM_PRINT_ADDR(p_dm, comp, title_str, ptr) \
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do { \
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if ((comp) & p_dm->debug_components) { \
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\
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int __i; \
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u8 *__ptr = (u8 *)ptr; \
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pr_debug("[PHYDM] "); \
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pr_debug(title_str); \
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pr_debug(" "); \
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for (__i = 0; __i < 6; __i++) \
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pr_debug("%02X%s", __ptr[__i], (__i == 5) ? "" : "-"); \
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pr_debug("\n"); \
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2018-06-22 16:48:32 +00:00
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} \
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} while (0)
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2019-05-24 19:43:57 +00:00
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#elif (DM_ODM_SUPPORT_TYPE == ODM_IOT)
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2018-06-22 16:48:32 +00:00
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2019-05-24 19:43:57 +00:00
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#define PHYDM_DBG(dm, comp, fmt, args...) \
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do { \
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if ((comp) & dm->debug_components) { \
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RT_DEBUG(COMP_PHYDM, \
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DBG_DMESG, "[PHYDM] " fmt, ##args); \
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} \
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2018-08-24 20:52:34 +00:00
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} while (0)
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2019-05-24 19:43:57 +00:00
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#define PHYDM_DBG_F(dm, comp, fmt, args...) \
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do { \
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if ((comp) & dm->debug_components) { \
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RT_DEBUG(COMP_PHYDM, \
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DBG_DMESG, fmt, ##args); \
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2018-06-22 16:48:32 +00:00
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} \
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} while (0)
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2019-05-24 19:43:57 +00:00
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#define PHYDM_PRINT_ADDR(dm, comp, title_str, addr) \
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do { \
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if ((comp) & dm->debug_components) { \
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RT_DEBUG(COMP_PHYDM, \
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DBG_DMESG, "[PHYDM] " title_str "%pM\n", \
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addr); \
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} \
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2018-08-24 20:52:34 +00:00
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} while (0)
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2019-05-24 19:43:57 +00:00
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#elif defined(DM_ODM_CE_MAC80211_V2)
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#define PHYDM_DBG(dm, comp, fmt, args...)
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#define PHYDM_DBG_F(dm, comp, fmt, args...)
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#define PHYDM_PRINT_ADDR(dm, comp, title_str, addr)
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2018-06-22 16:48:32 +00:00
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2018-08-24 20:52:34 +00:00
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#else
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2019-05-24 19:43:57 +00:00
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#define PHYDM_DBG(dm, comp, fmt, args...) \
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do { \
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struct dm_struct *__dm = (dm); \
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if ((comp) & __dm->debug_components) { \
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RT_TRACE(((struct rtl_priv *)__dm->adapter),\
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COMP_PHYDM, DBG_DMESG, \
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"[PHYDM] " fmt, ##args); \
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} \
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} while (0)
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#define PHYDM_DBG_F(dm, comp, fmt, args...) \
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do { \
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struct dm_struct *__dm = (dm); \
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if ((comp) & __dm->debug_components) { \
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RT_TRACE(((struct rtl_priv *)__dm->adapter),\
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COMP_PHYDM, DBG_DMESG, fmt, ##args); \
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} \
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} while (0)
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#define PHYDM_PRINT_ADDR(dm, comp, title_str, addr) \
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do { \
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struct dm_struct *__dm = (dm); \
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if ((comp) & __dm->debug_components) { \
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RT_TRACE(((struct rtl_priv *)__dm->adapter),\
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COMP_PHYDM, DBG_DMESG, \
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"[PHYDM] " title_str "%pM\n", addr);\
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} \
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} while (0)
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#endif
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#else /*@#if DBG*/
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2018-08-24 20:52:34 +00:00
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#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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2019-05-24 19:43:57 +00:00
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static __inline void PHYDM_DBG(struct dm_struct *dm, int comp, char *fmt, ...)
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{
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RT_STATUS rt_status;
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va_list args;
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char buf[PRINT_MAX_SIZE] = {0};
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if ((comp & dm->debug_components) == 0)
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return;
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if (fmt == NULL)
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return;
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va_start(args, fmt);
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rt_status = (RT_STATUS)RtlStringCbVPrintfA(buf, PRINT_MAX_SIZE, fmt, args);
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va_end(args);
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if (rt_status != RT_STATUS_SUCCESS) {
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DbgPrint("Failed (%d) to print message to buffer\n", rt_status);
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return;
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}
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PHYDM_TRACE(buf);
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}
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static __inline void PHYDM_DBG_F(struct dm_struct *dm, int comp, char *fmt, ...)
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{
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}
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2018-08-24 20:52:34 +00:00
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#else
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2018-08-25 16:21:32 +00:00
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#define PHYDM_DBG(dm, comp, fmt, args...)
|
|
|
|
#define PHYDM_DBG_F(dm, comp, fmt, args...)
|
2018-08-24 20:52:34 +00:00
|
|
|
#endif
|
|
|
|
#define PHYDM_PRINT_ADDR(dm, comp, title_str, ptr)
|
2019-05-24 19:43:57 +00:00
|
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|
|
2018-06-22 16:48:32 +00:00
|
|
|
#endif
|
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|
|
|
2019-05-24 19:43:57 +00:00
|
|
|
#define DBGPORT_PRI_3 3 /*@Debug function (the highest priority)*/
|
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|
|
#define DBGPORT_PRI_2 2 /*@Check hang function & Strong function*/
|
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|
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#define DBGPORT_PRI_1 1 /*Watch dog function*/
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|
|
#define DBGPORT_RELEASE 0 /*@Init value (the lowest priority)*/
|
2018-06-22 16:48:32 +00:00
|
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|
|
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
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|
#define PHYDM_DBGPRINT 0
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|
#define PHYDM_SSCANF(x, y, z) dcmd_scanf(x, y, z)
|
2019-05-24 19:43:57 +00:00
|
|
|
#define PDM_VAST_SNPF PDM_SNPF
|
2018-06-22 16:48:32 +00:00
|
|
|
#if (PHYDM_DBGPRINT == 1)
|
2018-08-24 20:52:34 +00:00
|
|
|
#define PDM_SNPF(msg) \
|
2018-06-22 16:48:32 +00:00
|
|
|
do {\
|
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|
|
rsprintf msg;\
|
2018-08-24 20:52:34 +00:00
|
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|
pr_debug("%s", output);\
|
2018-06-22 16:48:32 +00:00
|
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|
} while (0)
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|
#else
|
2018-08-24 20:52:34 +00:00
|
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|
2019-05-24 19:43:57 +00:00
|
|
|
static __inline void PDM_SNPF(u32 out_len, u32 used, char *buff, int len,
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|
char *fmt, ...)
|
2018-08-24 20:52:34 +00:00
|
|
|
{
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|
RT_STATUS rt_status;
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|
|
va_list args;
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|
char buf[PRINT_MAX_SIZE] = {0};
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|
if (fmt == NULL)
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|
return;
|
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va_start(args, fmt);
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|
rt_status = (RT_STATUS)RtlStringCbVPrintfA(buf, PRINT_MAX_SIZE, fmt, args);
|
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|
va_end(args);
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|
|
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|
|
|
if (rt_status != RT_STATUS_SUCCESS) {
|
2019-05-24 19:43:57 +00:00
|
|
|
/*@DbgPrint("DM Print Fail\n");*/
|
2018-08-24 20:52:34 +00:00
|
|
|
return;
|
|
|
|
}
|
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|
|
DCMD_Printf(buf);
|
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|
|
}
|
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|
2019-05-24 19:43:57 +00:00
|
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|
|
|
|
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|
|
|
#endif /*@#if (PHYDM_DBGPRINT == 1)*/
|
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|
|
#else /*@(DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP))*/
|
2018-08-24 20:52:34 +00:00
|
|
|
#if (DM_ODM_SUPPORT_TYPE == ODM_CE) || defined(__OSK__)
|
2019-05-24 19:43:57 +00:00
|
|
|
#define PHYDM_DBGPRINT 0
|
2018-08-24 20:52:34 +00:00
|
|
|
#else
|
2019-05-24 19:43:57 +00:00
|
|
|
#define PHYDM_DBGPRINT 1
|
2018-08-24 20:52:34 +00:00
|
|
|
#endif
|
2019-05-24 19:43:57 +00:00
|
|
|
#define MAX_ARGC 20
|
|
|
|
#define MAX_ARGV 16
|
|
|
|
#define DCMD_DECIMAL "%d"
|
|
|
|
#define DCMD_CHAR "%c"
|
|
|
|
#define DCMD_HEX "%x"
|
2018-06-22 16:48:32 +00:00
|
|
|
|
|
|
|
#define PHYDM_SSCANF(x, y, z) sscanf(x, y, z)
|
|
|
|
|
2019-05-24 19:43:57 +00:00
|
|
|
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
|
|
|
|
#define PDM_VAST_SNPF(out_len, used, buff, len, fmt, args...) RT_PRINTK(fmt, ## args)
|
|
|
|
|
|
|
|
#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
|
|
|
|
#define PDM_VAST_SNPF(out_len, used, buff, len, fmt, args...) \
|
2018-08-24 20:52:34 +00:00
|
|
|
do { \
|
2019-05-24 19:43:57 +00:00
|
|
|
RT_DEBUG(COMP_PHYDM, DBG_DMESG, fmt, ##args); \
|
2018-06-22 16:48:32 +00:00
|
|
|
} while (0)
|
2019-05-24 19:43:57 +00:00
|
|
|
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
|
|
|
|
#define PDM_VAST_SNPF(out_len, used, buff, len, fmt, args...)
|
|
|
|
#else
|
|
|
|
#define PDM_VAST_SNPF(out_len, used, buff, len, fmt, args...) \
|
|
|
|
RT_TRACE(((struct rtl_priv *)dm->adapter), COMP_PHYDM, \
|
|
|
|
DBG_DMESG, fmt, ##args)
|
|
|
|
#endif
|
2018-06-22 16:48:32 +00:00
|
|
|
|
|
|
|
#if (PHYDM_DBGPRINT == 1)
|
2018-08-24 20:52:34 +00:00
|
|
|
#define PDM_SNPF(out_len, used, buff, len, fmt, args...) \
|
|
|
|
do { \
|
|
|
|
snprintf(buff, len, fmt, ##args); \
|
|
|
|
pr_debug("%s", output); \
|
|
|
|
} while (0)
|
2018-06-22 16:48:32 +00:00
|
|
|
#else
|
2018-08-24 20:52:34 +00:00
|
|
|
#define PDM_SNPF(out_len, used, buff, len, fmt, args...) \
|
|
|
|
do { \
|
2019-05-24 19:43:57 +00:00
|
|
|
u32 *__pdm_snpf_u = &(used); \
|
|
|
|
if (out_len > *__pdm_snpf_u) \
|
|
|
|
*__pdm_snpf_u += snprintf(buff, len, fmt, ##args);\
|
2018-08-24 20:52:34 +00:00
|
|
|
} while (0)
|
|
|
|
#endif
|
2018-06-22 16:48:32 +00:00
|
|
|
#endif
|
2019-05-24 19:43:57 +00:00
|
|
|
/* @1 ============================================================
|
|
|
|
* 1 enumeration
|
|
|
|
* 1 ============================================================
|
|
|
|
*/
|
|
|
|
|
|
|
|
enum auto_detection_state { /*@Fast antenna training*/
|
|
|
|
AD_LEGACY_MODE = 0,
|
|
|
|
AD_HT_MODE = 1,
|
|
|
|
AD_VHT_MODE = 2
|
|
|
|
};
|
|
|
|
|
|
|
|
/*@
|
|
|
|
* ============================================================
|
|
|
|
* 1 structure
|
|
|
|
* ============================================================
|
|
|
|
*/
|
|
|
|
|
|
|
|
#ifdef CONFIG_PHYDM_DEBUG_FUNCTION
|
|
|
|
u8 phydm_get_l_sig_rate(void *dm_void, u8 rate_idx_l_sig);
|
|
|
|
#endif
|
2018-06-22 16:48:32 +00:00
|
|
|
|
2018-08-24 20:52:34 +00:00
|
|
|
void phydm_init_debug_setting(struct dm_struct *dm);
|
2018-07-02 16:49:32 +00:00
|
|
|
|
2018-08-24 20:52:34 +00:00
|
|
|
void phydm_bb_dbg_port_header_sel(void *dm_void, u32 header_idx);
|
2018-06-22 16:48:32 +00:00
|
|
|
|
2018-08-24 20:52:34 +00:00
|
|
|
u8 phydm_set_bb_dbg_port(void *dm_void, u8 curr_dbg_priority, u32 debug_port);
|
2018-06-22 16:48:32 +00:00
|
|
|
|
2018-08-24 20:52:34 +00:00
|
|
|
void phydm_release_bb_dbg_port(void *dm_void);
|
2018-06-22 16:48:32 +00:00
|
|
|
|
2019-05-24 19:43:57 +00:00
|
|
|
u32 phydm_get_bb_dbg_port_val(void *dm_void);
|
2018-06-22 16:48:32 +00:00
|
|
|
|
2018-08-24 20:52:34 +00:00
|
|
|
void phydm_reset_rx_rate_distribution(struct dm_struct *dm);
|
2018-06-22 16:48:32 +00:00
|
|
|
|
2018-08-24 20:52:34 +00:00
|
|
|
void phydm_rx_rate_distribution(void *dm_void);
|
2018-06-22 16:48:32 +00:00
|
|
|
|
2019-05-24 19:43:57 +00:00
|
|
|
void phydm_show_phy_hitogram(void *dm_void);
|
|
|
|
|
2018-08-24 20:52:34 +00:00
|
|
|
void phydm_get_avg_phystatus_val(void *dm_void);
|
2018-06-22 16:48:32 +00:00
|
|
|
|
2018-08-24 20:52:34 +00:00
|
|
|
void phydm_get_phy_statistic(void *dm_void);
|
2018-06-22 16:48:32 +00:00
|
|
|
|
2019-05-24 19:43:57 +00:00
|
|
|
void phydm_dm_summary(void *dm_void, u8 macid);
|
|
|
|
|
2018-08-24 20:52:34 +00:00
|
|
|
void phydm_basic_dbg_message(void *dm_void);
|
2018-06-22 16:48:32 +00:00
|
|
|
|
2018-08-24 20:52:34 +00:00
|
|
|
void phydm_basic_profile(void *dm_void, u32 *_used, char *output,
|
|
|
|
u32 *_out_len);
|
2018-06-22 16:48:32 +00:00
|
|
|
#if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP))
|
2018-08-24 20:52:34 +00:00
|
|
|
s32 phydm_cmd(struct dm_struct *dm, char *input, u32 in_len, u8 flag,
|
|
|
|
char *output, u32 out_len);
|
2018-06-22 16:48:32 +00:00
|
|
|
#endif
|
2018-08-24 20:52:34 +00:00
|
|
|
void phydm_cmd_parser(struct dm_struct *dm, char input[][16], u32 input_num,
|
|
|
|
u8 flag, char *output, u32 out_len);
|
2018-06-22 16:48:32 +00:00
|
|
|
|
|
|
|
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
2019-05-24 19:43:57 +00:00
|
|
|
void phydm_basic_dbg_msg_cli_win(void *dm_void, char *buf);
|
|
|
|
|
2018-06-22 16:48:32 +00:00
|
|
|
void phydm_sbd_check(
|
2019-05-24 19:43:57 +00:00
|
|
|
struct dm_struct *dm);
|
2018-06-22 16:48:32 +00:00
|
|
|
|
|
|
|
void phydm_sbd_callback(
|
2019-05-24 19:43:57 +00:00
|
|
|
struct phydm_timer_list *timer);
|
2018-06-22 16:48:32 +00:00
|
|
|
|
|
|
|
void phydm_sbd_workitem_callback(
|
2019-05-24 19:43:57 +00:00
|
|
|
void *context);
|
2018-06-22 16:48:32 +00:00
|
|
|
#endif
|
|
|
|
|
2018-08-24 20:52:34 +00:00
|
|
|
void phydm_fw_trace_en_h2c(void *dm_void, boolean enable,
|
|
|
|
u32 fw_debug_component, u32 monitor_mode, u32 macid);
|
2018-06-22 16:48:32 +00:00
|
|
|
|
2018-08-24 20:52:34 +00:00
|
|
|
void phydm_fw_trace_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len);
|
2018-06-22 16:48:32 +00:00
|
|
|
|
2018-08-24 20:52:34 +00:00
|
|
|
void phydm_fw_trace_handler_code(void *dm_void, u8 *buffer, u8 cmd_len);
|
2018-06-22 16:48:32 +00:00
|
|
|
|
2018-08-24 20:52:34 +00:00
|
|
|
void phydm_fw_trace_handler_8051(void *dm_void, u8 *cmd_buf, u8 cmd_len);
|
2018-06-22 16:48:32 +00:00
|
|
|
|
2019-05-24 19:43:57 +00:00
|
|
|
#endif /* @__ODM_DBG_H__ */
|