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https://github.com/chinawrj/rtl8812au
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remove unused PWR LIMITs
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parent
bc8c3071c0
commit
86d2fd5519
@ -5798,6 +5798,7 @@ odm_read_and_config_mp_8814a_txpwr_lmt(
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* TXPWR_LMT_type2.TXT
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* TXPWR_LMT_type2.TXT
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******************************************************************************/
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******************************************************************************/
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/*
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const char *Array_MP_8814A_TXPWR_LMT_type2[] = {
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const char *Array_MP_8814A_TXPWR_LMT_type2[] = {
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"FCC", "2.4G", "20M", "CCK", "1T", "01", "36",
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"FCC", "2.4G", "20M", "CCK", "1T", "01", "36",
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"ETSI", "2.4G", "20M", "CCK", "1T", "01", "36",
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"ETSI", "2.4G", "20M", "CCK", "1T", "01", "36",
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@ -6814,6 +6815,7 @@ _odm_read_and_config_mp_8814a_txpwr_lmt_type2(
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* TXPWR_LMT_Type3.TXT
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* TXPWR_LMT_Type3.TXT
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******************************************************************************/
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******************************************************************************/
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/*
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const char *Array_MP_8814A_TXPWR_LMT_Type3[] = {
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const char *Array_MP_8814A_TXPWR_LMT_Type3[] = {
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"FCC", "2.4G", "20M", "CCK", "1T", "01", "46",
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"FCC", "2.4G", "20M", "CCK", "1T", "01", "46",
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"ETSI", "2.4G", "20M", "CCK", "1T", "01", "40",
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"ETSI", "2.4G", "20M", "CCK", "1T", "01", "40",
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@ -7789,6 +7791,7 @@ const char *Array_MP_8814A_TXPWR_LMT_Type3[] = {
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"MKK", "5G", "80M", "VHT", "4T", "155", "63"
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"MKK", "5G", "80M", "VHT", "4T", "155", "63"
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};
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};
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/*
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void
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void
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_odm_read_and_config_mp_8814a_txpwr_lmt_type3(
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_odm_read_and_config_mp_8814a_txpwr_lmt_type3(
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struct dm_struct * pDM_Odm
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struct dm_struct * pDM_Odm
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@ -7798,13 +7801,6 @@ _odm_read_and_config_mp_8814a_txpwr_lmt_type3(
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u4Byte ArrayLen = sizeof(Array_MP_8814A_TXPWR_LMT_Type3)/sizeof(pu1Byte);
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u4Byte ArrayLen = sizeof(Array_MP_8814A_TXPWR_LMT_Type3)/sizeof(pu1Byte);
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pu1Byte *Array = (pu1Byte *)Array_MP_8814A_TXPWR_LMT_Type3;
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pu1Byte *Array = (pu1Byte *)Array_MP_8814A_TXPWR_LMT_Type3;
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#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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PADAPTER Adapter = pDM_Odm->Adapter;
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
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PlatformZeroMemory(pHalData->BufOfLinesPwrLmt, MAX_LINES_HWCONFIG_TXT*MAX_BYTES_LINE_HWCONFIG_TXT);
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pHalData->nLinesReadPwrLmt = ArrayLen/7;
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#endif
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PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_8814A_TXPWR_LMT_Type3\n");
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PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_8814A_TXPWR_LMT_Type3\n");
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@ -7818,10 +7814,6 @@ _odm_read_and_config_mp_8814a_txpwr_lmt_type3(
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pu1Byte val = Array[i+6];
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pu1Byte val = Array[i+6];
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odm_ConfigBB_TXPWR_LMT_8814A(pDM_Odm, regulation, band, bandwidth, rate, rfPath, chnl, val);
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odm_ConfigBB_TXPWR_LMT_8814A(pDM_Odm, regulation, band, bandwidth, rate, rfPath, chnl, val);
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#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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rsprintf((char *)pHalData->BufOfLinesPwrLmt[i/7], 100, "\"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\",",
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regulation, band, bandwidth, rate, rfPath, chnl, val);
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#endif
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}
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}
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}
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}
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@ -7830,6 +7822,7 @@ _odm_read_and_config_mp_8814a_txpwr_lmt_type3(
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* TXPWR_LMT_Type5.TXT
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* TXPWR_LMT_Type5.TXT
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******************************************************************************/
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******************************************************************************/
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/*
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const char *Array_MP_8814A_TXPWR_LMT_Type5[] = {
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const char *Array_MP_8814A_TXPWR_LMT_Type5[] = {
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"FCC", "2.4G", "20M", "CCK", "1T", "01", "46",
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"FCC", "2.4G", "20M", "CCK", "1T", "01", "46",
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"ETSI", "2.4G", "20M", "CCK", "1T", "01", "40",
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"ETSI", "2.4G", "20M", "CCK", "1T", "01", "40",
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@ -8803,8 +8796,10 @@ const char *Array_MP_8814A_TXPWR_LMT_Type5[] = {
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"FCC", "5G", "80M", "VHT", "4T", "155", "46",
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"FCC", "5G", "80M", "VHT", "4T", "155", "46",
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"ETSI", "5G", "80M", "VHT", "4T", "155", "40",
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"ETSI", "5G", "80M", "VHT", "4T", "155", "40",
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"MKK", "5G", "80M", "VHT", "4T", "155", "63"
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"MKK", "5G", "80M", "VHT", "4T", "155", "63"
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};
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//};
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/*
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void
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void
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_odm_read_and_config_mp_8814a_txpwr_lmt_type5(
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_odm_read_and_config_mp_8814a_txpwr_lmt_type5(
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struct dm_struct * pDM_Odm
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struct dm_struct * pDM_Odm
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@ -8841,6 +8836,7 @@ _odm_read_and_config_mp_8814a_txpwr_lmt_type5(
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}
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}
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}
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}
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*/
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#endif /* end of HWIMG_SUPPORT*/
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#endif /* end of HWIMG_SUPPORT*/
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