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1d6ef930b9
8821cu-20210916/hal/hal_com_phycfg.c
morrownr 1d6ef930b9 initial commit
2022-11-17 08:26:57 -06:00

6276 lines
184 KiB
C
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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#define _HAL_COM_PHYCFG_C_
#include <drv_types.h>
#include <hal_data.h>
#define PG_TXPWR_1PATH_BYTE_NUM_2G 18
#define PG_TXPWR_BASE_BYTE_NUM_2G 11
#define PG_TXPWR_1PATH_BYTE_NUM_5G 24
#define PG_TXPWR_BASE_BYTE_NUM_5G 14
#define PG_TXPWR_MSB_DIFF_S4BIT(_pg_v) (((_pg_v) & 0xf0) >> 4)
#define PG_TXPWR_LSB_DIFF_S4BIT(_pg_v) ((_pg_v) & 0x0f)
#define PG_TXPWR_MSB_DIFF_TO_S8BIT(_pg_v) ((PG_TXPWR_MSB_DIFF_S4BIT(_pg_v) & BIT3) ? (PG_TXPWR_MSB_DIFF_S4BIT(_pg_v) | 0xF0) : PG_TXPWR_MSB_DIFF_S4BIT(_pg_v))
#define PG_TXPWR_LSB_DIFF_TO_S8BIT(_pg_v) ((PG_TXPWR_LSB_DIFF_S4BIT(_pg_v) & BIT3) ? (PG_TXPWR_LSB_DIFF_S4BIT(_pg_v) | 0xF0) : PG_TXPWR_LSB_DIFF_S4BIT(_pg_v))
#define IS_PG_TXPWR_BASE_INVALID(hal_spec, _base) ((_base) > hal_spec->txgi_max)
#define IS_PG_TXPWR_DIFF_INVALID(_diff) ((_diff) > 7 || (_diff) < -8)
#define PG_TXPWR_INVALID_BASE 255
#define PG_TXPWR_INVALID_DIFF 8
#if !IS_PG_TXPWR_DIFF_INVALID(PG_TXPWR_INVALID_DIFF)
#error "PG_TXPWR_DIFF definition has problem"
#endif
#define PG_TXPWR_SRC_PG_DATA 0
#define PG_TXPWR_SRC_IC_DEF 1
#define PG_TXPWR_SRC_DEF 2
#define PG_TXPWR_SRC_NUM 3
const char *const _pg_txpwr_src_str[] = {
"PG_DATA",
"IC_DEF",
"DEF",
"UNKNOWN"
};
#define pg_txpwr_src_str(src) (((src) >= PG_TXPWR_SRC_NUM) ? _pg_txpwr_src_str[PG_TXPWR_SRC_NUM] : _pg_txpwr_src_str[(src)])
const char *const _txpwr_pg_mode_str[] = {
"PWR_IDX",
"TSSI_OFFSET",
"UNKNOWN",
};
static const u8 rate_sec_base[RATE_SECTION_NUM] = {
MGN_11M,
MGN_54M,
MGN_MCS7,
MGN_MCS15,
MGN_MCS23,
MGN_MCS31,
MGN_VHT1SS_MCS7,
MGN_VHT2SS_MCS7,
MGN_VHT3SS_MCS7,
MGN_VHT4SS_MCS7,
};
#ifdef CONFIG_TXPWR_PG_WITH_PWR_IDX
typedef struct _TxPowerInfo24G {
u8 IndexCCK_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G];
u8 IndexBW40_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G];
/* If only one tx, only BW20 and OFDM are used. */
s8 CCK_Diff[MAX_RF_PATH][MAX_TX_COUNT];
s8 OFDM_Diff[MAX_RF_PATH][MAX_TX_COUNT];
s8 BW20_Diff[MAX_RF_PATH][MAX_TX_COUNT];
s8 BW40_Diff[MAX_RF_PATH][MAX_TX_COUNT];
} TxPowerInfo24G;
typedef struct _TxPowerInfo5G {
u8 IndexBW40_Base[MAX_RF_PATH][MAX_CHNL_GROUP_5G];
/* If only one tx, only BW20, OFDM, BW80 and BW160 are used. */
s8 OFDM_Diff[MAX_RF_PATH][MAX_TX_COUNT];
s8 BW20_Diff[MAX_RF_PATH][MAX_TX_COUNT];
s8 BW40_Diff[MAX_RF_PATH][MAX_TX_COUNT];
s8 BW80_Diff[MAX_RF_PATH][MAX_TX_COUNT];
s8 BW160_Diff[MAX_RF_PATH][MAX_TX_COUNT];
} TxPowerInfo5G;
#ifndef DBG_PG_TXPWR_READ
#define DBG_PG_TXPWR_READ 0
#endif
#if DBG_PG_TXPWR_READ
static void dump_pg_txpwr_info_2g(void *sel, TxPowerInfo24G *txpwr_info, u8 rfpath_num, u8 max_tx_cnt)
{
int path, group, tx_idx;
RTW_PRINT_SEL(sel, "2.4G\n");
RTW_PRINT_SEL(sel, "CCK-1T base:\n");
RTW_PRINT_SEL(sel, "%4s ", "");
for (group = 0; group < MAX_CHNL_GROUP_24G; group++)
_RTW_PRINT_SEL(sel, "G%02d ", group);
_RTW_PRINT_SEL(sel, "\n");
for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) {
RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path));
for (group = 0; group < MAX_CHNL_GROUP_24G; group++)
_RTW_PRINT_SEL(sel, "%3u ", txpwr_info->IndexCCK_Base[path][group]);
_RTW_PRINT_SEL(sel, "\n");
}
RTW_PRINT_SEL(sel, "\n");
RTW_PRINT_SEL(sel, "CCK diff:\n");
RTW_PRINT_SEL(sel, "%4s ", "");
for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++)
_RTW_PRINT_SEL(sel, "%dT ", path + 1);
_RTW_PRINT_SEL(sel, "\n");
for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) {
RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path));
for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++)
_RTW_PRINT_SEL(sel, "%2d ", txpwr_info->CCK_Diff[path][tx_idx]);
_RTW_PRINT_SEL(sel, "\n");
}
RTW_PRINT_SEL(sel, "\n");
RTW_PRINT_SEL(sel, "BW40-1S base:\n");
RTW_PRINT_SEL(sel, "%4s ", "");
for (group = 0; group < MAX_CHNL_GROUP_24G - 1; group++)
_RTW_PRINT_SEL(sel, "G%02d ", group);
_RTW_PRINT_SEL(sel, "\n");
for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) {
RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path));
for (group = 0; group < MAX_CHNL_GROUP_24G - 1; group++)
_RTW_PRINT_SEL(sel, "%3u ", txpwr_info->IndexBW40_Base[path][group]);
_RTW_PRINT_SEL(sel, "\n");
}
RTW_PRINT_SEL(sel, "\n");
RTW_PRINT_SEL(sel, "OFDM diff:\n");
RTW_PRINT_SEL(sel, "%4s ", "");
for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++)
_RTW_PRINT_SEL(sel, "%dT ", path + 1);
_RTW_PRINT_SEL(sel, "\n");
for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) {
RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path));
for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++)
_RTW_PRINT_SEL(sel, "%2d ", txpwr_info->OFDM_Diff[path][tx_idx]);
_RTW_PRINT_SEL(sel, "\n");
}
RTW_PRINT_SEL(sel, "\n");
RTW_PRINT_SEL(sel, "BW20 diff:\n");
RTW_PRINT_SEL(sel, "%4s ", "");
for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++)
_RTW_PRINT_SEL(sel, "%dS ", path + 1);
_RTW_PRINT_SEL(sel, "\n");
for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) {
RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path));
for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++)
_RTW_PRINT_SEL(sel, "%2d ", txpwr_info->BW20_Diff[path][tx_idx]);
_RTW_PRINT_SEL(sel, "\n");
}
RTW_PRINT_SEL(sel, "\n");
RTW_PRINT_SEL(sel, "BW40 diff:\n");
RTW_PRINT_SEL(sel, "%4s ", "");
for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++)
_RTW_PRINT_SEL(sel, "%dS ", path + 1);
_RTW_PRINT_SEL(sel, "\n");
for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) {
RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path));
for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++)
_RTW_PRINT_SEL(sel, "%2d ", txpwr_info->BW40_Diff[path][tx_idx]);
_RTW_PRINT_SEL(sel, "\n");
}
RTW_PRINT_SEL(sel, "\n");
}
static void dump_pg_txpwr_info_5g(void *sel, TxPowerInfo5G *txpwr_info, u8 rfpath_num, u8 max_tx_cnt)
{
int path, group, tx_idx;
RTW_PRINT_SEL(sel, "5G\n");
RTW_PRINT_SEL(sel, "BW40-1S base:\n");
RTW_PRINT_SEL(sel, "%4s ", "");
for (group = 0; group < MAX_CHNL_GROUP_5G; group++)
_RTW_PRINT_SEL(sel, "G%02d ", group);
_RTW_PRINT_SEL(sel, "\n");
for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) {
RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path));
for (group = 0; group < MAX_CHNL_GROUP_5G; group++)
_RTW_PRINT_SEL(sel, "%3u ", txpwr_info->IndexBW40_Base[path][group]);
_RTW_PRINT_SEL(sel, "\n");
}
RTW_PRINT_SEL(sel, "\n");
RTW_PRINT_SEL(sel, "OFDM diff:\n");
RTW_PRINT_SEL(sel, "%4s ", "");
for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++)
_RTW_PRINT_SEL(sel, "%dT ", path + 1);
_RTW_PRINT_SEL(sel, "\n");
for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) {
RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path));
for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++)
_RTW_PRINT_SEL(sel, "%2d ", txpwr_info->OFDM_Diff[path][tx_idx]);
_RTW_PRINT_SEL(sel, "\n");
}
RTW_PRINT_SEL(sel, "\n");
RTW_PRINT_SEL(sel, "BW20 diff:\n");
RTW_PRINT_SEL(sel, "%4s ", "");
for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++)
_RTW_PRINT_SEL(sel, "%dS ", path + 1);
_RTW_PRINT_SEL(sel, "\n");
for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) {
RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path));
for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++)
_RTW_PRINT_SEL(sel, "%2d ", txpwr_info->BW20_Diff[path][tx_idx]);
_RTW_PRINT_SEL(sel, "\n");
}
RTW_PRINT_SEL(sel, "\n");
RTW_PRINT_SEL(sel, "BW40 diff:\n");
RTW_PRINT_SEL(sel, "%4s ", "");
for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++)
_RTW_PRINT_SEL(sel, "%dS ", path + 1);
_RTW_PRINT_SEL(sel, "\n");
for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) {
RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path));
for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++)
_RTW_PRINT_SEL(sel, "%2d ", txpwr_info->BW40_Diff[path][tx_idx]);
_RTW_PRINT_SEL(sel, "\n");
}
RTW_PRINT_SEL(sel, "\n");
RTW_PRINT_SEL(sel, "BW80 diff:\n");
RTW_PRINT_SEL(sel, "%4s ", "");
for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++)
_RTW_PRINT_SEL(sel, "%dS ", path + 1);
_RTW_PRINT_SEL(sel, "\n");
for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) {
RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path));
for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++)
_RTW_PRINT_SEL(sel, "%2d ", txpwr_info->BW80_Diff[path][tx_idx]);
_RTW_PRINT_SEL(sel, "\n");
}
RTW_PRINT_SEL(sel, "\n");
RTW_PRINT_SEL(sel, "BW160 diff:\n");
RTW_PRINT_SEL(sel, "%4s ", "");
for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++)
_RTW_PRINT_SEL(sel, "%dS ", path + 1);
_RTW_PRINT_SEL(sel, "\n");
for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) {
RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path));
for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++)
_RTW_PRINT_SEL(sel, "%2d ", txpwr_info->BW160_Diff[path][tx_idx]);
_RTW_PRINT_SEL(sel, "\n");
}
RTW_PRINT_SEL(sel, "\n");
}
#endif /* DBG_PG_TXPWR_READ */
const struct map_t pg_txpwr_def_info =
MAP_ENT(0xB8, 1, 0xFF
, MAPSEG_ARRAY_ENT(0x10, 168,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x24, 0xEE, 0xEE, 0xEE, 0xEE,
0xEE, 0xEE, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A,
0x04, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x24, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0x2A, 0x2A, 0x2A, 0x2A,
0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x04, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE,
0xEE, 0xEE, 0xEE, 0xEE, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x24,
0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A,
0x2A, 0x2A, 0x2A, 0x2A, 0x04, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0x2D, 0x2D,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x24, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE,
0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x04, 0xEE,
0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE)
);
#ifdef CONFIG_RTL8188E
static const struct map_t rtl8188e_pg_txpwr_def_info =
MAP_ENT(0xB8, 1, 0xFF
, MAPSEG_ARRAY_ENT(0x10, 12,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x24)
);
#endif
#ifdef CONFIG_RTL8188F
static const struct map_t rtl8188f_pg_txpwr_def_info =
MAP_ENT(0xB8, 1, 0xFF
, MAPSEG_ARRAY_ENT(0x10, 12,
0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x27, 0x27, 0x27, 0x27, 0x27, 0x24)
);
#endif
#ifdef CONFIG_RTL8188GTV
static const struct map_t rtl8188gtv_pg_txpwr_def_info =
MAP_ENT(0xB8, 1, 0xFF
, MAPSEG_ARRAY_ENT(0x10, 12,
0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x27, 0x27, 0x27, 0x27, 0x27, 0x24)
);
#endif
#ifdef CONFIG_RTL8723B
static const struct map_t rtl8723b_pg_txpwr_def_info =
MAP_ENT(0xB8, 2, 0xFF
, MAPSEG_ARRAY_ENT(0x10, 12,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0xE0)
, MAPSEG_ARRAY_ENT(0x3A, 12,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0xE0)
);
#endif
#ifdef CONFIG_RTL8703B
static const struct map_t rtl8703b_pg_txpwr_def_info =
MAP_ENT(0xB8, 1, 0xFF
, MAPSEG_ARRAY_ENT(0x10, 12,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02)
);
#endif
#ifdef CONFIG_RTL8723D
static const struct map_t rtl8723d_pg_txpwr_def_info =
MAP_ENT(0xB8, 2, 0xFF
, MAPSEG_ARRAY_ENT(0x10, 12,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02)
, MAPSEG_ARRAY_ENT(0x3A, 12,
0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x21, 0x21, 0x21, 0x21, 0x21, 0x02)
);
#endif
#ifdef CONFIG_RTL8192E
static const struct map_t rtl8192e_pg_txpwr_def_info =
MAP_ENT(0xB8, 2, 0xFF
, MAPSEG_ARRAY_ENT(0x10, 14,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x24, 0xEE, 0xEE)
, MAPSEG_ARRAY_ENT(0x3A, 14,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x24, 0xEE, 0xEE)
);
#endif
#ifdef CONFIG_RTL8821A
static const struct map_t rtl8821a_pg_txpwr_def_info =
MAP_ENT(0xB8, 1, 0xFF
, MAPSEG_ARRAY_ENT(0x10, 39,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x24, 0xFF, 0xFF, 0xFF, 0xFF,
0xFF, 0xFF, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A,
0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00)
);
#endif
#ifdef CONFIG_RTL8821C
static const struct map_t rtl8821c_pg_txpwr_def_info =
MAP_ENT(0xB8, 1, 0xFF
, MAPSEG_ARRAY_ENT(0x10, 54,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02, 0xFF, 0xFF, 0xFF, 0xFF,
0xFF, 0xFF, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28,
0x02, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xEC, 0xFF, 0xFF, 0xFF, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02)
);
#endif
#ifdef CONFIG_RTL8710B
static const struct map_t rtl8710b_pg_txpwr_def_info =
MAP_ENT(0xC8, 1, 0xFF
, MAPSEG_ARRAY_ENT(0x20, 12,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x20)
);
#endif
#ifdef CONFIG_RTL8812A
static const struct map_t rtl8812a_pg_txpwr_def_info =
MAP_ENT(0xB8, 1, 0xFF
, MAPSEG_ARRAY_ENT(0x10, 82,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02, 0xEE, 0xEE, 0xFF, 0xFF,
0xFF, 0xFF, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A,
0x02, 0xEE, 0xFF, 0xFF, 0xEE, 0xFF, 0x00, 0xEE, 0xFF, 0xFF, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02, 0xEE, 0xEE, 0xFF, 0xFF, 0xFF, 0xFF, 0x2A, 0x2A, 0x2A, 0x2A,
0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x02, 0xEE, 0xFF, 0xFF, 0xEE, 0xFF,
0x00, 0xEE)
);
#endif
#ifdef CONFIG_RTL8822B
static const struct map_t rtl8822b_pg_txpwr_def_info =
MAP_ENT(0xB8, 1, 0xFF
, MAPSEG_ARRAY_ENT(0x10, 82,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02, 0xEE, 0xEE, 0xFF, 0xFF,
0xFF, 0xFF, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A,
0x02, 0xEE, 0xFF, 0xFF, 0xEE, 0xFF, 0xEC, 0xEC, 0xFF, 0xFF, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02, 0xEE, 0xEE, 0xFF, 0xFF, 0xFF, 0xFF, 0x2A, 0x2A, 0x2A, 0x2A,
0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x02, 0xEE, 0xFF, 0xFF, 0xEE, 0xFF,
0xEC, 0xEC)
);
#endif
#ifdef CONFIG_RTL8822C
static const struct map_t rtl8822c_pg_txpwr_def_info =
MAP_ENT(0xB8, 1, 0xFF
, MAPSEG_ARRAY_ENT(0x10, 82,
0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x02, 0x00, 0x00, 0xFF, 0xFF,
0xFF, 0xFF, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33,
0x02, 0x00, 0xFF, 0xFF, 0x00, 0xFF, 0x00, 0x00, 0xFF, 0xFF, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33, 0x33, 0x02, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x02, 0x00, 0xFF, 0xFF, 0x00, 0xFF,
0x00, 0x00)
);
#endif
/* todo : 8723f don't know default power */
#ifdef CONFIG_RTL8723F
static const struct map_t rtl8723f_pg_txpwr_def_info =
MAP_ENT(0xB8, 1, 0xFF
, MAPSEG_ARRAY_ENT(0x10, 82,
0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x02, 0x00, 0x00, 0xFF, 0xFF,
0xFF, 0xFF, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33,
0x02, 0x00, 0xFF, 0xFF, 0x00, 0xFF, 0x00, 0x00, 0xFF, 0xFF, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33, 0x33, 0x02, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x02, 0x00, 0xFF, 0xFF, 0x00, 0xFF,
0x00, 0x00)
);
#endif
#ifdef CONFIG_RTL8814A
static const struct map_t rtl8814a_pg_txpwr_def_info =
MAP_ENT(0xB8, 1, 0xFF
, MAPSEG_ARRAY_ENT(0x10, 168,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02, 0xEE, 0xEE, 0xEE, 0xEE,
0xEE, 0xEE, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A,
0x02, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0x00, 0xEE, 0xEE, 0xEE, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0x2A, 0x2A, 0x2A, 0x2A,
0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x02, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE,
0x00, 0xEE, 0xEE, 0xEE, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02,
0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A,
0x2A, 0x2A, 0x2A, 0x2A, 0x02, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0x00, 0xEE, 0xEE, 0xEE, 0x2D, 0x2D,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE,
0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x02, 0xEE,
0xEE, 0xEE, 0xEE, 0xEE, 0x00, 0xEE, 0xEE, 0xEE)
);
#endif
#ifdef CONFIG_RTL8192F/*use 8192F default,no document*/
static const struct map_t rtl8192f_pg_txpwr_def_info =
MAP_ENT(0xB8, 2, 0xFF
, MAPSEG_ARRAY_ENT(0x10, 14,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x24, 0xEE, 0xEE)
, MAPSEG_ARRAY_ENT(0x3A, 14,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x24, 0xEE, 0xEE)
);
#endif
#ifdef CONFIG_RTL8814B
static const struct map_t rtl8814b_pg_txpwr_def_info =
MAP_ENT(0xB8, 1, 0xFF
, MAPSEG_ARRAY_ENT(0x10, 168,
0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x02, 0xFF, 0xFF, 0xFF, 0xFF,
0xFF, 0xFF, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28,
0x02, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xEC, 0xFF, 0xFF, 0xFF, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28,
0x28, 0x28, 0x28, 0x28, 0x28, 0x02, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF)
);
#endif
const struct map_t *hal_pg_txpwr_def_info(_adapter *adapter)
{
u8 interface_type = 0;
const struct map_t *map = NULL;
interface_type = rtw_get_intf_type(adapter);
switch (rtw_get_chip_type(adapter)) {
#ifdef CONFIG_RTL8723B
case RTL8723B:
map = &rtl8723b_pg_txpwr_def_info;
break;
#endif
#ifdef CONFIG_RTL8703B
case RTL8703B:
map = &rtl8703b_pg_txpwr_def_info;
break;
#endif
#ifdef CONFIG_RTL8723D
case RTL8723D:
map = &rtl8723d_pg_txpwr_def_info;
break;
#endif
#ifdef CONFIG_RTL8188E
case RTL8188E:
map = &rtl8188e_pg_txpwr_def_info;
break;
#endif
#ifdef CONFIG_RTL8188F
case RTL8188F:
map = &rtl8188f_pg_txpwr_def_info;
break;
#endif
#ifdef CONFIG_RTL8188GTV
case RTL8188GTV:
map = &rtl8188gtv_pg_txpwr_def_info;
break;
#endif
#ifdef CONFIG_RTL8812A
case RTL8812:
map = &rtl8812a_pg_txpwr_def_info;
break;
#endif
#ifdef CONFIG_RTL8821A
case RTL8821:
map = &rtl8821a_pg_txpwr_def_info;
break;
#endif
#ifdef CONFIG_RTL8192E
case RTL8192E:
map = &rtl8192e_pg_txpwr_def_info;
break;
#endif
#ifdef CONFIG_RTL8814A
case RTL8814A:
map = &rtl8814a_pg_txpwr_def_info;
break;
#endif
#ifdef CONFIG_RTL8822B
case RTL8822B:
map = &rtl8822b_pg_txpwr_def_info;
break;
#endif
#ifdef CONFIG_RTL8821C
case RTL8821C:
map = &rtl8821c_pg_txpwr_def_info;
break;
#endif
#ifdef CONFIG_RTL8710B
case RTL8710B:
map = &rtl8710b_pg_txpwr_def_info;
break;
#endif
#ifdef CONFIG_RTL8192F
case RTL8192F:
map = &rtl8192f_pg_txpwr_def_info;
break;
#endif
#ifdef CONFIG_RTL8822C
case RTL8822C:
map = &rtl8822c_pg_txpwr_def_info;
break;
#endif
#ifdef CONFIG_RTL8814B
case RTL8814B:
map = &rtl8814b_pg_txpwr_def_info;
break;
#endif
#ifdef CONFIG_RTL8723F
case RTL8723F:
map = &rtl8723f_pg_txpwr_def_info;
break;
#endif
}
if (map == NULL) {
RTW_ERR("%s: unknown chip_type:%u\n"
, __func__, rtw_get_chip_type(adapter));
rtw_warn_on(1);
}
return map;
}
static u8 hal_chk_pg_txpwr_info_2g(_adapter *adapter, TxPowerInfo24G *pwr_info)
{
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
u8 path, group, tx_idx;
if (pwr_info == NULL || !hal_chk_band_cap(adapter, BAND_CAP_2G))
return _SUCCESS;
for (path = 0; path < MAX_RF_PATH; path++) {
if (!HAL_SPEC_CHK_RF_PATH_2G(hal_spec, path))
continue;
for (group = 0; group < MAX_CHNL_GROUP_24G; group++) {
if (IS_PG_TXPWR_BASE_INVALID(hal_spec, pwr_info->IndexCCK_Base[path][group])
|| IS_PG_TXPWR_BASE_INVALID(hal_spec, pwr_info->IndexBW40_Base[path][group]))
return _FAIL;
}
for (tx_idx = 0; tx_idx < MAX_TX_COUNT; tx_idx++) {
if (tx_idx + 1 > hal_data->max_tx_cnt)
continue;
if (IS_PG_TXPWR_DIFF_INVALID(pwr_info->CCK_Diff[path][tx_idx])
|| IS_PG_TXPWR_DIFF_INVALID(pwr_info->OFDM_Diff[path][tx_idx])
|| IS_PG_TXPWR_DIFF_INVALID(pwr_info->BW20_Diff[path][tx_idx])
|| IS_PG_TXPWR_DIFF_INVALID(pwr_info->BW40_Diff[path][tx_idx]))
return _FAIL;
}
}
return _SUCCESS;
}
static u8 hal_chk_pg_txpwr_info_5g(_adapter *adapter, TxPowerInfo5G *pwr_info)
{
#if CONFIG_IEEE80211_BAND_5GHZ
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
u8 path, group, tx_idx;
if (pwr_info == NULL || !hal_chk_band_cap(adapter, BAND_CAP_5G))
return _SUCCESS;
for (path = 0; path < MAX_RF_PATH; path++) {
if (!HAL_SPEC_CHK_RF_PATH_5G(hal_spec, path))
continue;
for (group = 0; group < MAX_CHNL_GROUP_5G; group++)
if (IS_PG_TXPWR_BASE_INVALID(hal_spec, pwr_info->IndexBW40_Base[path][group]))
return _FAIL;
for (tx_idx = 0; tx_idx < MAX_TX_COUNT; tx_idx++) {
if (tx_idx + 1 > hal_data->max_tx_cnt)
continue;
if (IS_PG_TXPWR_DIFF_INVALID(pwr_info->OFDM_Diff[path][tx_idx])
|| IS_PG_TXPWR_DIFF_INVALID(pwr_info->BW20_Diff[path][tx_idx])
|| IS_PG_TXPWR_DIFF_INVALID(pwr_info->BW40_Diff[path][tx_idx])
|| IS_PG_TXPWR_DIFF_INVALID(pwr_info->BW80_Diff[path][tx_idx])
|| IS_PG_TXPWR_DIFF_INVALID(pwr_info->BW160_Diff[path][tx_idx]))
return _FAIL;
}
}
#endif /* CONFIG_IEEE80211_BAND_5GHZ */
return _SUCCESS;
}
static inline void hal_init_pg_txpwr_info_2g(_adapter *adapter, TxPowerInfo24G *pwr_info)
{
struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
u8 path, group, tx_idx;
if (pwr_info == NULL)
return;
_rtw_memset(pwr_info, 0, sizeof(TxPowerInfo24G));
/* init with invalid value */
for (path = 0; path < MAX_RF_PATH; path++) {
for (group = 0; group < MAX_CHNL_GROUP_24G; group++) {
pwr_info->IndexCCK_Base[path][group] = PG_TXPWR_INVALID_BASE;
pwr_info->IndexBW40_Base[path][group] = PG_TXPWR_INVALID_BASE;
}
for (tx_idx = 0; tx_idx < MAX_TX_COUNT; tx_idx++) {
pwr_info->CCK_Diff[path][tx_idx] = PG_TXPWR_INVALID_DIFF;
pwr_info->OFDM_Diff[path][tx_idx] = PG_TXPWR_INVALID_DIFF;
pwr_info->BW20_Diff[path][tx_idx] = PG_TXPWR_INVALID_DIFF;
pwr_info->BW40_Diff[path][tx_idx] = PG_TXPWR_INVALID_DIFF;
}
}
/* init for dummy base and diff */
for (path = 0; path < MAX_RF_PATH; path++) {
if (!HAL_SPEC_CHK_RF_PATH_2G(hal_spec, path))
break;
/* 2.4G BW40 base has 1 less group than CCK base*/
pwr_info->IndexBW40_Base[path][MAX_CHNL_GROUP_24G - 1] = 0;
/* dummy diff */
pwr_info->CCK_Diff[path][0] = 0; /* 2.4G CCK-1TX */
pwr_info->BW40_Diff[path][0] = 0; /* 2.4G BW40-1S */
}
}
static inline void hal_init_pg_txpwr_info_5g(_adapter *adapter, TxPowerInfo5G *pwr_info)
{
#if CONFIG_IEEE80211_BAND_5GHZ
struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
u8 path, group, tx_idx;
if (pwr_info == NULL)
return;
_rtw_memset(pwr_info, 0, sizeof(TxPowerInfo5G));
/* init with invalid value */
for (path = 0; path < MAX_RF_PATH; path++) {
for (group = 0; group < MAX_CHNL_GROUP_5G; group++)
pwr_info->IndexBW40_Base[path][group] = PG_TXPWR_INVALID_BASE;
for (tx_idx = 0; tx_idx < MAX_TX_COUNT; tx_idx++) {
pwr_info->OFDM_Diff[path][tx_idx] = PG_TXPWR_INVALID_DIFF;
pwr_info->BW20_Diff[path][tx_idx] = PG_TXPWR_INVALID_DIFF;
pwr_info->BW40_Diff[path][tx_idx] = PG_TXPWR_INVALID_DIFF;
pwr_info->BW80_Diff[path][tx_idx] = PG_TXPWR_INVALID_DIFF;
pwr_info->BW160_Diff[path][tx_idx] = PG_TXPWR_INVALID_DIFF;
}
}
for (path = 0; path < MAX_RF_PATH; path++) {
if (!HAL_SPEC_CHK_RF_PATH_5G(hal_spec, path))
break;
/* dummy diff */
pwr_info->BW40_Diff[path][0] = 0; /* 5G BW40-1S */
}
#endif /* CONFIG_IEEE80211_BAND_5GHZ */
}
#if DBG_PG_TXPWR_READ
#define LOAD_PG_TXPWR_WARN_COND(_txpwr_src) 1
#else
#define LOAD_PG_TXPWR_WARN_COND(_txpwr_src) (_txpwr_src > PG_TXPWR_SRC_PG_DATA)
#endif
u16 hal_load_pg_txpwr_info_path_2g(
_adapter *adapter,
TxPowerInfo24G *pwr_info,
u32 path,
u8 txpwr_src,
const struct map_t *txpwr_map,
u16 pg_offset)
{
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
u16 offset = pg_offset;
u8 group, tx_idx;
u8 val;
u8 tmp_base;
s8 tmp_diff;
if (pwr_info == NULL || !hal_chk_band_cap(adapter, BAND_CAP_2G)) {
offset += PG_TXPWR_1PATH_BYTE_NUM_2G;
goto exit;
}
if (DBG_PG_TXPWR_READ)
RTW_INFO("%s [%c] offset:0x%03x\n", __func__, rf_path_char(path), offset);
for (group = 0; group < MAX_CHNL_GROUP_24G; group++) {
if (HAL_SPEC_CHK_RF_PATH_2G(hal_spec, path)) {
tmp_base = map_read8(txpwr_map, offset);
if (!IS_PG_TXPWR_BASE_INVALID(hal_spec, tmp_base)
&& IS_PG_TXPWR_BASE_INVALID(hal_spec, pwr_info->IndexCCK_Base[path][group])
) {
pwr_info->IndexCCK_Base[path][group] = tmp_base;
if (LOAD_PG_TXPWR_WARN_COND(txpwr_src))
RTW_INFO("[%c] 2G G%02d CCK-1T base:%u from %s\n", rf_path_char(path), group, tmp_base, pg_txpwr_src_str(txpwr_src));
}
}
offset++;
}
for (group = 0; group < MAX_CHNL_GROUP_24G - 1; group++) {
if (HAL_SPEC_CHK_RF_PATH_2G(hal_spec, path)) {
tmp_base = map_read8(txpwr_map, offset);
if (!IS_PG_TXPWR_BASE_INVALID(hal_spec, tmp_base)
&& IS_PG_TXPWR_BASE_INVALID(hal_spec, pwr_info->IndexBW40_Base[path][group])
) {
pwr_info->IndexBW40_Base[path][group] = tmp_base;
if (LOAD_PG_TXPWR_WARN_COND(txpwr_src))
RTW_INFO("[%c] 2G G%02d BW40-1S base:%u from %s\n", rf_path_char(path), group, tmp_base, pg_txpwr_src_str(txpwr_src));
}
}
offset++;
}
for (tx_idx = 0; tx_idx < MAX_TX_COUNT; tx_idx++) {
if (tx_idx == 0) {
if (HAL_SPEC_CHK_RF_PATH_2G(hal_spec, path)) {
val = map_read8(txpwr_map, offset);
tmp_diff = PG_TXPWR_MSB_DIFF_TO_S8BIT(val);
if (!IS_PG_TXPWR_DIFF_INVALID(tmp_diff)
&& IS_PG_TXPWR_DIFF_INVALID(pwr_info->BW20_Diff[path][tx_idx])
) {
pwr_info->BW20_Diff[path][tx_idx] = tmp_diff;
if (LOAD_PG_TXPWR_WARN_COND(txpwr_src))
RTW_INFO("[%c] 2G BW20-%dS diff:%d from %s\n", rf_path_char(path), tx_idx + 1, tmp_diff, pg_txpwr_src_str(txpwr_src));
}
tmp_diff = PG_TXPWR_LSB_DIFF_TO_S8BIT(val);
if (!IS_PG_TXPWR_DIFF_INVALID(tmp_diff)
&& IS_PG_TXPWR_DIFF_INVALID(pwr_info->OFDM_Diff[path][tx_idx])
) {
pwr_info->OFDM_Diff[path][tx_idx] = tmp_diff;
if (LOAD_PG_TXPWR_WARN_COND(txpwr_src))
RTW_INFO("[%c] 2G OFDM-%dT diff:%d from %s\n", rf_path_char(path), tx_idx + 1, tmp_diff, pg_txpwr_src_str(txpwr_src));
}
}
offset++;
} else {
if (HAL_SPEC_CHK_RF_PATH_2G(hal_spec, path) && tx_idx + 1 <= hal_data->max_tx_cnt) {
val = map_read8(txpwr_map, offset);
tmp_diff = PG_TXPWR_MSB_DIFF_TO_S8BIT(val);
if (!IS_PG_TXPWR_DIFF_INVALID(tmp_diff)
&& IS_PG_TXPWR_DIFF_INVALID(pwr_info->BW40_Diff[path][tx_idx])
) {
pwr_info->BW40_Diff[path][tx_idx] = tmp_diff;
if (LOAD_PG_TXPWR_WARN_COND(txpwr_src))
RTW_INFO("[%c] 2G BW40-%dS diff:%d from %s\n", rf_path_char(path), tx_idx + 1, tmp_diff, pg_txpwr_src_str(txpwr_src));
}
tmp_diff = PG_TXPWR_LSB_DIFF_TO_S8BIT(val);
if (!IS_PG_TXPWR_DIFF_INVALID(tmp_diff)
&& IS_PG_TXPWR_DIFF_INVALID(pwr_info->BW20_Diff[path][tx_idx])
) {
pwr_info->BW20_Diff[path][tx_idx] = tmp_diff;
if (LOAD_PG_TXPWR_WARN_COND(txpwr_src))
RTW_INFO("[%c] 2G BW20-%dS diff:%d from %s\n", rf_path_char(path), tx_idx + 1, tmp_diff, pg_txpwr_src_str(txpwr_src));
}
}
offset++;
if (HAL_SPEC_CHK_RF_PATH_2G(hal_spec, path) && tx_idx + 1 <= hal_data->max_tx_cnt) {
val = map_read8(txpwr_map, offset);
tmp_diff = PG_TXPWR_MSB_DIFF_TO_S8BIT(val);
if (!IS_PG_TXPWR_DIFF_INVALID(tmp_diff)
&& IS_PG_TXPWR_DIFF_INVALID(pwr_info->OFDM_Diff[path][tx_idx])
) {
pwr_info->OFDM_Diff[path][tx_idx] = tmp_diff;
if (LOAD_PG_TXPWR_WARN_COND(txpwr_src))
RTW_INFO("[%c] 2G OFDM-%dT diff:%d from %s\n", rf_path_char(path), tx_idx + 1, tmp_diff, pg_txpwr_src_str(txpwr_src));
}
tmp_diff = PG_TXPWR_LSB_DIFF_TO_S8BIT(val);
if (!IS_PG_TXPWR_DIFF_INVALID(tmp_diff)
&& IS_PG_TXPWR_DIFF_INVALID(pwr_info->CCK_Diff[path][tx_idx])
) {
pwr_info->CCK_Diff[path][tx_idx] = tmp_diff;
if (LOAD_PG_TXPWR_WARN_COND(txpwr_src))
RTW_INFO("[%c] 2G CCK-%dT diff:%d from %s\n", rf_path_char(path), tx_idx + 1, tmp_diff, pg_txpwr_src_str(txpwr_src));
}
}
offset++;
}
}
if (offset != pg_offset + PG_TXPWR_1PATH_BYTE_NUM_2G) {
RTW_ERR("%s parse %d bytes != %d\n", __func__, offset - pg_offset, PG_TXPWR_1PATH_BYTE_NUM_2G);
rtw_warn_on(1);
}
exit:
return offset;
}
u16 hal_load_pg_txpwr_info_path_5g(
_adapter *adapter,
TxPowerInfo5G *pwr_info,
u32 path,
u8 txpwr_src,
const struct map_t *txpwr_map,
u16 pg_offset)
{
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
u16 offset = pg_offset;
u8 group, tx_idx;
u8 val;
u8 tmp_base;
s8 tmp_diff;
#if CONFIG_IEEE80211_BAND_5GHZ
if (pwr_info == NULL || !hal_chk_band_cap(adapter, BAND_CAP_5G))
#endif
{
offset += PG_TXPWR_1PATH_BYTE_NUM_5G;
goto exit;
}
#if CONFIG_IEEE80211_BAND_5GHZ
if (DBG_PG_TXPWR_READ)
RTW_INFO("%s[%c] eaddr:0x%03x\n", __func__, rf_path_char(path), offset);
for (group = 0; group < MAX_CHNL_GROUP_5G; group++) {
if (HAL_SPEC_CHK_RF_PATH_5G(hal_spec, path)) {
tmp_base = map_read8(txpwr_map, offset);
if (!IS_PG_TXPWR_BASE_INVALID(hal_spec, tmp_base)
&& IS_PG_TXPWR_BASE_INVALID(hal_spec, pwr_info->IndexBW40_Base[path][group])
) {
pwr_info->IndexBW40_Base[path][group] = tmp_base;
if (LOAD_PG_TXPWR_WARN_COND(txpwr_src))
RTW_INFO("[%c] 5G G%02d BW40-1S base:%u from %s\n", rf_path_char(path), group, tmp_base, pg_txpwr_src_str(txpwr_src));
}
}
offset++;
}
for (tx_idx = 0; tx_idx < MAX_TX_COUNT; tx_idx++) {
if (tx_idx == 0) {
if (HAL_SPEC_CHK_RF_PATH_5G(hal_spec, path)) {
val = map_read8(txpwr_map, offset);
tmp_diff = PG_TXPWR_MSB_DIFF_TO_S8BIT(val);
if (!IS_PG_TXPWR_DIFF_INVALID(tmp_diff)
&& IS_PG_TXPWR_DIFF_INVALID(pwr_info->BW20_Diff[path][tx_idx])
) {
pwr_info->BW20_Diff[path][tx_idx] = tmp_diff;
if (LOAD_PG_TXPWR_WARN_COND(txpwr_src))
RTW_INFO("[%c] 5G BW20-%dS diff:%d from %s\n", rf_path_char(path), tx_idx + 1, tmp_diff, pg_txpwr_src_str(txpwr_src));
}
tmp_diff = PG_TXPWR_LSB_DIFF_TO_S8BIT(val);
if (!IS_PG_TXPWR_DIFF_INVALID(tmp_diff)
&& IS_PG_TXPWR_DIFF_INVALID(pwr_info->OFDM_Diff[path][tx_idx])
) {
pwr_info->OFDM_Diff[path][tx_idx] = tmp_diff;
if (LOAD_PG_TXPWR_WARN_COND(txpwr_src))
RTW_INFO("[%c] 5G OFDM-%dT diff:%d from %s\n", rf_path_char(path), tx_idx + 1, tmp_diff, pg_txpwr_src_str(txpwr_src));
}
}
offset++;
} else {
if (HAL_SPEC_CHK_RF_PATH_5G(hal_spec, path) && tx_idx + 1 <= hal_data->max_tx_cnt) {
val = map_read8(txpwr_map, offset);
tmp_diff = PG_TXPWR_MSB_DIFF_TO_S8BIT(val);
if (!IS_PG_TXPWR_DIFF_INVALID(tmp_diff)
&& IS_PG_TXPWR_DIFF_INVALID(pwr_info->BW40_Diff[path][tx_idx])
) {
pwr_info->BW40_Diff[path][tx_idx] = tmp_diff;
if (LOAD_PG_TXPWR_WARN_COND(txpwr_src))
RTW_INFO("[%c] 5G BW40-%dS diff:%d from %s\n", rf_path_char(path), tx_idx + 1, tmp_diff, pg_txpwr_src_str(txpwr_src));
}
tmp_diff = PG_TXPWR_LSB_DIFF_TO_S8BIT(val);
if (!IS_PG_TXPWR_DIFF_INVALID(tmp_diff)
&& IS_PG_TXPWR_DIFF_INVALID(pwr_info->BW20_Diff[path][tx_idx])
) {
pwr_info->BW20_Diff[path][tx_idx] = tmp_diff;
if (LOAD_PG_TXPWR_WARN_COND(txpwr_src))
RTW_INFO("[%c] 5G BW20-%dS diff:%d from %s\n", rf_path_char(path), tx_idx + 1, tmp_diff, pg_txpwr_src_str(txpwr_src));
}
}
offset++;
}
}
/* OFDM diff 2T ~ 3T */
if (HAL_SPEC_CHK_RF_PATH_5G(hal_spec, path) && hal_data->max_tx_cnt > 1) {
val = map_read8(txpwr_map, offset);
tmp_diff = PG_TXPWR_MSB_DIFF_TO_S8BIT(val);
if (!IS_PG_TXPWR_DIFF_INVALID(tmp_diff)
&& IS_PG_TXPWR_DIFF_INVALID(pwr_info->OFDM_Diff[path][1])
) {
pwr_info->OFDM_Diff[path][1] = tmp_diff;
if (LOAD_PG_TXPWR_WARN_COND(txpwr_src))
RTW_INFO("[%c] 5G OFDM-%dT diff:%d from %s\n", rf_path_char(path), 2, tmp_diff, pg_txpwr_src_str(txpwr_src));
}
if (hal_data->max_tx_cnt > 2) {
tmp_diff = PG_TXPWR_LSB_DIFF_TO_S8BIT(val);
if (!IS_PG_TXPWR_DIFF_INVALID(tmp_diff)
&& IS_PG_TXPWR_DIFF_INVALID(pwr_info->OFDM_Diff[path][2])
) {
pwr_info->OFDM_Diff[path][2] = tmp_diff;
if (LOAD_PG_TXPWR_WARN_COND(txpwr_src))
RTW_INFO("[%c] 5G OFDM-%dT diff:%d from %s\n", rf_path_char(path), 3, tmp_diff, pg_txpwr_src_str(txpwr_src));
}
}
}
offset++;
/* OFDM diff 4T */
if (HAL_SPEC_CHK_RF_PATH_5G(hal_spec, path) && hal_data->max_tx_cnt > 3) {
val = map_read8(txpwr_map, offset);
tmp_diff = PG_TXPWR_LSB_DIFF_TO_S8BIT(val);
if (!IS_PG_TXPWR_DIFF_INVALID(tmp_diff)
&& IS_PG_TXPWR_DIFF_INVALID(pwr_info->OFDM_Diff[path][3])
) {
pwr_info->OFDM_Diff[path][3] = tmp_diff;
if (LOAD_PG_TXPWR_WARN_COND(txpwr_src))
RTW_INFO("[%c] 5G OFDM-%dT diff:%d from %s\n", rf_path_char(path), 4, tmp_diff, pg_txpwr_src_str(txpwr_src));
}
}
offset++;
for (tx_idx = 0; tx_idx < MAX_TX_COUNT; tx_idx++) {
if (HAL_SPEC_CHK_RF_PATH_5G(hal_spec, path) && tx_idx + 1 <= hal_data->max_tx_cnt) {
val = map_read8(txpwr_map, offset);
tmp_diff = PG_TXPWR_MSB_DIFF_TO_S8BIT(val);
if (!IS_PG_TXPWR_DIFF_INVALID(tmp_diff)
&& IS_PG_TXPWR_DIFF_INVALID(pwr_info->BW80_Diff[path][tx_idx])
) {
pwr_info->BW80_Diff[path][tx_idx] = tmp_diff;
if (LOAD_PG_TXPWR_WARN_COND(txpwr_src))
RTW_INFO("[%c] 5G BW80-%dS diff:%d from %s\n", rf_path_char(path), tx_idx + 1, tmp_diff, pg_txpwr_src_str(txpwr_src));
}
tmp_diff = PG_TXPWR_LSB_DIFF_TO_S8BIT(val);
if (!IS_PG_TXPWR_DIFF_INVALID(tmp_diff)
&& IS_PG_TXPWR_DIFF_INVALID(pwr_info->BW160_Diff[path][tx_idx])
) {
pwr_info->BW160_Diff[path][tx_idx] = tmp_diff;
if (LOAD_PG_TXPWR_WARN_COND(txpwr_src))
RTW_INFO("[%c] 5G BW160-%dS diff:%d from %s\n", rf_path_char(path), tx_idx + 1, tmp_diff, pg_txpwr_src_str(txpwr_src));
}
}
offset++;
}
if (offset != pg_offset + PG_TXPWR_1PATH_BYTE_NUM_5G) {
RTW_ERR("%s parse %d bytes != %d\n", __func__, offset - pg_offset, PG_TXPWR_1PATH_BYTE_NUM_5G);
rtw_warn_on(1);
}
#endif /* CONFIG_IEEE80211_BAND_5GHZ */
exit:
return offset;
}
void hal_load_pg_txpwr_info(
_adapter *adapter,
TxPowerInfo24G *pwr_info_2g,
TxPowerInfo5G *pwr_info_5g,
u8 *pg_data,
BOOLEAN AutoLoadFail
)
{
struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
u8 path;
u16 pg_offset;
u8 txpwr_src = PG_TXPWR_SRC_PG_DATA;
struct map_t pg_data_map = MAP_ENT(184, 1, 0xFF, MAPSEG_PTR_ENT(0x00, 184, pg_data));
const struct map_t *txpwr_map = NULL;
/* init with invalid value and some dummy base and diff */
hal_init_pg_txpwr_info_2g(adapter, pwr_info_2g);
hal_init_pg_txpwr_info_5g(adapter, pwr_info_5g);
select_src:
pg_offset = hal_spec->pg_txpwr_saddr;
switch (txpwr_src) {
case PG_TXPWR_SRC_PG_DATA:
txpwr_map = &pg_data_map;
break;
case PG_TXPWR_SRC_IC_DEF:
txpwr_map = hal_pg_txpwr_def_info(adapter);
break;
case PG_TXPWR_SRC_DEF:
default:
txpwr_map = &pg_txpwr_def_info;
break;
};
if (txpwr_map == NULL)
goto end_parse;
for (path = 0; path < MAX_RF_PATH ; path++) {
if (!HAL_SPEC_CHK_RF_PATH_2G(hal_spec, path) && !HAL_SPEC_CHK_RF_PATH_5G(hal_spec, path))
break;
pg_offset = hal_load_pg_txpwr_info_path_2g(adapter, pwr_info_2g, path, txpwr_src, txpwr_map, pg_offset);
pg_offset = hal_load_pg_txpwr_info_path_5g(adapter, pwr_info_5g, path, txpwr_src, txpwr_map, pg_offset);
}
if (hal_chk_pg_txpwr_info_2g(adapter, pwr_info_2g) == _SUCCESS
&& hal_chk_pg_txpwr_info_5g(adapter, pwr_info_5g) == _SUCCESS)
goto exit;
end_parse:
txpwr_src++;
if (txpwr_src < PG_TXPWR_SRC_NUM)
goto select_src;
if (hal_chk_pg_txpwr_info_2g(adapter, pwr_info_2g) != _SUCCESS
|| hal_chk_pg_txpwr_info_5g(adapter, pwr_info_5g) != _SUCCESS)
rtw_warn_on(1);
exit:
#if DBG_PG_TXPWR_READ
if (pwr_info_2g)
dump_pg_txpwr_info_2g(RTW_DBGDUMP, pwr_info_2g, 4, 4);
if (pwr_info_5g)
dump_pg_txpwr_info_5g(RTW_DBGDUMP, pwr_info_5g, 4, 4);
#endif
return;
}
#endif /* CONFIG_TXPWR_PG_WITH_PWR_IDX */
#ifdef CONFIG_EFUSE_CONFIG_FILE
#define EFUSE_POWER_INDEX_INVALID 0xFF
static u8 _check_phy_efuse_tx_power_info_valid(u8 *pg_data, int chk_len, u16 pg_offset)
{
int ff_cnt = 0;
int i;
for (i = 0; i < chk_len; i++) {
if (*(pg_data + pg_offset + i) == 0xFF)
ff_cnt++;
}
if (ff_cnt == 0)
return _TRUE;
else if (ff_cnt == chk_len)
return _FALSE;
else
return EFUSE_POWER_INDEX_INVALID;
}
int check_phy_efuse_tx_power_info_valid(_adapter *adapter)
{
struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
u8 *pg_data = hal_data->efuse_eeprom_data;
u16 pg_offset = hal_spec->pg_txpwr_saddr;
u8 path;
u8 valid_2g_path_bmp = 0;
#if CONFIG_IEEE80211_BAND_5GHZ
u8 valid_5g_path_bmp = 0;
#endif
#ifdef CONFIG_MP_INCLUDED
struct mp_priv *pmp_priv = &adapter->mppriv;
if (pmp_priv->efuse_update_file == _TRUE && (rtw_mp_mode_check(adapter))) {
RTW_INFO("%s: To use efuse_update_file !!!\n", __func__);
return _FALSE;
}
#endif
/* NOTE: TSSI offset use the same layout as TXPWR base */
for (path = 0; path < MAX_RF_PATH; path++) {
u8 ret = _FALSE;
if (!HAL_SPEC_CHK_RF_PATH_2G(hal_spec, path) && !HAL_SPEC_CHK_RF_PATH_5G(hal_spec, path))
break;
if (HAL_SPEC_CHK_RF_PATH_2G(hal_spec, path)) {
ret = _check_phy_efuse_tx_power_info_valid(pg_data, PG_TXPWR_BASE_BYTE_NUM_2G, pg_offset);
if (ret == _TRUE)
valid_2g_path_bmp |= BIT(path);
else if (ret == EFUSE_POWER_INDEX_INVALID)
return _FALSE;
}
pg_offset += PG_TXPWR_1PATH_BYTE_NUM_2G;
#if CONFIG_IEEE80211_BAND_5GHZ
if (HAL_SPEC_CHK_RF_PATH_5G(hal_spec, path)) {
ret = _check_phy_efuse_tx_power_info_valid(pg_data, PG_TXPWR_BASE_BYTE_NUM_5G, pg_offset);
if (ret == _TRUE)
valid_5g_path_bmp |= BIT(path);
else if (ret == EFUSE_POWER_INDEX_INVALID)
return _FALSE;
}
#endif
pg_offset += PG_TXPWR_1PATH_BYTE_NUM_5G;
}
if ((hal_chk_band_cap(adapter, BAND_CAP_2G) && valid_2g_path_bmp)
#if CONFIG_IEEE80211_BAND_5GHZ
|| (hal_chk_band_cap(adapter, BAND_CAP_5G) && valid_5g_path_bmp)
#endif
)
return _TRUE;
return _FALSE;
}
#endif /* CONFIG_EFUSE_CONFIG_FILE */
#ifdef CONFIG_TXPWR_PG_WITH_PWR_IDX
void hal_load_txpwr_info(_adapter *adapter)
{
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
u8 max_tx_cnt = hal_data->max_tx_cnt;
u8 *pg_data = hal_data->efuse_eeprom_data;
TxPowerInfo24G *pwr_info_2g = NULL;
TxPowerInfo5G *pwr_info_5g = NULL;
u8 rfpath, ch_idx, group, tx_idx;
if (hal_chk_band_cap(adapter, BAND_CAP_2G))
pwr_info_2g = rtw_vmalloc(sizeof(TxPowerInfo24G));
#if CONFIG_IEEE80211_BAND_5GHZ
if (hal_chk_band_cap(adapter, BAND_CAP_5G))
pwr_info_5g = rtw_vmalloc(sizeof(TxPowerInfo5G));
#endif
/* load from pg data (or default value) */
hal_load_pg_txpwr_info(adapter, pwr_info_2g, pwr_info_5g, pg_data, _FALSE);
/* transform to hal_data */
for (rfpath = 0; rfpath < MAX_RF_PATH; rfpath++) {
if (!pwr_info_2g || !HAL_SPEC_CHK_RF_PATH_2G(hal_spec, rfpath))
goto bypass_2g;
/* 2.4G base */
for (ch_idx = 0; ch_idx < CENTER_CH_2G_NUM; ch_idx++) {
u8 cck_group;
if (rtw_get_ch_group(ch_idx + 1, &group, &cck_group) != BAND_ON_2_4G)
continue;
hal_data->Index24G_CCK_Base[rfpath][ch_idx] = pwr_info_2g->IndexCCK_Base[rfpath][cck_group];
hal_data->Index24G_BW40_Base[rfpath][ch_idx] = pwr_info_2g->IndexBW40_Base[rfpath][group];
}
/* 2.4G diff */
for (tx_idx = 0; tx_idx < MAX_TX_COUNT; tx_idx++) {
if (tx_idx + 1 > max_tx_cnt)
break;
hal_data->CCK_24G_Diff[rfpath][tx_idx] = pwr_info_2g->CCK_Diff[rfpath][tx_idx] * hal_spec->pg_txgi_diff_factor;
hal_data->OFDM_24G_Diff[rfpath][tx_idx] = pwr_info_2g->OFDM_Diff[rfpath][tx_idx] * hal_spec->pg_txgi_diff_factor;
hal_data->BW20_24G_Diff[rfpath][tx_idx] = pwr_info_2g->BW20_Diff[rfpath][tx_idx] * hal_spec->pg_txgi_diff_factor;
hal_data->BW40_24G_Diff[rfpath][tx_idx] = pwr_info_2g->BW40_Diff[rfpath][tx_idx] * hal_spec->pg_txgi_diff_factor;
}
bypass_2g:
;
#if CONFIG_IEEE80211_BAND_5GHZ
if (!pwr_info_5g || !HAL_SPEC_CHK_RF_PATH_5G(hal_spec, rfpath))
goto bypass_5g;
/* 5G base */
for (ch_idx = 0; ch_idx < CENTER_CH_5G_ALL_NUM; ch_idx++) {
if (rtw_get_ch_group(center_ch_5g_all[ch_idx], &group, NULL) != BAND_ON_5G)
continue;
hal_data->Index5G_BW40_Base[rfpath][ch_idx] = pwr_info_5g->IndexBW40_Base[rfpath][group];
}
for (ch_idx = 0 ; ch_idx < CENTER_CH_5G_80M_NUM; ch_idx++) {
u8 upper, lower;
if (rtw_get_ch_group(center_ch_5g_80m[ch_idx], &group, NULL) != BAND_ON_5G)
continue;
upper = pwr_info_5g->IndexBW40_Base[rfpath][group];
lower = pwr_info_5g->IndexBW40_Base[rfpath][group + 1];
hal_data->Index5G_BW80_Base[rfpath][ch_idx] = (upper + lower) / 2;
}
/* 5G diff */
for (tx_idx = 0; tx_idx < MAX_TX_COUNT; tx_idx++) {
if (tx_idx + 1 > max_tx_cnt)
break;
hal_data->OFDM_5G_Diff[rfpath][tx_idx] = pwr_info_5g->OFDM_Diff[rfpath][tx_idx] * hal_spec->pg_txgi_diff_factor;
hal_data->BW20_5G_Diff[rfpath][tx_idx] = pwr_info_5g->BW20_Diff[rfpath][tx_idx] * hal_spec->pg_txgi_diff_factor;
hal_data->BW40_5G_Diff[rfpath][tx_idx] = pwr_info_5g->BW40_Diff[rfpath][tx_idx] * hal_spec->pg_txgi_diff_factor;
hal_data->BW80_5G_Diff[rfpath][tx_idx] = pwr_info_5g->BW80_Diff[rfpath][tx_idx] * hal_spec->pg_txgi_diff_factor;
}
bypass_5g:
;
#endif /* CONFIG_IEEE80211_BAND_5GHZ */
}
if (pwr_info_2g)
rtw_vmfree(pwr_info_2g, sizeof(TxPowerInfo24G));
if (pwr_info_5g)
rtw_vmfree(pwr_info_5g, sizeof(TxPowerInfo5G));
}
void dump_hal_txpwr_info_2g(void *sel, _adapter *adapter, u8 rfpath_num, u8 max_tx_cnt)
{
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
int path, ch_idx, tx_idx;
RTW_PRINT_SEL(sel, "2.4G\n");
RTW_PRINT_SEL(sel, "CCK-1T base:\n");
RTW_PRINT_SEL(sel, "%4s ", "");
for (ch_idx = 0; ch_idx < CENTER_CH_2G_NUM; ch_idx++)
_RTW_PRINT_SEL(sel, "%3d ", center_ch_2g[ch_idx]);
_RTW_PRINT_SEL(sel, "\n");
for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) {
RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path));
for (ch_idx = 0; ch_idx < CENTER_CH_2G_NUM; ch_idx++)
_RTW_PRINT_SEL(sel, "%3u ", hal_data->Index24G_CCK_Base[path][ch_idx]);
_RTW_PRINT_SEL(sel, "\n");
}
RTW_PRINT_SEL(sel, "\n");
RTW_PRINT_SEL(sel, "CCK diff:\n");
RTW_PRINT_SEL(sel, "%4s ", "");
for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++)
_RTW_PRINT_SEL(sel, "%dT ", tx_idx + 1);
_RTW_PRINT_SEL(sel, "\n");
for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) {
RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path));
for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++)
_RTW_PRINT_SEL(sel, "%2d ", hal_data->CCK_24G_Diff[path][tx_idx]);
_RTW_PRINT_SEL(sel, "\n");
}
RTW_PRINT_SEL(sel, "\n");
RTW_PRINT_SEL(sel, "BW40-1S base:\n");
RTW_PRINT_SEL(sel, "%4s ", "");
for (ch_idx = 0; ch_idx < CENTER_CH_2G_NUM; ch_idx++)
_RTW_PRINT_SEL(sel, "%3d ", center_ch_2g[ch_idx]);
_RTW_PRINT_SEL(sel, "\n");
for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) {
RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path));
for (ch_idx = 0; ch_idx < CENTER_CH_2G_NUM; ch_idx++)
_RTW_PRINT_SEL(sel, "%3u ", hal_data->Index24G_BW40_Base[path][ch_idx]);
_RTW_PRINT_SEL(sel, "\n");
}
RTW_PRINT_SEL(sel, "\n");
RTW_PRINT_SEL(sel, "OFDM diff:\n");
RTW_PRINT_SEL(sel, "%4s ", "");
for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++)
_RTW_PRINT_SEL(sel, "%dT ", tx_idx + 1);
_RTW_PRINT_SEL(sel, "\n");
for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) {
RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path));
for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++)
_RTW_PRINT_SEL(sel, "%2d ", hal_data->OFDM_24G_Diff[path][tx_idx]);
_RTW_PRINT_SEL(sel, "\n");
}
RTW_PRINT_SEL(sel, "\n");
RTW_PRINT_SEL(sel, "BW20 diff:\n");
RTW_PRINT_SEL(sel, "%4s ", "");
for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++)
_RTW_PRINT_SEL(sel, "%dS ", tx_idx + 1);
_RTW_PRINT_SEL(sel, "\n");
for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) {
RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path));
for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++)
_RTW_PRINT_SEL(sel, "%2d ", hal_data->BW20_24G_Diff[path][tx_idx]);
_RTW_PRINT_SEL(sel, "\n");
}
RTW_PRINT_SEL(sel, "\n");
RTW_PRINT_SEL(sel, "BW40 diff:\n");
RTW_PRINT_SEL(sel, "%4s ", "");
for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++)
_RTW_PRINT_SEL(sel, "%dS ", tx_idx + 1);
_RTW_PRINT_SEL(sel, "\n");
for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) {
RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path));
for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++)
_RTW_PRINT_SEL(sel, "%2d ", hal_data->BW40_24G_Diff[path][tx_idx]);
_RTW_PRINT_SEL(sel, "\n");
}
RTW_PRINT_SEL(sel, "\n");
}
void dump_hal_txpwr_info_5g(void *sel, _adapter *adapter, u8 rfpath_num, u8 max_tx_cnt)
{
#if CONFIG_IEEE80211_BAND_5GHZ
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
int path, ch_idx, tx_idx;
u8 dump_section = 0;
u8 ch_idx_s = 0;
RTW_PRINT_SEL(sel, "5G\n");
RTW_PRINT_SEL(sel, "BW40-1S base:\n");
do {
#define DUMP_5G_BW40_BASE_SECTION_NUM 3
u8 end[DUMP_5G_BW40_BASE_SECTION_NUM] = {64, 144, 177};
RTW_PRINT_SEL(sel, "%4s ", "");
for (ch_idx = ch_idx_s; ch_idx < CENTER_CH_5G_ALL_NUM; ch_idx++) {
_RTW_PRINT_SEL(sel, "%3d ", center_ch_5g_all[ch_idx]);
if (end[dump_section] == center_ch_5g_all[ch_idx])
break;
}
_RTW_PRINT_SEL(sel, "\n");
for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) {
RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path));
for (ch_idx = ch_idx_s; ch_idx < CENTER_CH_5G_ALL_NUM; ch_idx++) {
_RTW_PRINT_SEL(sel, "%3u ", hal_data->Index5G_BW40_Base[path][ch_idx]);
if (end[dump_section] == center_ch_5g_all[ch_idx])
break;
}
_RTW_PRINT_SEL(sel, "\n");
}
RTW_PRINT_SEL(sel, "\n");
ch_idx_s = ch_idx + 1;
dump_section++;
if (dump_section >= DUMP_5G_BW40_BASE_SECTION_NUM)
break;
} while (1);
RTW_PRINT_SEL(sel, "BW80-1S base:\n");
RTW_PRINT_SEL(sel, "%4s ", "");
for (ch_idx = 0; ch_idx < CENTER_CH_5G_80M_NUM; ch_idx++)
_RTW_PRINT_SEL(sel, "%3d ", center_ch_5g_80m[ch_idx]);
_RTW_PRINT_SEL(sel, "\n");
for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) {
RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path));
for (ch_idx = 0; ch_idx < CENTER_CH_5G_80M_NUM; ch_idx++)
_RTW_PRINT_SEL(sel, "%3u ", hal_data->Index5G_BW80_Base[path][ch_idx]);
_RTW_PRINT_SEL(sel, "\n");
}
RTW_PRINT_SEL(sel, "\n");
RTW_PRINT_SEL(sel, "OFDM diff:\n");
RTW_PRINT_SEL(sel, "%4s ", "");
for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++)
_RTW_PRINT_SEL(sel, "%dT ", tx_idx + 1);
_RTW_PRINT_SEL(sel, "\n");
for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) {
RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path));
for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++)
_RTW_PRINT_SEL(sel, "%2d ", hal_data->OFDM_5G_Diff[path][tx_idx]);
_RTW_PRINT_SEL(sel, "\n");
}
RTW_PRINT_SEL(sel, "\n");
RTW_PRINT_SEL(sel, "BW20 diff:\n");
RTW_PRINT_SEL(sel, "%4s ", "");
for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++)
_RTW_PRINT_SEL(sel, "%dS ", tx_idx + 1);
_RTW_PRINT_SEL(sel, "\n");
for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) {
RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path));
for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++)
_RTW_PRINT_SEL(sel, "%2d ", hal_data->BW20_5G_Diff[path][tx_idx]);
_RTW_PRINT_SEL(sel, "\n");
}
RTW_PRINT_SEL(sel, "\n");
RTW_PRINT_SEL(sel, "BW40 diff:\n");
RTW_PRINT_SEL(sel, "%4s ", "");
for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++)
_RTW_PRINT_SEL(sel, "%dS ", tx_idx + 1);
_RTW_PRINT_SEL(sel, "\n");
for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) {
RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path));
for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++)
_RTW_PRINT_SEL(sel, "%2d ", hal_data->BW40_5G_Diff[path][tx_idx]);
_RTW_PRINT_SEL(sel, "\n");
}
RTW_PRINT_SEL(sel, "\n");
RTW_PRINT_SEL(sel, "BW80 diff:\n");
RTW_PRINT_SEL(sel, "%4s ", "");
for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++)
_RTW_PRINT_SEL(sel, "%dS ", tx_idx + 1);
_RTW_PRINT_SEL(sel, "\n");
for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) {
RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path));
for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++)
_RTW_PRINT_SEL(sel, "%2d ", hal_data->BW80_5G_Diff[path][tx_idx]);
_RTW_PRINT_SEL(sel, "\n");
}
RTW_PRINT_SEL(sel, "\n");
#endif /* CONFIG_IEEE80211_BAND_5GHZ */
}
#endif /* CONFIG_TXPWR_PG_WITH_PWR_IDX */
/*
* rtw_regsty_get_target_tx_power -
*
* Return dBm or -1 for undefined
*/
s8 rtw_regsty_get_target_tx_power(
PADAPTER Adapter,
u8 Band,
u8 RfPath,
RATE_SECTION RateSection
)
{
struct registry_priv *regsty = adapter_to_regsty(Adapter);
s8 value = 0;
if (RfPath > RF_PATH_D) {
RTW_PRINT("%s invalid RfPath:%d\n", __func__, RfPath);
return -1;
}
if (Band != BAND_ON_2_4G
#if CONFIG_IEEE80211_BAND_5GHZ
&& Band != BAND_ON_5G
#endif
) {
RTW_PRINT("%s invalid Band:%d\n", __func__, Band);
return -1;
}
if (RateSection >= RATE_SECTION_NUM
#if CONFIG_IEEE80211_BAND_5GHZ
|| (Band == BAND_ON_5G && RateSection == CCK)
#endif
) {
RTW_PRINT("%s invalid RateSection:%d in Band:%d, RfPath:%d\n", __func__
, RateSection, Band, RfPath);
return -1;
}
if (Band == BAND_ON_2_4G)
value = regsty->target_tx_pwr_2g[RfPath][RateSection];
#if CONFIG_IEEE80211_BAND_5GHZ
else /* BAND_ON_5G */
value = regsty->target_tx_pwr_5g[RfPath][RateSection - 1];
#endif
return value;
}
bool rtw_regsty_chk_target_tx_power_valid(_adapter *adapter)
{
struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
int path, tx_num, band, rs;
s8 target;
for (band = BAND_ON_2_4G; band <= BAND_ON_5G; band++) {
if (!hal_is_band_support(adapter, band))
continue;
for (path = 0; path < RF_PATH_MAX; path++) {
if (!HAL_SPEC_CHK_RF_PATH(hal_spec, band, path))
break;
for (rs = 0; rs < RATE_SECTION_NUM; rs++) {
tx_num = rate_section_to_tx_num(rs);
if (tx_num + 1 > GET_HAL_TX_NSS(adapter))
continue;
if (band == BAND_ON_5G && IS_CCK_RATE_SECTION(rs))
continue;
if (IS_VHT_RATE_SECTION(rs) && !IS_HARDWARE_TYPE_JAGUAR_ALL(adapter))
continue;
target = rtw_regsty_get_target_tx_power(adapter, band, path, rs);
if (target == -1) {
RTW_PRINT("%s return _FALSE for band:%d, path:%d, rs:%d, t:%d\n", __func__, band, path, rs, target);
return _FALSE;
}
}
}
}
return _TRUE;
}
/*
* phy_get_target_txpwr -
*
* Return value in unit of TX Gain Index
*/
u8 phy_get_target_txpwr(
PADAPTER Adapter,
u8 Band,
u8 RfPath,
RATE_SECTION RateSection
)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
u8 value = 0;
if (RfPath > RF_PATH_D) {
RTW_PRINT("%s invalid RfPath:%d\n", __func__, RfPath);
return 0;
}
if (Band != BAND_ON_2_4G && Band != BAND_ON_5G) {
RTW_PRINT("%s invalid Band:%d\n", __func__, Band);
return 0;
}
if (RateSection >= RATE_SECTION_NUM
|| (Band == BAND_ON_5G && RateSection == CCK)
) {
RTW_PRINT("%s invalid RateSection:%d in Band:%d, RfPath:%d\n", __func__
, RateSection, Band, RfPath);
return 0;
}
if (Band == BAND_ON_2_4G)
value = pHalData->target_txpwr_2g[RfPath][RateSection];
else if (Band == BAND_ON_5G)
value = pHalData->target_txpwr_5g[RfPath][RateSection - 1];
return value;
}
static void phy_set_target_txpwr(
PADAPTER Adapter,
u8 Band,
u8 RfPath,
RATE_SECTION RateSection,
u8 Value
)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
if (RfPath > RF_PATH_D) {
RTW_PRINT("%s invalid RfPath:%d\n", __func__, RfPath);
return;
}
if (Band != BAND_ON_2_4G && Band != BAND_ON_5G) {
RTW_PRINT("%s invalid Band:%d\n", __func__, Band);
return;
}
if (RateSection >= RATE_SECTION_NUM
|| (Band == BAND_ON_5G && RateSection == CCK)
) {
RTW_PRINT("%s invalid RateSection:%d in %sG, RfPath:%d\n", __func__
, RateSection, (Band == BAND_ON_2_4G) ? "2.4" : "5", RfPath);
return;
}
if (Band == BAND_ON_2_4G)
pHalData->target_txpwr_2g[RfPath][RateSection] = Value;
else /* BAND_ON_5G */
pHalData->target_txpwr_5g[RfPath][RateSection - 1] = Value;
}
static inline BOOLEAN phy_is_txpwr_by_rate_undefined_of_band_path(_adapter *adapter, u8 band, u8 path)
{
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
u8 rate_idx = 0;
for (rate_idx = 0; rate_idx < TX_PWR_BY_RATE_NUM_RATE; rate_idx++) {
if (hal_data->TxPwrByRate[band][path][rate_idx] != hal_spec->txgi_max)
goto exit;
}
exit:
return rate_idx >= TX_PWR_BY_RATE_NUM_RATE ? _TRUE : _FALSE;
}
static inline void phy_txpwr_by_rate_duplicate_band_path(_adapter *adapter, u8 band, u8 s_path, u8 t_path)
{
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
u8 rate_idx = 0;
for (rate_idx = 0; rate_idx < TX_PWR_BY_RATE_NUM_RATE; rate_idx++)
hal_data->TxPwrByRate[band][t_path][rate_idx] = hal_data->TxPwrByRate[band][s_path][rate_idx];
}
static void phy_txpwr_by_rate_chk_for_path_dup(_adapter *adapter)
{
struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
u8 band, path;
s8 src_path;
for (band = BAND_ON_2_4G; band <= BAND_ON_5G; band++)
for (path = RF_PATH_A; path < RF_PATH_MAX; path++)
hal_data->txpwr_by_rate_undefined_band_path[band][path] = 0;
for (band = BAND_ON_2_4G; band <= BAND_ON_5G; band++) {
if (!hal_is_band_support(adapter, band))
continue;
for (path = RF_PATH_A; path < RF_PATH_MAX; path++) {
if (!HAL_SPEC_CHK_RF_PATH(hal_spec, band, path))
continue;
if (phy_is_txpwr_by_rate_undefined_of_band_path(adapter, band, path))
hal_data->txpwr_by_rate_undefined_band_path[band][path] = 1;
}
}
for (band = BAND_ON_2_4G; band <= BAND_ON_5G; band++) {
if (!hal_is_band_support(adapter, band))
continue;
src_path = -1;
for (path = RF_PATH_A; path < RF_PATH_MAX; path++) {
if (!HAL_SPEC_CHK_RF_PATH(hal_spec, band, path))
continue;
/* find src */
if (src_path == -1 && hal_data->txpwr_by_rate_undefined_band_path[band][path] == 0)
src_path = path;
}
if (src_path == -1) {
RTW_ERR("%s all power by rate undefined\n", __func__);
continue;
}
for (path = RF_PATH_A; path < RF_PATH_MAX; path++) {
if (!HAL_SPEC_CHK_RF_PATH(hal_spec, band, path))
continue;
/* duplicate src to undefined one */
if (hal_data->txpwr_by_rate_undefined_band_path[band][path] == 1) {
RTW_INFO("%s duplicate %s [%c] to [%c]\n", __func__
, band_str(band), rf_path_char(src_path), rf_path_char(path));
phy_txpwr_by_rate_duplicate_band_path(adapter, band, src_path, path);
}
}
}
}
static s8 _phy_get_txpwr_by_rate(_adapter *adapter
, BAND_TYPE band, enum rf_path rfpath, enum MGN_RATE rate);
void phy_store_target_tx_power(PADAPTER pAdapter)
{
struct hal_spec_t *hal_spec = GET_HAL_SPEC(pAdapter);
struct registry_priv *regsty = adapter_to_regsty(pAdapter);
u8 band, path, rs, tx_num, base;
for (band = BAND_ON_2_4G; band <= BAND_ON_5G; band++) {
if (!hal_is_band_support(pAdapter, band))
continue;
for (path = RF_PATH_A; path < RF_PATH_MAX; path++) {
if (!HAL_SPEC_CHK_RF_PATH(hal_spec, band, path))
break;
for (rs = 0; rs < RATE_SECTION_NUM; rs++) {
tx_num = rate_section_to_tx_num(rs);
if (tx_num + 1 > GET_HAL_TX_NSS(pAdapter))
continue;
if (band == BAND_ON_5G && IS_CCK_RATE_SECTION(rs))
continue;
if (IS_VHT_RATE_SECTION(rs) && !IS_HARDWARE_TYPE_JAGUAR_ALL(pAdapter))
continue;
if (regsty->target_tx_pwr_valid == _TRUE)
base = hal_spec->txgi_pdbm * rtw_regsty_get_target_tx_power(pAdapter, band, path, rs);
else
base = _phy_get_txpwr_by_rate(pAdapter, band, path, rate_sec_base[rs]);
phy_set_target_txpwr(pAdapter, band, path, rs, base);
}
}
}
}
static u8 get_val_from_dhex(u32 dhex, u8 i)
{
return (((dhex >> (i * 8 + 4)) & 0xF)) * 10 + ((dhex >> (i * 8)) & 0xF);
}
static u8 get_val_from_hex(u32 hex, u8 i)
{
return (hex >> (i * 8)) & 0xFF;
}
void
PHY_GetRateValuesOfTxPowerByRate(
PADAPTER pAdapter,
u32 RegAddr,
u32 BitMask,
u32 Value,
u8 *Rate,
s8 *PwrByRateVal,
u8 *RateNum
)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
struct dm_struct *pDM_Odm = &pHalData->odmpriv;
u8 i = 0;
u8 (*get_val)(u32, u8);
if (pDM_Odm->phy_reg_pg_version == 1)
get_val = get_val_from_dhex;
else
get_val = get_val_from_hex;
switch (RegAddr) {
case rTxAGC_A_Rate18_06:
case rTxAGC_B_Rate18_06:
Rate[0] = MGN_6M;
Rate[1] = MGN_9M;
Rate[2] = MGN_12M;
Rate[3] = MGN_18M;
for (i = 0; i < 4; ++i)
PwrByRateVal[i] = (s8)get_val(Value, i);
*RateNum = 4;
break;
case rTxAGC_A_Rate54_24:
case rTxAGC_B_Rate54_24:
Rate[0] = MGN_24M;
Rate[1] = MGN_36M;
Rate[2] = MGN_48M;
Rate[3] = MGN_54M;
for (i = 0; i < 4; ++i)
PwrByRateVal[i] = (s8)get_val(Value, i);
*RateNum = 4;
break;
case rTxAGC_A_CCK1_Mcs32:
Rate[0] = MGN_1M;
PwrByRateVal[0] = (s8)get_val(Value, 1);
*RateNum = 1;
break;
case rTxAGC_B_CCK11_A_CCK2_11:
if (BitMask == 0xffffff00) {
Rate[0] = MGN_2M;
Rate[1] = MGN_5_5M;
Rate[2] = MGN_11M;
for (i = 1; i < 4; ++i)
PwrByRateVal[i - 1] = (s8)get_val(Value, i);
*RateNum = 3;
} else if (BitMask == 0x000000ff) {
Rate[0] = MGN_11M;
PwrByRateVal[0] = (s8)get_val(Value, 0);
*RateNum = 1;
}
break;
case rTxAGC_A_Mcs03_Mcs00:
case rTxAGC_B_Mcs03_Mcs00:
Rate[0] = MGN_MCS0;
Rate[1] = MGN_MCS1;
Rate[2] = MGN_MCS2;
Rate[3] = MGN_MCS3;
for (i = 0; i < 4; ++i)
PwrByRateVal[i] = (s8)get_val(Value, i);
*RateNum = 4;
break;
case rTxAGC_A_Mcs07_Mcs04:
case rTxAGC_B_Mcs07_Mcs04:
Rate[0] = MGN_MCS4;
Rate[1] = MGN_MCS5;
Rate[2] = MGN_MCS6;
Rate[3] = MGN_MCS7;
for (i = 0; i < 4; ++i)
PwrByRateVal[i] = (s8)get_val(Value, i);
*RateNum = 4;
break;
case rTxAGC_A_Mcs11_Mcs08:
case rTxAGC_B_Mcs11_Mcs08:
Rate[0] = MGN_MCS8;
Rate[1] = MGN_MCS9;
Rate[2] = MGN_MCS10;
Rate[3] = MGN_MCS11;
for (i = 0; i < 4; ++i)
PwrByRateVal[i] = (s8)get_val(Value, i);
*RateNum = 4;
break;
case rTxAGC_A_Mcs15_Mcs12:
case rTxAGC_B_Mcs15_Mcs12:
Rate[0] = MGN_MCS12;
Rate[1] = MGN_MCS13;
Rate[2] = MGN_MCS14;
Rate[3] = MGN_MCS15;
for (i = 0; i < 4; ++i)
PwrByRateVal[i] = (s8)get_val(Value, i);
*RateNum = 4;
break;
case rTxAGC_B_CCK1_55_Mcs32:
Rate[0] = MGN_1M;
Rate[1] = MGN_2M;
Rate[2] = MGN_5_5M;
for (i = 1; i < 4; ++i)
PwrByRateVal[i - 1] = (s8)get_val(Value, i);
*RateNum = 3;
break;
case 0xC20:
case 0xE20:
case 0x1820:
case 0x1a20:
Rate[0] = MGN_1M;
Rate[1] = MGN_2M;
Rate[2] = MGN_5_5M;
Rate[3] = MGN_11M;
for (i = 0; i < 4; ++i)
PwrByRateVal[i] = (s8)get_val(Value, i);
*RateNum = 4;
break;
case 0xC24:
case 0xE24:
case 0x1824:
case 0x1a24:
Rate[0] = MGN_6M;
Rate[1] = MGN_9M;
Rate[2] = MGN_12M;
Rate[3] = MGN_18M;
for (i = 0; i < 4; ++i)
PwrByRateVal[i] = (s8)get_val(Value, i);
*RateNum = 4;
break;
case 0xC28:
case 0xE28:
case 0x1828:
case 0x1a28:
Rate[0] = MGN_24M;
Rate[1] = MGN_36M;
Rate[2] = MGN_48M;
Rate[3] = MGN_54M;
for (i = 0; i < 4; ++i)
PwrByRateVal[i] = (s8)get_val(Value, i);
*RateNum = 4;
break;
case 0xC2C:
case 0xE2C:
case 0x182C:
case 0x1a2C:
Rate[0] = MGN_MCS0;
Rate[1] = MGN_MCS1;
Rate[2] = MGN_MCS2;
Rate[3] = MGN_MCS3;
for (i = 0; i < 4; ++i)
PwrByRateVal[i] = (s8)get_val(Value, i);
*RateNum = 4;
break;
case 0xC30:
case 0xE30:
case 0x1830:
case 0x1a30:
Rate[0] = MGN_MCS4;
Rate[1] = MGN_MCS5;
Rate[2] = MGN_MCS6;
Rate[3] = MGN_MCS7;
for (i = 0; i < 4; ++i)
PwrByRateVal[i] = (s8)get_val(Value, i);
*RateNum = 4;
break;
case 0xC34:
case 0xE34:
case 0x1834:
case 0x1a34:
Rate[0] = MGN_MCS8;
Rate[1] = MGN_MCS9;
Rate[2] = MGN_MCS10;
Rate[3] = MGN_MCS11;
for (i = 0; i < 4; ++i)
PwrByRateVal[i] = (s8)get_val(Value, i);
*RateNum = 4;
break;
case 0xC38:
case 0xE38:
case 0x1838:
case 0x1a38:
Rate[0] = MGN_MCS12;
Rate[1] = MGN_MCS13;
Rate[2] = MGN_MCS14;
Rate[3] = MGN_MCS15;
for (i = 0; i < 4; ++i)
PwrByRateVal[i] = (s8)get_val(Value, i);
*RateNum = 4;
break;
case 0xC3C:
case 0xE3C:
case 0x183C:
case 0x1a3C:
Rate[0] = MGN_VHT1SS_MCS0;
Rate[1] = MGN_VHT1SS_MCS1;
Rate[2] = MGN_VHT1SS_MCS2;
Rate[3] = MGN_VHT1SS_MCS3;
for (i = 0; i < 4; ++i)
PwrByRateVal[i] = (s8)get_val(Value, i);
*RateNum = 4;
break;
case 0xC40:
case 0xE40:
case 0x1840:
case 0x1a40:
Rate[0] = MGN_VHT1SS_MCS4;
Rate[1] = MGN_VHT1SS_MCS5;
Rate[2] = MGN_VHT1SS_MCS6;
Rate[3] = MGN_VHT1SS_MCS7;
for (i = 0; i < 4; ++i)
PwrByRateVal[i] = (s8)get_val(Value, i);
*RateNum = 4;
break;
case 0xC44:
case 0xE44:
case 0x1844:
case 0x1a44:
Rate[0] = MGN_VHT1SS_MCS8;
Rate[1] = MGN_VHT1SS_MCS9;
Rate[2] = MGN_VHT2SS_MCS0;
Rate[3] = MGN_VHT2SS_MCS1;
for (i = 0; i < 4; ++i)
PwrByRateVal[i] = (s8)get_val(Value, i);
*RateNum = 4;
break;
case 0xC48:
case 0xE48:
case 0x1848:
case 0x1a48:
Rate[0] = MGN_VHT2SS_MCS2;
Rate[1] = MGN_VHT2SS_MCS3;
Rate[2] = MGN_VHT2SS_MCS4;
Rate[3] = MGN_VHT2SS_MCS5;
for (i = 0; i < 4; ++i)
PwrByRateVal[i] = (s8)get_val(Value, i);
*RateNum = 4;
break;
case 0xC4C:
case 0xE4C:
case 0x184C:
case 0x1a4C:
Rate[0] = MGN_VHT2SS_MCS6;
Rate[1] = MGN_VHT2SS_MCS7;
Rate[2] = MGN_VHT2SS_MCS8;
Rate[3] = MGN_VHT2SS_MCS9;
for (i = 0; i < 4; ++i)
PwrByRateVal[i] = (s8)get_val(Value, i);
*RateNum = 4;
break;
case 0xCD8:
case 0xED8:
case 0x18D8:
case 0x1aD8:
Rate[0] = MGN_MCS16;
Rate[1] = MGN_MCS17;
Rate[2] = MGN_MCS18;
Rate[3] = MGN_MCS19;
for (i = 0; i < 4; ++i)
PwrByRateVal[i] = (s8)get_val(Value, i);
*RateNum = 4;
break;
case 0xCDC:
case 0xEDC:
case 0x18DC:
case 0x1aDC:
Rate[0] = MGN_MCS20;
Rate[1] = MGN_MCS21;
Rate[2] = MGN_MCS22;
Rate[3] = MGN_MCS23;
for (i = 0; i < 4; ++i)
PwrByRateVal[i] = (s8)get_val(Value, i);
*RateNum = 4;
break;
case 0x3a24: /* HT MCS24-27 */
Rate[0] = MGN_MCS24;
Rate[1] = MGN_MCS25;
Rate[2] = MGN_MCS26;
Rate[3] = MGN_MCS27;
for (i = 0; i < 4; ++i)
PwrByRateVal[i] = (s8)get_val(Value, i);
*RateNum = 4;
break;
case 0x3a28: /* HT MCS28-31 */
Rate[0] = MGN_MCS28;
Rate[1] = MGN_MCS29;
Rate[2] = MGN_MCS30;
Rate[3] = MGN_MCS31;
for (i = 0; i < 4; ++i)
PwrByRateVal[i] = (s8)get_val(Value, i);
*RateNum = 4;
break;
case 0xCE0:
case 0xEE0:
case 0x18E0:
case 0x1aE0:
Rate[0] = MGN_VHT3SS_MCS0;
Rate[1] = MGN_VHT3SS_MCS1;
Rate[2] = MGN_VHT3SS_MCS2;
Rate[3] = MGN_VHT3SS_MCS3;
for (i = 0; i < 4; ++i)
PwrByRateVal[i] = (s8)get_val(Value, i);
*RateNum = 4;
break;
case 0xCE4:
case 0xEE4:
case 0x18E4:
case 0x1aE4:
Rate[0] = MGN_VHT3SS_MCS4;
Rate[1] = MGN_VHT3SS_MCS5;
Rate[2] = MGN_VHT3SS_MCS6;
Rate[3] = MGN_VHT3SS_MCS7;
for (i = 0; i < 4; ++i)
PwrByRateVal[i] = (s8)get_val(Value, i);
*RateNum = 4;
break;
case 0xCE8:
case 0xEE8:
case 0x18E8:
case 0x1aE8:
case 0x3a48:
Rate[0] = MGN_VHT3SS_MCS8;
Rate[1] = MGN_VHT3SS_MCS9;
Rate[2] = MGN_VHT4SS_MCS0;
Rate[3] = MGN_VHT4SS_MCS1;
for (i = 0; i < 4; ++i)
PwrByRateVal[i] = (s8)get_val(Value, i);
*RateNum = 4;
break;
case 0x3a4c:
Rate[0] = MGN_VHT4SS_MCS2;
Rate[1] = MGN_VHT4SS_MCS3;
Rate[2] = MGN_VHT4SS_MCS4;
Rate[3] = MGN_VHT4SS_MCS5;
for (i = 0; i < 4; ++i)
PwrByRateVal[i] = (s8)get_val(Value, i);
*RateNum = 4;
break;
case 0x3a50:
Rate[0] = MGN_VHT4SS_MCS6;
Rate[1] = MGN_VHT4SS_MCS7;
Rate[2] = MGN_VHT4SS_MCS8;
Rate[3] = MGN_VHT4SS_MCS9;
for (i = 0; i < 4; ++i)
PwrByRateVal[i] = (s8)get_val(Value, i);
*RateNum = 4;
break;
default:
RTW_PRINT("Invalid RegAddr 0x%x in %s()\n", RegAddr, __func__);
break;
};
}
void
PHY_StoreTxPowerByRateNew(
PADAPTER pAdapter,
u32 Band,
u32 RfPath,
u32 RegAddr,
u32 BitMask,
u32 Data
)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
u8 i = 0, rates[4] = {0}, rateNum = 0;
s8 PwrByRateVal[4] = {0};
PHY_GetRateValuesOfTxPowerByRate(pAdapter, RegAddr, BitMask, Data, rates, PwrByRateVal, &rateNum);
if (Band != BAND_ON_2_4G && Band != BAND_ON_5G) {
RTW_PRINT("Invalid Band %d\n", Band);
return;
}
if (RfPath > RF_PATH_D) {
RTW_PRINT("Invalid RfPath %d\n", RfPath);
return;
}
for (i = 0; i < rateNum; ++i) {
u8 rate_idx = phy_get_rate_idx_of_txpwr_by_rate(rates[i]);
pHalData->TxPwrByRate[Band][RfPath][rate_idx] = PwrByRateVal[i];
}
}
void
PHY_InitTxPowerByRate(
PADAPTER pAdapter
)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
struct hal_spec_t *hal_spec = GET_HAL_SPEC(pAdapter);
u8 band = 0, rfPath = 0, rate = 0;
for (band = BAND_ON_2_4G; band <= BAND_ON_5G; ++band)
for (rfPath = 0; rfPath < TX_PWR_BY_RATE_NUM_RF; ++rfPath)
for (rate = 0; rate < TX_PWR_BY_RATE_NUM_RATE; ++rate)
pHalData->TxPwrByRate[band][rfPath][rate] = hal_spec->txgi_max;
}
void
phy_store_tx_power_by_rate(
PADAPTER pAdapter,
u32 Band,
u32 RfPath,
u32 TxNum,
u32 RegAddr,
u32 BitMask,
u32 Data
)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
struct dm_struct *pDM_Odm = &pHalData->odmpriv;
if (pDM_Odm->phy_reg_pg_version > 0)
PHY_StoreTxPowerByRateNew(pAdapter, Band, RfPath, RegAddr, BitMask, Data);
else
RTW_INFO("Invalid PHY_REG_PG.txt version %d\n", pDM_Odm->phy_reg_pg_version);
}
/*
* This function must be called if the value in the PHY_REG_PG.txt(or header)
* is exact dBm values
*/
void
PHY_TxPowerByRateConfiguration(
PADAPTER pAdapter
)
{
phy_txpwr_by_rate_chk_for_path_dup(pAdapter);
phy_store_target_tx_power(pAdapter);
}
#ifdef CONFIG_FW_OFFLOAD_SET_TXPWR_IDX
extern bool phy_set_txpwr_idx_offload(_adapter *adapter);
#endif
void
phy_set_tx_power_index_by_rate_section(
PADAPTER pAdapter,
enum rf_path RFPath,
u8 Channel,
u8 rs
)
{
PHAL_DATA_TYPE hal_data = GET_HAL_DATA(pAdapter);
u8 band = hal_data->current_band_type;
u8 bw = hal_data->current_channel_bw;
u32 powerIndex = 0;
int i = 0;
if (rs >= RATE_SECTION_NUM) {
RTW_INFO("Invalid RateSection %d in %s", rs, __func__);
rtw_warn_on(1);
goto exit;
}
if (rs == CCK && bw != BAND_ON_2_4G)
goto exit;
for (i = 0; i < rates_by_sections[rs].rate_num; ++i) {
#if DBG_TX_POWER_IDX
struct txpwr_idx_comp tic;
powerIndex = rtw_hal_get_tx_power_index(pAdapter, RFPath
, rs, rates_by_sections[rs].rates[i], bw, band, Channel, 0, &tic);
dump_tx_power_index_inline(RTW_DBGDUMP, pAdapter, RFPath, bw, Channel
, rates_by_sections[rs].rates[i], powerIndex, &tic);
#else
powerIndex = phy_get_tx_power_index_ex(pAdapter, RFPath
, rs, rates_by_sections[rs].rates[i], bw, band, Channel, 0);
#endif
PHY_SetTxPowerIndex(pAdapter, powerIndex, RFPath, rates_by_sections[rs].rates[i]);
}
#ifdef CONFIG_FW_OFFLOAD_SET_TXPWR_IDX
if (!hal_data->set_entire_txpwr
&& phy_set_txpwr_idx_offload(pAdapter))
rtw_hal_set_txpwr_done(pAdapter);
#endif
exit:
return;
}
bool phy_get_ch_idx(u8 ch, u8 *ch_idx)
{
u8 i = 0;
BOOLEAN bIn24G = _TRUE;
if (ch > 0 && ch <= 14) {
bIn24G = _TRUE;
*ch_idx = ch - 1;
} else {
bIn24G = _FALSE;
for (i = 0; i < CENTER_CH_5G_ALL_NUM; ++i) {
if (center_ch_5g_all[i] == ch) {
*ch_idx = i;
break;
}
}
}
return bIn24G;
}
bool phy_chk_ch_setting_consistency(_adapter *adapter, u8 ch)
{
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
u8 ch_idx = 0xFF;
u8 ret = _FAIL;
phy_get_ch_idx(ch, &ch_idx);
if (ch_idx == 0xFF) {
rtw_warn_on(1);
goto exit;
}
if (ch != hal_data->current_channel) {
rtw_warn_on(1);
goto exit;
}
if (ch <= 14) {
if (hal_data->current_band_type != BAND_ON_2_4G) {
rtw_warn_on(1);
goto exit;
}
if (hal_data->current_channel_bw > CHANNEL_WIDTH_40) {
rtw_warn_on(1);
goto exit;
}
}
if (ch > 14) {
if (hal_data->current_band_type != BAND_ON_5G) {
rtw_warn_on(1);
goto exit;
}
if (hal_data->current_channel_bw > CHANNEL_WIDTH_160) {
rtw_warn_on(1);
goto exit;
}
}
ret = _SUCCESS;
exit:
if (ret != _SUCCESS)
RTW_WARN("ch:%u, hal band:%u, ch:%u, bw:%u\n", ch
, hal_data->current_band_type, hal_data->current_channel, hal_data->current_channel_bw);
return ret;
}
#ifdef CONFIG_TXPWR_PG_WITH_PWR_IDX
u8 phy_get_pg_txpwr_idx(_adapter *pAdapter
, enum rf_path RFPath, RATE_SECTION rs, u8 ntx_idx
, enum channel_width BandWidth, u8 band, u8 Channel)
{
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter);
u8 i;
u8 txPower = 0;
u8 chnlIdx = (Channel - 1);
if (HAL_IsLegalChannel(pAdapter, Channel) == _FALSE) {
chnlIdx = 0;
RTW_INFO("Illegal channel!!\n");
}
phy_get_ch_idx(Channel, &chnlIdx);
if (0)
RTW_INFO("[%s] Channel Index: %d\n", band_str(band), chnlIdx);
if (band == BAND_ON_2_4G) {
if (IS_CCK_RATE_SECTION(rs)) {
/* CCK-nTX */
txPower = pHalData->Index24G_CCK_Base[RFPath][chnlIdx];
txPower += pHalData->CCK_24G_Diff[RFPath][RF_1TX];
if (ntx_idx >= RF_2TX)
txPower += pHalData->CCK_24G_Diff[RFPath][RF_2TX];
if (ntx_idx >= RF_3TX)
txPower += pHalData->CCK_24G_Diff[RFPath][RF_3TX];
if (ntx_idx >= RF_4TX)
txPower += pHalData->CCK_24G_Diff[RFPath][RF_4TX];
goto exit;
}
txPower = pHalData->Index24G_BW40_Base[RFPath][chnlIdx];
/* OFDM-nTX */
if (IS_OFDM_RATE_SECTION(rs)) {
txPower += pHalData->OFDM_24G_Diff[RFPath][RF_1TX];
if (ntx_idx >= RF_2TX)
txPower += pHalData->OFDM_24G_Diff[RFPath][RF_2TX];
if (ntx_idx >= RF_3TX)
txPower += pHalData->OFDM_24G_Diff[RFPath][RF_3TX];
if (ntx_idx >= RF_4TX)
txPower += pHalData->OFDM_24G_Diff[RFPath][RF_4TX];
goto exit;
}
/* BW20-nS */
if (BandWidth == CHANNEL_WIDTH_20) {
txPower += pHalData->BW20_24G_Diff[RFPath][RF_1TX];
if (rate_section_to_tx_num(rs) >= RF_2TX)
txPower += pHalData->BW20_24G_Diff[RFPath][RF_2TX];
if (rate_section_to_tx_num(rs) >= RF_3TX)
txPower += pHalData->BW20_24G_Diff[RFPath][RF_3TX];
if (rate_section_to_tx_num(rs) >= RF_4TX)
txPower += pHalData->BW20_24G_Diff[RFPath][RF_4TX];
goto exit;
}
/* BW40-nS */
if (BandWidth == CHANNEL_WIDTH_40
/* Willis suggest adopt BW 40M power index while in BW 80 mode */
|| BandWidth == CHANNEL_WIDTH_80
) {
txPower += pHalData->BW40_24G_Diff[RFPath][RF_1TX];
if (rate_section_to_tx_num(rs) >= RF_2TX)
txPower += pHalData->BW40_24G_Diff[RFPath][RF_2TX];
if (rate_section_to_tx_num(rs) >= RF_3TX)
txPower += pHalData->BW40_24G_Diff[RFPath][RF_3TX];
if (rate_section_to_tx_num(rs) >= RF_4TX)
txPower += pHalData->BW40_24G_Diff[RFPath][RF_4TX];
goto exit;
}
}
#if CONFIG_IEEE80211_BAND_5GHZ
else if (band == BAND_ON_5G) {
if (IS_CCK_RATE_SECTION(rs)) {
RTW_WARN("===>%s: INVALID, CCK on 5G\n", __func__);
goto exit;
}
txPower = pHalData->Index5G_BW40_Base[RFPath][chnlIdx];
/* OFDM-nTX */