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rtl8812au
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LICENSE 100644
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@ -0,0 +1,339 @@
GNU GENERAL PUBLIC LICENSE
Version 2, June 1991
Copyright (C) 1989, 1991 Free Software Foundation, Inc.,
51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
Everyone is permitted to copy and distribute verbatim copies
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Also add information on how to contact you by electronic and paper mail.
If the program is interactive, make it output a short notice like this
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Gnomovision version 69, Copyright (C) year name of author
Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
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under certain conditions; type `show c' for details.
The hypothetical commands `show w' and `show c' should show the appropriate
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mouse-clicks or menu items--whatever suits your program.
You should also get your employer (if you work as a programmer) or your
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Yoyodyne, Inc., hereby disclaims all copyright interest in the program
`Gnomovision' (which makes passes at compilers) written by James Hacker.
<signature of Ty Coon>, 1 April 1989
Ty Coon, President of Vice
This General Public License does not permit incorporating your program into
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consider it more useful to permit linking proprietary applications with the
library. If this is what you want to do, use the GNU Lesser General
Public License instead of this License.

67
Makefile
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@ -1,8 +1,8 @@
EXTRA_CFLAGS += $(USER_EXTRA_CFLAGS)
EXTRA_CFLAGS += -O1
#EXTRA_CFLAGS += -O3
#EXTRA_CFLAGS += -Wall
#EXTRA_CFLAGS += -Wextra
EXTRA_CFLAGS += -Wall
EXTRA_CFLAGS += -Wextra
#EXTRA_CFLAGS += -Werror
#EXTRA_CFLAGS += -pedantic
#EXTRA_CFLAGS += -Wshadow -Wpointer-arith -Wcast-qual -Wstrict-prototypes -Wmissing-prototypes
@ -13,11 +13,17 @@ EXTRA_CFLAGS += -Wno-unused-label
EXTRA_CFLAGS += -Wno-unused-parameter
EXTRA_CFLAGS += -Wno-unused-function
EXTRA_CFLAGS += -Wno-unused
#EXTRA_CFLAGS += -Wno-uninitialized
EXTRA_CFLAGS += -Wno-date-time
#EXTRA_CFLAGS += -Wno-misleading-indentation
EXTRA_CFLAGS += -Wno-uninitialized
# Relax some warnings from '-Wextra' so we won't get flooded with warnings
EXTRA_CFLAGS += -Wno-sign-compare
#EXTRA_CFLAGS += -Wno-missing-field-initializers
EXTRA_CFLAGS += -Wno-type-limits
GCC_VER_49 := $(shell echo `$(CC) -dumpversion | cut -f1-2 -d.` \>= 4.9 | bc )
ifeq ($(GCC_VER_49),1)
EXTRA_CFLAGS += -Wno-date-time # Fix compile error && warning on gcc 4.9 and later
EXTRA_CFLAGS += -Wno-date-time -Wno-error=date-time # Fix compile error && warning on gcc 4.9 and later
endif
EXTRA_CFLAGS += -I$(src)/include
@ -29,11 +35,11 @@ CONFIG_AUTOCFG_CP = n
########################## WIFI IC ############################
CONFIG_MULTIDRV = n
CONFIG_RTL8188E = n
CONFIG_RTL8812A = n
CONFIG_RTL8812A = y
CONFIG_RTL8821A = y
CONFIG_RTL8192E = n
CONFIG_RTL8723B = n
CONFIG_RTL8814A = n
CONFIG_RTL8814A = y
CONFIG_RTL8723C = n
CONFIG_RTL8188F = n
CONFIG_RTL8822B = n
@ -46,11 +52,11 @@ CONFIG_SDIO_HCI = n
CONFIG_GSPI_HCI = n
########################## Features ###########################
CONFIG_MP_INCLUDED = y
CONFIG_POWER_SAVING = y
CONFIG_POWER_SAVING = n
CONFIG_USB_AUTOSUSPEND = n
CONFIG_HW_PWRP_DETECTION = n
CONFIG_WIFI_TEST = n
CONFIG_BT_COEXIST = y
CONFIG_BT_COEXIST = n
CONFIG_INTEL_WIDI = n
CONFIG_WAPI_SUPPORT = n
CONFIG_EFUSE_CONFIG_FILE = y
@ -67,7 +73,12 @@ CONFIG_80211W = n
CONFIG_REDUCE_TX_CPU_LOADING = n
CONFIG_BR_EXT = y
CONFIG_TDLS = n
CONFIG_WIFI_MONITOR = n
CONFIG_WIFI_MONITOR = y
# If you are setting up AP (e.g. by hostapd) in 802.11ac mode, you may have to choose 'y' below.
# Otherwise some channels may be flagged 'NO-IR' (i.e. Passive scanning) by the driver.
# Please check your country's regulatory domain first,
# to see whether active scanning is permitted by law/regulations on the desired channels.
CONFIG_DISABLE_REGD_C=y
CONFIG_MCC_MODE = n
CONFIG_APPEND_VENDOR_IE_ENABLE = n
CONFIG_RTW_NAPI = y
@ -77,7 +88,7 @@ CONFIG_RTW_IPCAM_APPLICATION = n
CONFIG_RTW_REPEATER_SON = n
CONFIG_RTW_WIFI_HAL = y
########################## Debug ###########################
CONFIG_RTW_DEBUG = y
CONFIG_RTW_DEBUG = n
# default log level is _DRV_INFO_ = 4,
# please refer to "How_to_set_driver_debug_log_level.doc" to set the available level.
CONFIG_RTW_LOG_LEVEL = 4
@ -93,7 +104,7 @@ CONFIG_AP_WOWLAN = n
######### Notify SDIO Host Keep Power During Syspend ##########
CONFIG_RTW_SDIO_PM_KEEP_POWER = y
###################### MP HW TX MODE FOR VHT #######################
CONFIG_MP_VHT_HW_TX_MODE = n
CONFIG_MP_VHT_HW_TX_MODE = y
###################### Platform Related #######################
CONFIG_PLATFORM_I386_PC = y
CONFIG_PLATFORM_ANDROID_X86 = n
@ -177,6 +188,38 @@ ifeq ($(CONFIG_PCI_HCI), y)
HCI_NAME = pci
endif
ifeq ($(DEBUG), 1)
EXTRA_CFLAGS += -DDBG=1 -DCONFIG_RTW_DEBUG -DCONFIG_DBG_COUNTER -DRTW_LOG_LEVEL=5
EXTRA_CFLAGS += -DCONFIG_RADIOTAP_WITH_RXDESC
else ifeq ($(DEBUG), 2)
EXTRA_CFLAGS += -DDBG=1 -DCONFIG_RTW_DEBUG -DCONFIG_DBG_COUNTER -DRTW_LOG_LEVEL=5
EXTRA_CFLAGS += -DCONFIG_DEBUG_RTL871X
EXTRA_CFLAGS += -DCONFIG_RADIOTAP_WITH_RXDESC
else
EXTRA_CFLAGS += -DDBG=0
endif
ifeq ($(CONFIG_RTL8812A)_$(CONFIG_RTL8821A)_$(CONFIG_RTL8814A), y_y_y)
EXTRA_CFLAGS += -DDRV_NAME=\"rtl88xxau\"
ifeq ($(CONFIG_USB_HCI), y)
USER_MODULE_NAME = 88XXau
endif
ifeq ($(CONFIG_PCI_HCI), y)
USER_MODULE_NAME = 88XXae
endif
ifeq ($(CONFIG_SDIO_HCI), y)
USER_MODULE_NAME = 88XXas
endif
else
EXTRA_CFLAGS += -DDRV_NAME=\"rtl8812au\"
endif
ifeq ($(CONFIG_USB2_EXTERNAL_POWER), y)
EXTRA_CFLAGS += -DCONFIG_USE_EXTERNAL_POWER
endif
_OS_INTFS_FILES := os_dep/osdep_service.o \
os_dep/linux/os_intfs.o \
@ -228,6 +271,7 @@ _PLATFORM_FILES := platform/platform_ops.o
EXTRA_CFLAGS += -I$(src)/hal/btc
include $(TopDIR)/hal/phydm/phydm.mk
########### HAL_RTL8188E #################################
ifeq ($(CONFIG_RTL8188E), y)
@ -2068,5 +2112,6 @@ clean:
rm -fr Module.symvers ; rm -fr Module.markers ; rm -fr modules.order
rm -fr *.mod.c *.mod *.o .*.cmd *.ko *~
rm -fr .tmp_versions
rm -fr .cache.mk
endif

113
README.md 100644
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@ -0,0 +1,113 @@
## RTL8812AU/21AU and RTL8814AU drivers
## with monitor mode and frame injection
###
newest driver 5.4.3 from realtek + patches to add 8814 support
### DKMS
This driver can be installed using [DKMS]. This is a system which will automatically recompile and install a kernel module when a new kernel gets installed or updated. To make use of DKMS, install the `dkms` package, which on Debian (based) systems is done like this:
```
sudo apt-get install dkms
```
### Installation of Driver
In order to install the driver open a terminal in the directory with the source code and execute the following command:
```
sudo ./dkms-install.sh
```
### Removal of Driver
In order to remove the driver from your system open a terminal in the directory with the source code and execute the following command:
```
sudo ./dkms-remove.sh
```
### Make
For building & installing the driver with 'make' use
```
make
make install
```
### Notes
Download
```
git clone -b v5.3.4 https://github.com/aircrack-ng/rtl8812au.git
cd rtl*
```
Package / Build dependencies (Kali)
```
sudo apt-get install build-essential
sudo apt-get install bc
sudo apt-get install libelf-dev
sudo apt-get install linux-headers-`uname -r`
```
For Raspberry (RPI)
```
sudo apt-get install raspberrypi-kernel-headers
```
For setting monitor mode
1. Fix problematic interference in monitor mode.
```
airmon-ng check kill
```
You may also uncheck the box "Automatically connect to this network when it is avaiable" in nm-connection-editor. This only works if you have a saved wifi connection.
2. Set interface down
```
sudo ip link set wlan0 down
```
3. Set monitor mode
```
sudo iw dev wlan0 set type monitor
```
4. Set interface up
```
sudo ip link set wlan0 up
```
For setting TX power
```
sudo iw wlan0 set txpower fixed 3000
```
### LED control
#### You can now control LED behaviour statically by Makefile, for example:
```sh
CONFIG_LED_ENABLE = n
```
value can be y or n
#### statically by module parameter in /etc/modprobe.d/8812au.conf or wherever, for example:
```sh
options 88XXau rtw_led_enable=0
```
value can be 0 or 1
#### or dynamically by writing to /proc/net/rtl8812au/$(your interface name)/led_enable, for example:
```sh
$ echo "0" > /proc/net/rtl8812au/$(your interface name)/led_enable
```
value can be 0 or 1
#### check current value:
```sh
$ cat /proc/net/rtl8812au/$(your interface name)/led_enable
```
### NetworkManager
Newer versions of NetworkManager switches to random MAC address. Some users would prefer to use a fixed address.
Simply add these lines below
```
[device]
wifi.scan-rand-mac-address=no
```
at the end of file /etc/NetworkManager/NetworkManager.conf and restart NetworkManager with the command:
```
sudo service NetworkManager restart
```

123
Realtek_Changelog.txt 100644
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@ -0,0 +1,123 @@
Product: RTL8812A USB Software Package - Linux Driver
Version: v5.2.20.2_28373.20180619
Release History:
v5.2.20.2_28373.20180619
Update phydm to improve TP stability
v5.2.20.1_27761.20180508
Support WiFi-HAL for Android 8
v5.2.20_25672.20171213
Update PHYDM setting
Update FW to v52.10
Correct DFS master function
Fixed WPA2 vulnerability - key reinstallation attacks(KRACKs)(update)
v5.2.9.3_24903.20171101
Fixed WPA2 vulnerability - key reinstallation attacks(KRACKs)
v5.2.9.2_24491.20171027
Remove test code
Fix crash for BF function
Fix wrong memory accesse
Fix encrypt broadcast packet fail
Fix crash for TDLS
v5.2.9.1_24461.20171018
(Do not use)
v5.2.9_22809.20170621
Update FW to v52.2
Update PHYDM setting
Support PNO
Fix WOW issue
Fix efuse issue
Sync channel plan document
Fix DFS issue
Support NAPI & GRO
Enable Power by rate
Fix MP power tracking issue
Fix potential memory out of range
Support CE-RED. 2G: ETSI v2.1.1 / 5G: ETSI v2.1.0
v5.1.5_19247.20160830
Update FW to v49
Update PHY parameters v57
Support TDLS
Enable GTK offload under WOW
Fix no scan results after resume
Fix NDPA issue under scan
Fix dynamic watchdog don't work
v4.3.20_16317.20160108
Disable CONFIG_WIFI_TEST & CONFIG_WOWLAN in Makefile default
v4.3.20_16317.20151231
Fix STBC issue
Fix NDPA sounding issue
Fix r/w rf register racing issue
Fix kernel panic for BT & timer
Fix memory leak for cmd thread
Fix ADDBA flow
Support Power limit
Support USB mode switch
Support Linux Kernel 4.2
Update FW to v41
Update PHY parameters to v55
v4.3.13_14061.20150505
Update FW
Update Phy parameters
Support WOWLAN GTK offload
Support Adaptivity
Support 1T2R
Support 8812AU-VN
Fix scan timeout issue
Fix RFE type error
Fix Spur Calibration flow
Fix some 802.11 logo issue
Fix some crash issues
v4.3.8_12175.20140912
Update PHY parameters to improve throughput
Update FW
Support PMF
Support WoWLAN
Modify channel plan
Fix MP issue
v4.3.2_11100.20140411
Fix p2p issues
Improve throughput
Update FW
v4.2.3_8123.20130705
Update PHY parameters to improve throughput
v4.2.2_7502.20130517
Support 11AC for STA
v4.2.0_7054.20130328
Fix LED behavior
v4.2.0_6952.20130315
First release

5
clean
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@ -1,5 +0,0 @@
#!/bin/bash
rmmod 8192cu
rmmod 8192ce
rmmod 8192du
rmmod 8192de

2
core/rtw_cmd.c
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@ -904,8 +904,10 @@ u8 rtw_sitesurvey_cmd(_adapter *padapter, struct sitesurvey_parm *pparm)
u32 scan_timeout_ms;
pmlmepriv->scan_start_time = rtw_get_current_time();
#if 0 /*fariouche: looking at other wlan drivers, they do not handle timeout. It is conflicting with long scans */
scan_timeout_ms = rtw_scan_timeout_decision(padapter);
mlme_set_scan_to_timer(pmlmepriv,scan_timeout_ms);
#endif
rtw_led_control(padapter, LED_CTL_SITE_SURVEY);
} else

10
core/rtw_debug.c
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@ -6071,6 +6071,9 @@ ssize_t proc_set_lck(struct file *file, const char __user *buffer, size_t count,
#endif /* CONFIG_DBG_RF_CAL */
#endif /* CONFIG_PROC_DEBUG */
#ifdef CONFIG_RTW_DEBUG
#define RTW_BUFDUMP_BSIZE 16
#if 1
inline void RTW_BUF_DUMP_SEL(uint _loglevel, void *sel, u8 *_titlestring,
@ -6188,3 +6191,10 @@ inline void RTW_BUF_DUMP_SEL(uint _loglevel, void *sel, u8 *_titlestring,
}
#endif
#else
inline void RTW_BUF_DUMP_SEL(uint _loglevel, void *sel, u8 *_titlestring,
bool _idx_show, const u8 *_hexdata, int _hexdatalen)
{
}
#endif //#ifdef CONFIG_RTW_DEBUG

6190
core/rtw_debug.c~
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23
dkms-install.sh 100755
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@ -0,0 +1,23 @@
#!/bin/bash
if [[ $EUID -ne 0 ]]; then
echo "You must run this with superuser priviliges. Try \"sudo ./dkms-install.sh\"" 2>&1
exit 1
else
echo "About to run dkms install steps..."
fi
DRV_DIR=rtl8812au
DRV_NAME=rtl8812au
DRV_VERSION=5.2.20.2
cp -r ../${DRV_DIR} /usr/src/${DRV_NAME}-${DRV_VERSION}
dkms add -m ${DRV_NAME} -v ${DRV_VERSION}
dkms build -m ${DRV_NAME} -v ${DRV_VERSION}
dkms install -m ${DRV_NAME} -v ${DRV_VERSION}
RESULT=$?
echo "Finished running dkms install steps."
exit $RESULT

24
dkms-remove.sh 100755
View File

@ -0,0 +1,24 @@
#!/bin/bash
if [[ $EUID -ne 0 ]]; then
echo "You must run this with superuser priviliges. Try \"sudo ./dkms-remove.sh\"" 2>&1
exit 1
else
echo "About to run dkms removal steps..."
fi
DRV_DIR=rtl8812au
DRV_NAME=rtl8812au
DRV_VERSION=5.2.20.2
dkms remove ${DRV_NAME}/${DRV_VERSION} --all
rm -rf /usr/src/${DRV_NAME}-${DRV_VERSION}
RESULT=$?
if [[ "$RESULT" != "0" ]]; then
echo "Error occurred while running dkms remove." 2>&1
else
echo "Finished running dkms removal steps."
fi
exit $RESULT

10
dkms.conf 100644
View File

@ -0,0 +1,10 @@
PACKAGE_NAME="realtek-rtl88xxau"
PACKAGE_VERSION="5.2.20.2~20180812"
CLEAN="'make' clean"
BUILT_MODULE_NAME[0]=88XXau
PROCS_NUM=`nproc`
[ $PROCS_NUM -gt 16 ] && PROCS_NUM=16
DEST_MODULE_LOCATION[0]="/updates"
MAKE="'make' -j$PROCS_NUM KVER=${kernelver} KSRC=/lib/modules/${kernelver}/build"
AUTOINSTALL="yes"
REMAKE_INITRD=no

3431
hal/btc/halbtc8192e1ant.c 100644
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File diff suppressed because it is too large Load Diff

240
hal/btc/halbtc8192e1ant.h 100644
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@ -0,0 +1,240 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8192E_SUPPORT == 1)
/* *******************************************
* The following is for 8192E 1ANT BT Co-exist definition
* ******************************************* */
#define BT_AUTO_REPORT_ONLY_8192E_1ANT 1
#define BT_INFO_8192E_1ANT_B_FTP BIT(7)
#define BT_INFO_8192E_1ANT_B_A2DP BIT(6)
#define BT_INFO_8192E_1ANT_B_HID BIT(5)
#define BT_INFO_8192E_1ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8192E_1ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8192E_1ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8192E_1ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8192E_1ANT_B_CONNECTION BIT(0)
#define BT_INFO_8192E_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \
(((_BT_INFO_EXT_&BIT(0))) ? true : false)
#define BTC_RSSI_COEX_THRESH_TOL_8192E_1ANT 2
#define BT_8192E_1ANT_WIFI_NOISY_THRESH 30 /* max: 255 */
enum bt_info_src_8192e_1ant {
BT_INFO_SRC_8192E_1ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8192E_1ANT_BT_RSP = 0x1,
BT_INFO_SRC_8192E_1ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8192E_1ANT_MAX
};
enum bt_8192e_1ant_bt_status {
BT_8192E_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8192E_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8192E_1ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8192E_1ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8192E_1ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8192E_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8192E_1ANT_BT_STATUS_MAX
};
enum bt_8192e_1ant_wifi_status {
BT_8192E_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8192E_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1,
BT_8192E_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2,
BT_8192E_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT = 0x3,
BT_8192E_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4,
BT_8192E_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5,
BT_8192E_1ANT_WIFI_STATUS_MAX
};
enum bt_8192e_1ant_coex_algo {
BT_8192E_1ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8192E_1ANT_COEX_ALGO_SCO = 0x1,
BT_8192E_1ANT_COEX_ALGO_HID = 0x2,
BT_8192E_1ANT_COEX_ALGO_A2DP = 0x3,
BT_8192E_1ANT_COEX_ALGO_A2DP_PANHS = 0x4,
BT_8192E_1ANT_COEX_ALGO_PANEDR = 0x5,
BT_8192E_1ANT_COEX_ALGO_PANHS = 0x6,
BT_8192E_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
BT_8192E_1ANT_COEX_ALGO_PANEDR_HID = 0x8,
BT_8192E_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
BT_8192E_1ANT_COEX_ALGO_HID_A2DP = 0xa,
BT_8192E_1ANT_COEX_ALGO_MAX = 0xb,
};
struct coex_dm_8192e_1ant {
/* fw mechanism */
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean auto_tdma_adjust;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
/* sw mechanism */
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
boolean limited_dig;
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
u16 backup_retry_limit;
u8 backup_ampdu_max_time;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
u32 pre_ra_mask;
u32 cur_ra_mask;
u8 pre_arfr_type;
u8 cur_arfr_type;
u8 pre_retry_limit_type;
u8 cur_retry_limit_type;
u8 pre_ampdu_time_type;
u8 cur_ampdu_time_type;
u32 arp_cnt;
u8 error_condition;
};
struct coex_sta_8192e_1ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean under_lps;
boolean under_ips;
u32 specific_pkt_period_cnt;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
s8 bt_rssi;
boolean bt_tx_rx_mask;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
boolean c2h_bt_info_req_sent;
u8 bt_info_c2h[BT_INFO_SRC_8192E_1ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8192E_1ANT_MAX];
boolean c2h_bt_inquiry_page;
boolean c2h_bt_page; /* Add for win8.1 page out issue */
boolean wifi_is_high_pri_task; /* Add for win8.1 page out issue */
u8 bt_retry_cnt;
u8 bt_info_ext;
u32 pop_event_cnt;
u8 scan_ap_num;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_agg;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_agg;
boolean cck_lock;
boolean pre_ccklock;
u8 coex_table_type;
boolean force_lps_on;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8192e1ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8192e1ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
void ex_halbtc8192e1ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8192e1ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8192e1ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8192e1ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8192e1ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8192e1ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8192e1ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8192e1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8192e1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8192e1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8192e1ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8192e1ant_pnp_notify(IN struct btc_coexist *btcoexist,
IN u8 pnp_state);
void ex_halbtc8192e1ant_coex_dm_reset(IN struct btc_coexist *btcoexist);
void ex_halbtc8192e1ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8192e1ant_display_coex_info(IN struct btc_coexist *btcoexist);
void ex_halbtc8192e1ant_dbg_control(IN struct btc_coexist *btcoexist,
IN u8 op_code, IN u8 op_len, IN u8 *pdata);
#else /* #if (RTL8192E_SUPPORT == 1) */
#define ex_halbtc8192e1ant_power_on_setting(btcoexist)
#define ex_halbtc8192e1ant_pre_load_firmware(btcoexist)
#define ex_halbtc8192e1ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8192e1ant_init_coex_dm(btcoexist)
#define ex_halbtc8192e1ant_ips_notify(btcoexist, type)
#define ex_halbtc8192e1ant_lps_notify(btcoexist, type)
#define ex_halbtc8192e1ant_scan_notify(btcoexist, type)
#define ex_halbtc8192e1ant_connect_notify(btcoexist, type)
#define ex_halbtc8192e1ant_media_status_notify(btcoexist, type)
#define ex_halbtc8192e1ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8192e1ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8192e1ant_rf_status_notify(btcoexist, type)
#define ex_halbtc8192e1ant_halt_notify(btcoexist)
#define ex_halbtc8192e1ant_pnp_notify(btcoexist, pnp_state)
#define ex_halbtc8192e1ant_coex_dm_reset(btcoexist)
#define ex_halbtc8192e1ant_periodical(btcoexist)
#define ex_halbtc8192e1ant_display_coex_info(btcoexist)
#define ex_halbtc8192e1ant_dbg_control(btcoexist, op_code, op_len, pdata)
#endif
#endif

4273
hal/btc/halbtc8192e2ant.c 100644
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230
hal/btc/halbtc8192e2ant.h 100644
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@ -0,0 +1,230 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8192E_SUPPORT == 1)
/* *******************************************
* The following is for 8192E 2Ant BT Co-exist definition
* ******************************************* */
#define BT_AUTO_REPORT_ONLY_8192E_2ANT 0
#define BT_INFO_8192E_2ANT_B_FTP BIT(7)
#define BT_INFO_8192E_2ANT_B_A2DP BIT(6)
#define BT_INFO_8192E_2ANT_B_HID BIT(5)
#define BT_INFO_8192E_2ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8192E_2ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8192E_2ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8192E_2ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8192E_2ANT_B_CONNECTION BIT(0)
#define BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT 2
#define NOISY_AP_NUM_THRESH_8192E 10
enum bt_info_src_8192e_2ant {
BT_INFO_SRC_8192E_2ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8192E_2ANT_BT_RSP = 0x1,
BT_INFO_SRC_8192E_2ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8192E_2ANT_MAX
};
enum bt_8192e_2ant_bt_status {
BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8192E_2ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8192E_2ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8192E_2ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8192E_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8192E_2ANT_BT_STATUS_MAX
};
enum bt_8192e_2ant_coex_algo {
BT_8192E_2ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8192E_2ANT_COEX_ALGO_SCO = 0x1,
BT_8192E_2ANT_COEX_ALGO_SCO_PAN = 0x2,
BT_8192E_2ANT_COEX_ALGO_HID = 0x3,
BT_8192E_2ANT_COEX_ALGO_A2DP = 0x4,
BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS = 0x5,
BT_8192E_2ANT_COEX_ALGO_PANEDR = 0x6,
BT_8192E_2ANT_COEX_ALGO_PANHS = 0x7,
BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP = 0x8,
BT_8192E_2ANT_COEX_ALGO_PANEDR_HID = 0x9,
BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0xa,
BT_8192E_2ANT_COEX_ALGO_HID_A2DP = 0xb,
BT_8192E_2ANT_COEX_ALGO_MAX = 0xc
};
struct coex_dm_8192e_2ant {
/* fw mechanism */
u8 pre_bt_dec_pwr_lvl;
u8 cur_bt_dec_pwr_lvl;
u8 pre_fw_dac_swing_lvl;
u8 cur_fw_dac_swing_lvl;
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean reset_tdma_adjust;
boolean auto_tdma_adjust;
boolean auto_tdma_adjust_low_rssi;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
/* sw mechanism */
boolean pre_rf_rx_lpf_shrink;
boolean cur_rf_rx_lpf_shrink;
u32 bt_rf_0x1e_backup;
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
boolean pre_dac_swing_on;
u32 pre_dac_swing_lvl;
boolean cur_dac_swing_on;
u32 cur_dac_swing_lvl;
boolean pre_adc_back_off;
boolean cur_adc_back_off;
boolean pre_agc_table_en;
boolean cur_agc_table_en;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
boolean limited_dig;
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
u16 backup_retry_limit;
u8 backup_ampdu_max_time;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
u8 pre_ss_type;
u8 cur_ss_type;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
u32 pre_ra_mask;
u32 cur_ra_mask;
u8 cur_ra_mask_type;
u8 pre_arfr_type;
u8 cur_arfr_type;
u8 pre_retry_limit_type;
u8 cur_retry_limit_type;
u8 pre_ampdu_time_type;
u8 cur_ampdu_time_type;
};
struct coex_sta_8192e_2ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean force_lps_on;
boolean under_lps;
boolean under_ips;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
u8 bt_rssi;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
boolean c2h_bt_info_req_sent;
u8 bt_info_c2h[BT_INFO_SRC_8192E_2ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8192E_2ANT_MAX];
boolean c2h_bt_inquiry_page;
u8 bt_retry_cnt;
u8 bt_info_ext;
u8 scan_ap_num;
u32 bt_coex_supported_version;
u32 cnt_setup_link;
u32 cnt_wifi_high_pri;
boolean is_setup_link;
boolean wifi_is_high_pri_task;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_vht;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_vht;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8192e2ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8192e2ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8192e2ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8192e2ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8192e2ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8192e2ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8192e2ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8192e2ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8192e2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8192e2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8192e2ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8192e2ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8192e2ant_display_coex_info(IN struct btc_coexist *btcoexist);
#else /* #if (RTL8192E_SUPPORT == 1) */
#define ex_halbtc8192e2ant_power_on_setting(btcoexist)
#define ex_halbtc8192e2ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8192e2ant_init_coex_dm(btcoexist)
#define ex_halbtc8192e2ant_ips_notify(btcoexist, type)
#define ex_halbtc8192e2ant_lps_notify(btcoexist, type)
#define ex_halbtc8192e2ant_scan_notify(btcoexist, type)
#define ex_halbtc8192e2ant_connect_notify(btcoexist, type)
#define ex_halbtc8192e2ant_media_status_notify(btcoexist, type)
#define ex_halbtc8192e2ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8192e2ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8192e2ant_halt_notify(btcoexist)
#define ex_halbtc8192e2ant_periodical(btcoexist)
#define ex_halbtc8192e2ant_display_coex_info(btcoexist)
#endif
#endif

4621
hal/btc/halbtc8703b1ant.c 100644
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hal/btc/halbtc8703b1ant.h 100644
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/******************************************************************************
*
* Copyright(c) 2016 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8703B_SUPPORT == 1)
/* *******************************************
* The following is for 8703B 1ANT BT Co-exist definition
* ******************************************* */
#define BT_AUTO_REPORT_ONLY_8703B_1ANT 1
#define BT_8703B_1ANT_ENABLE_GNTBT_TO_GPIO14 0
#define BT_INFO_8703B_1ANT_B_FTP BIT(7)
#define BT_INFO_8703B_1ANT_B_A2DP BIT(6)
#define BT_INFO_8703B_1ANT_B_HID BIT(5)
#define BT_INFO_8703B_1ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8703B_1ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8703B_1ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8703B_1ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8703B_1ANT_B_CONNECTION BIT(0)
#define BT_INFO_8703B_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \
(((_BT_INFO_EXT_&BIT(0))) ? TRUE : FALSE)
#define BTC_RSSI_COEX_THRESH_TOL_8703B_1ANT 2
#define BT_8703B_1ANT_WIFI_NOISY_THRESH 50 /* max: 255 */
/* for Antenna detection */
#define BT_8703B_1ANT_ANTDET_PSDTHRES_BACKGROUND 50
#define BT_8703B_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70
#define BT_8703B_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 55
#define BT_8703B_1ANT_ANTDET_PSDTHRES_1ANT 35
#define BT_8703B_1ANT_ANTDET_RETRY_INTERVAL 10 /* retry timer if ant det is fail, unit: second */
#define BT_8703B_1ANT_ANTDET_SWEEPPOINT_DELAY 40000
#define BT_8703B_1ANT_ANTDET_ENABLE 0
#define BT_8703B_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE 0
#define BT_8703B_1ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT 30000
enum bt_8703b_1ant_signal_state {
BT_8703B_1ANT_SIG_STA_SET_TO_LOW = 0x0,
BT_8703B_1ANT_SIG_STA_SET_BY_HW = 0x0,
BT_8703B_1ANT_SIG_STA_SET_TO_HIGH = 0x1,
BT_8703B_1ANT_SIG_STA_MAX
};
enum bt_8703b_1ant_path_ctrl_owner {
BT_8703B_1ANT_PCO_BTSIDE = 0x0,
BT_8703B_1ANT_PCO_WLSIDE = 0x1,
BT_8703B_1ANT_PCO_MAX
};
enum bt_8703b_1ant_gnt_ctrl_type {
BT_8703B_1ANT_GNT_TYPE_CTRL_BY_PTA = 0x0,
BT_8703B_1ANT_GNT_TYPE_CTRL_BY_SW = 0x1,
BT_8703B_1ANT_GNT_TYPE_MAX
};
enum bt_8703b_1ant_gnt_ctrl_block {
BT_8703B_1ANT_GNT_BLOCK_RFC_BB = 0x0,
BT_8703B_1ANT_GNT_BLOCK_RFC = 0x1,
BT_8703B_1ANT_GNT_BLOCK_BB = 0x2,
BT_8703B_1ANT_GNT_BLOCK_MAX
};
enum bt_8703b_1ant_lte_coex_table_type {
BT_8703B_1ANT_CTT_WL_VS_LTE = 0x0,
BT_8703B_1ANT_CTT_BT_VS_LTE = 0x1,
BT_8703B_1ANT_CTT_MAX
};
enum bt_8703b_1ant_lte_break_table_type {
BT_8703B_1ANT_LBTT_WL_BREAK_LTE = 0x0,
BT_8703B_1ANT_LBTT_BT_BREAK_LTE = 0x1,
BT_8703B_1ANT_LBTT_LTE_BREAK_WL = 0x2,
BT_8703B_1ANT_LBTT_LTE_BREAK_BT = 0x3,
BT_8703B_1ANT_LBTT_MAX
};
enum bt_info_src_8703b_1ant {
BT_INFO_SRC_8703B_1ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8703B_1ANT_BT_RSP = 0x1,
BT_INFO_SRC_8703B_1ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8703B_1ANT_MAX
};
enum bt_8703b_1ant_bt_status {
BT_8703B_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8703B_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8703B_1ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8703B_1ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8703B_1ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8703B_1ANT_BT_STATUS_MAX
};
enum bt_8703b_1ant_wifi_status {
BT_8703B_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8703B_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1,
BT_8703B_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2,
BT_8703B_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT = 0x3,
BT_8703B_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4,
BT_8703B_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5,
BT_8703B_1ANT_WIFI_STATUS_MAX
};
enum bt_8703b_1ant_coex_algo {
BT_8703B_1ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8703B_1ANT_COEX_ALGO_SCO = 0x1,
BT_8703B_1ANT_COEX_ALGO_HID = 0x2,
BT_8703B_1ANT_COEX_ALGO_A2DP = 0x3,
BT_8703B_1ANT_COEX_ALGO_A2DP_PANHS = 0x4,
BT_8703B_1ANT_COEX_ALGO_PANEDR = 0x5,
BT_8703B_1ANT_COEX_ALGO_PANHS = 0x6,
BT_8703B_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
BT_8703B_1ANT_COEX_ALGO_PANEDR_HID = 0x8,
BT_8703B_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
BT_8703B_1ANT_COEX_ALGO_HID_A2DP = 0xa,
BT_8703B_1ANT_COEX_ALGO_MAX = 0xb,
};
enum bt_8703b_1ant_phase {
BT_8703B_1ANT_PHASE_COEX_INIT = 0x0,
BT_8703B_1ANT_PHASE_WLANONLY_INIT = 0x1,
BT_8703B_1ANT_PHASE_WLAN_OFF = 0x2,
BT_8703B_1ANT_PHASE_2G_RUNTIME = 0x3,
BT_8703B_1ANT_PHASE_5G_RUNTIME = 0x4,
BT_8703B_1ANT_PHASE_BTMPMODE = 0x5,
BT_8703B_1ANT_PHASE_ANTENNA_DET = 0x6,
BT_8703B_1ANT_PHASE_MAX
};
enum bt_8703b_1ant_Scoreboard {
BT_8703B_1ANT_SCOREBOARD_ACTIVE = BIT(0),
BT_8703B_1ANT_SCOREBOARD_ONOFF = BIT(1),
BT_8703B_1ANT_SCOREBOARD_SCAN = BIT(2),
BT_8703B_1ANT_SCOREBOARD_UNDERTEST = BIT(3),
BT_8703B_1ANT_SCOREBOARD_WLBUSY = BIT(6)
};
struct coex_dm_8703b_1ant {
/* hw setting */
u8 pre_ant_pos_type;
u8 cur_ant_pos_type;
/* fw mechanism */
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean auto_tdma_adjust;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
/* sw mechanism */
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
boolean limited_dig;
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
u16 backup_retry_limit;
u8 backup_ampdu_max_time;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
u32 pre_ra_mask;
u32 cur_ra_mask;
u8 pre_arfr_type;
u8 cur_arfr_type;
u8 pre_retry_limit_type;
u8 cur_retry_limit_type;
u8 pre_ampdu_time_type;
u8 cur_ampdu_time_type;
u32 arp_cnt;
u8 error_condition;
};
struct coex_sta_8703b_1ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean bt_hi_pri_link_exist;
u8 num_of_profile;
boolean under_lps;
boolean under_ips;
u32 specific_pkt_period_cnt;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
boolean is_hiPri_rx_overhead;
s8 bt_rssi;
boolean bt_tx_rx_mask;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
u8 bt_info_c2h[BT_INFO_SRC_8703B_1ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8703B_1ANT_MAX];
boolean bt_whck_test;
boolean c2h_bt_inquiry_page;
boolean c2h_bt_remote_name_req;
boolean c2h_bt_page; /* Add for win8.1 page out issue */
boolean wifi_is_high_pri_task; /* Add for win8.1 page out issue */
u8 bt_retry_cnt;
u8 bt_info_ext;
u8 bt_info_ext2;
u32 pop_event_cnt;
u8 scan_ap_num;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_vht;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_vht;
boolean cck_lock;
boolean cck_lock_ever;
boolean cck_lock_warn;
u8 coex_table_type;
boolean force_lps_ctrl;
boolean concurrent_rx_mode_on;
u16 score_board;
u8 isolation_btween_wb; /* 0~ 50 */
u8 a2dp_bit_pool;
u8 cut_version;
boolean acl_busy;
boolean bt_create_connection;
u32 bt_coex_supported_feature;
u32 bt_coex_supported_version;
u8 bt_ble_scan_type;
u32 bt_ble_scan_para[3];
boolean run_time_state;
boolean freeze_coexrun_by_btinfo;
boolean is_A2DP_3M;
boolean voice_over_HOGP;
u8 bt_info;
boolean is_autoslot;
u8 forbidden_slot;
u8 hid_busy_num;
u8 hid_pair_cnt;
u32 cnt_RemoteNameReq;
u32 cnt_setupLink;
u32 cnt_ReInit;
u32 cnt_IgnWlanAct;
u32 cnt_Page;
u32 cnt_RoleSwitch;
u16 bt_reg_vendor_ac;
u16 bt_reg_vendor_ae;
boolean is_setupLink;
u8 wl_noisy_level;
u32 gnt_error_cnt;
u8 bt_afh_map[10];
u8 bt_relink_downcount;
boolean is_tdma_btautoslot;
boolean is_tdma_btautoslot_hang;
boolean is_rf_state_off;
boolean is_hid_low_pri_tx_overhead;
boolean is_bt_multi_link;
boolean is_bt_a2dp_sink;
u8 wl_fw_dbg_info[10];
u8 wl_rx_rate;
u8 wl_rts_rx_rate;
u16 score_board_WB;
boolean is_hid_rcu;
u16 legacy_forbidden_slot;
u16 le_forbidden_slot;
u8 bt_a2dp_vendor_id;
u32 bt_a2dp_device_name;
boolean is_ble_scan_toggle;
boolean is_bt_opp_exist;
};
#define BT_8703B_1ANT_ANTDET_PSD_POINTS 256 /* MAX:1024 */
#define BT_8703B_1ANT_ANTDET_PSD_AVGNUM 1 /* MAX:3 */
#define BT_8703B_1ANT_ANTDET_BUF_LEN 16
struct psdscan_sta_8703b_1ant {
u32 ant_det_bt_le_channel; /* BT LE Channel ex:2412 */
u32 ant_det_bt_tx_time;
u32 ant_det_pre_psdscan_peak_val;
boolean ant_det_is_ant_det_available;
u32 ant_det_psd_scan_peak_val;
boolean ant_det_is_btreply_available;
u32 ant_det_psd_scan_peak_freq;
u8 ant_det_result;
u8 ant_det_peak_val[BT_8703B_1ANT_ANTDET_BUF_LEN];
u8 ant_det_peak_freq[BT_8703B_1ANT_ANTDET_BUF_LEN];
u32 ant_det_try_count;
u32 ant_det_fail_count;
u32 ant_det_inteval_count;
u32 ant_det_thres_offset;
u32 real_cent_freq;
s32 real_offset;
u32 real_span;
u32 psd_band_width; /* unit: Hz */
u32 psd_point; /* 128/256/512/1024 */
u32 psd_report[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_report_max_hold[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_start_point;
u32 psd_stop_point;
u32 psd_max_value_point;
u32 psd_max_value;
u32 psd_start_base;
u32 psd_avg_num; /* 1/8/16/32 */
u32 psd_gen_count;
boolean is_psd_running;
boolean is_psd_show_max_only;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8703b1ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8703b1ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
void ex_halbtc8703b1ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8703b1ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8703b1ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8703b1ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8703b1ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8703b1ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8703b1ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8703b1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8703b1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8703b1ant_wl_fwdbginfo_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8703b1ant_rx_rate_change_notify(IN struct btc_coexist *btcoexist,
IN BOOLEAN is_data_frame, IN u8 btc_rate_id);
void ex_halbtc8703b1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8703b1ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8703b1ant_pnp_notify(IN struct btc_coexist *btcoexist,
IN u8 pnp_state);
void ex_halbtc8703b1ant_coex_dm_reset(IN struct btc_coexist *btcoexist);
void ex_halbtc8703b1ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8703b1ant_display_coex_info(IN struct btc_coexist *btcoexist);
void ex_halbtc8703b1ant_antenna_detection(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8703b1ant_antenna_isolation(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8703b1ant_psd_scan(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8703b1ant_display_ant_detection(IN struct btc_coexist *btcoexist);
#else
#define ex_halbtc8703b1ant_power_on_setting(btcoexist)
#define ex_halbtc8703b1ant_pre_load_firmware(btcoexist)
#define ex_halbtc8703b1ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8703b1ant_init_coex_dm(btcoexist)
#define ex_halbtc8703b1ant_ips_notify(btcoexist, type)
#define ex_halbtc8703b1ant_lps_notify(btcoexist, type)
#define ex_halbtc8703b1ant_scan_notify(btcoexist, type)
#define ex_halbtc8703b1ant_connect_notify(btcoexist, type)
#define ex_halbtc8703b1ant_media_status_notify(btcoexist, type)
#define ex_halbtc8703b1ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8703b1ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8703b1ant_wl_fwdbginfo_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8703b1ant_rx_rate_change_notify(btcoexist, is_data_frame, btc_rate_id)
#define ex_halbtc8703b1ant_rf_status_notify(btcoexist, type)
#define ex_halbtc8703b1ant_halt_notify(btcoexist)
#define ex_halbtc8703b1ant_pnp_notify(btcoexist, pnp_state)
#define ex_halbtc8703b1ant_coex_dm_reset(btcoexist)
#define ex_halbtc8703b1ant_periodical(btcoexist)
#define ex_halbtc8703b1ant_display_coex_info(btcoexist)
#define ex_halbtc8703b1ant_antenna_detection(btcoexist, cent_freq, offset, span, seconds)
#define ex_halbtc8703b1ant_antenna_isolation(btcoexist, cent_freq, offset, span, seconds)
#define ex_halbtc8703b1ant_psd_scan(btcoexist, cent_freq, offset, span, seconds)
#define ex_halbtc8703b1ant_display_ant_detection(btcoexist)
#endif
#endif

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/******************************************************************************
*
* Copyright(c) 2016 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8723B_SUPPORT == 1)
/* *******************************************
* The following is for 8723B 1ANT BT Co-exist definition
* ******************************************* */
#define BT_AUTO_REPORT_ONLY_8723B_1ANT 1
#define BT_INFO_8723B_1ANT_B_FTP BIT(7)
#define BT_INFO_8723B_1ANT_B_A2DP BIT(6)
#define BT_INFO_8723B_1ANT_B_HID BIT(5)
#define BT_INFO_8723B_1ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8723B_1ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8723B_1ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8723B_1ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8723B_1ANT_B_CONNECTION BIT(0)
#define BT_INFO_8723B_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \
(((_BT_INFO_EXT_&BIT(0))) ? true : false)
#define BTC_RSSI_COEX_THRESH_TOL_8723B_1ANT 2
#define BT_8723B_1ANT_WIFI_NOISY_THRESH 50 /* 30 /max: 255 */
/* for Antenna detection */
#define BT_8723B_1ANT_ANTDET_PSDTHRES_BACKGROUND 50
#define BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70
#define BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 48
#define BT_8723B_1ANT_ANTDET_PSDTHRES_1ANT 32
#define BT_8723B_1ANT_ANTDET_RETRY_INTERVAL 10 /* retry timer if ant det is fail, unit: second */
#define BT_8723B_1ANT_ANTDET_SWEEPPOINT_DELAY 40000
#define BT_8723B_1ANT_ANTDET_ENABLE 1
#define BT_8723B_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE 1
#define BT_8723B_1ANT_ANTDET_BTTXTIME 100
#define BT_8723B_1ANT_ANTDET_BTTXCHANNEL 39
enum bt_info_src_8723b_1ant {
BT_INFO_SRC_8723B_1ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8723B_1ANT_BT_RSP = 0x1,
BT_INFO_SRC_8723B_1ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8723B_1ANT_MAX
};
enum bt_8723b_1ant_bt_status {
BT_8723B_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8723B_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8723B_1ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8723B_1ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8723B_1ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8723B_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8723B_1ANT_BT_STATUS_MAX
};
enum bt_8723b_1ant_wifi_status {
BT_8723B_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8723B_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1,
BT_8723B_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2,
BT_8723B_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT = 0x3,
BT_8723B_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4,
BT_8723B_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5,
BT_8723B_1ANT_WIFI_STATUS_MAX
};
enum bt_8723b_1ant_coex_algo {
BT_8723B_1ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8723B_1ANT_COEX_ALGO_SCO = 0x1,
BT_8723B_1ANT_COEX_ALGO_HID = 0x2,
BT_8723B_1ANT_COEX_ALGO_A2DP = 0x3,
BT_8723B_1ANT_COEX_ALGO_A2DP_PANHS = 0x4,
BT_8723B_1ANT_COEX_ALGO_PANEDR = 0x5,
BT_8723B_1ANT_COEX_ALGO_PANHS = 0x6,
BT_8723B_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
BT_8723B_1ANT_COEX_ALGO_PANEDR_HID = 0x8,
BT_8723B_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
BT_8723B_1ANT_COEX_ALGO_HID_A2DP = 0xa,
BT_8723B_1ANT_COEX_ALGO_MAX = 0xb,
};
struct coex_dm_8723b_1ant {
/* hw setting */
u8 pre_ant_pos_type;
u8 cur_ant_pos_type;
/* fw mechanism */
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean auto_tdma_adjust;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
/* sw mechanism */
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
u16 backup_retry_limit;
u8 backup_ampdu_max_time;
/* algorithm related */
u8 bt_status;
u8 wifi_chnl_info[3];
u32 pre_ra_mask;
u32 cur_ra_mask;
u8 pre_arfr_type;
u8 cur_arfr_type;
u8 pre_retry_limit_type;
u8 cur_retry_limit_type;
u8 pre_ampdu_time_type;
u8 cur_ampdu_time_type;
u32 arp_cnt;
u8 error_condition;
};
struct coex_sta_8723b_1ant {
boolean bt_disabled;
boolean bt_enable_disable_change;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean bt_hi_pri_link_exist;
u8 num_of_profile;
boolean bt_abnormal_scan;
boolean under_lps;
boolean under_ips;
u32 specific_pkt_period_cnt;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
s8 bt_rssi;
boolean bt_tx_rx_mask;
boolean c2h_bt_info_req_sent;
u8 bt_info_c2h[BT_INFO_SRC_8723B_1ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8723B_1ANT_MAX];
boolean bt_whck_test;
boolean c2h_bt_inquiry_page;
boolean c2h_bt_remote_name_req;
boolean wifi_is_high_pri_task; /* Add for win8.1 page out issue */
u8 bt_retry_cnt;
u8 bt_info_ext;
u32 pop_event_cnt;
u8 scan_ap_num;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_vht;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_vht;
boolean cck_lock;
boolean pre_ccklock;
boolean cck_ever_lock;
u8 coex_table_type;
boolean force_lps_on;
u32 wrong_profile_notification;
u32 bt_coex_supported_version;
u8 a2dp_bit_pool;
u8 cut_version;
u8 hid_busy_num;
u8 bt_info_ext2;
};
#define BT_8723B_1ANT_ANTDET_PSD_POINTS 256 /* MAX:1024 */
#define BT_8723B_1ANT_ANTDET_PSD_AVGNUM 1 /* MAX:3 */
#define BT_8723B_1ANT_ANTDET_BUF_LEN 16
struct psdscan_sta_8723b_1ant {
u32 ant_det_bt_le_channel; /* BT LE Channel ex:2412 */
u32 ant_det_bt_tx_time;
u32 ant_det_pre_psdscan_peak_val;
boolean ant_det_is_ant_det_available;
u32 ant_det_psd_scan_peak_val;
boolean ant_det_is_btreply_available;
u32 ant_det_psd_scan_peak_freq;
u8 ant_det_result;
u8 ant_det_peak_val[BT_8723B_1ANT_ANTDET_BUF_LEN];
u8 ant_det_peak_freq[BT_8723B_1ANT_ANTDET_BUF_LEN];
u32 ant_det_try_count;
u32 ant_det_fail_count;
u32 ant_det_inteval_count;
u32 ant_det_thres_offset;
u32 real_cent_freq;
s32 real_offset;
u32 real_span;
u32 psd_band_width; /* unit: Hz */
u32 psd_point; /* 128/256/512/1024 */
u32 psd_report[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_report_max_hold[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_start_point;
u32 psd_stop_point;
u32 psd_max_value_point;
u32 psd_max_value;
u32 psd_start_base;
u32 psd_avg_num; /* 1/8/16/32 */
u32 psd_gen_count;
boolean is_psd_running;
boolean is_psd_show_max_only;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8723b1ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8723b1ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
void ex_halbtc8723b1ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8723b1ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8723b1ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b1ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b1ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b1ant_set_antenna_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b1ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b1ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8723b1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b1ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8723b1ant_pnp_notify(IN struct btc_coexist *btcoexist,
IN u8 pnp_state);
void ex_halbtc8723b1ant_coex_dm_reset(IN struct btc_coexist *btcoexist);
void ex_halbtc8723b1ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8723b1ant_display_coex_info(IN struct btc_coexist *btcoexist);
void ex_halbtc8723b1ant_antenna_detection(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8723b1ant_display_ant_detection(IN struct btc_coexist *btcoexist);
#else
#define ex_halbtc8723b1ant_power_on_setting(btcoexist)
#define ex_halbtc8723b1ant_pre_load_firmware(btcoexist)
#define ex_halbtc8723b1ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8723b1ant_init_coex_dm(btcoexist)
#define ex_halbtc8723b1ant_ips_notify(btcoexist, type)
#define ex_halbtc8723b1ant_lps_notify(btcoexist, type)
#define ex_halbtc8723b1ant_scan_notify(btcoexist, type)
#define ex_halbtc8723b1ant_set_antenna_notify(btcoexist, type)
#define ex_halbtc8723b1ant_connect_notify(btcoexist, type)
#define ex_halbtc8723b1ant_media_status_notify(btcoexist, type)
#define ex_halbtc8723b1ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8723b1ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8723b1ant_rf_status_notify(btcoexist, type)
#define ex_halbtc8723b1ant_halt_notify(btcoexist)
#define ex_halbtc8723b1ant_pnp_notify(btcoexist, pnp_state)
#define ex_halbtc8723b1ant_coex_dm_reset(btcoexist)
#define ex_halbtc8723b1ant_periodical(btcoexist)
#define ex_halbtc8723b1ant_display_coex_info(btcoexist)
#define ex_halbtc8723b1ant_antenna_detection(btcoexist, cent_freq, offset, span, seconds)
#define ex_halbtc8723b1ant_display_ant_detection(btcoexist)
#endif
#endif

5070
hal/btc/halbtc8723b2ant.c 100644
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233
hal/btc/halbtc8723b2ant.h 100644
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@ -0,0 +1,233 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8723B_SUPPORT == 1)
/* *******************************************
* The following is for 8723B 2Ant BT Co-exist definition
* ******************************************* */
#define BT_AUTO_REPORT_ONLY_8723B_2ANT 1
#define BT_INFO_8723B_2ANT_B_FTP BIT(7)
#define BT_INFO_8723B_2ANT_B_A2DP BIT(6)
#define BT_INFO_8723B_2ANT_B_HID BIT(5)
#define BT_INFO_8723B_2ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8723B_2ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8723B_2ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8723B_2ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8723B_2ANT_B_CONNECTION BIT(0)
#define BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT 2
#define BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES 42 /* WiFi RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation */
#define BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES 46 /* BT RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation */
enum bt_info_src_8723b_2ant {
BT_INFO_SRC_8723B_2ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8723B_2ANT_BT_RSP = 0x1,
BT_INFO_SRC_8723B_2ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8723B_2ANT_MAX
};
enum bt_8723b_2ant_bt_status {
BT_8723B_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8723B_2ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8723B_2ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8723B_2ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8723B_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8723B_2ANT_BT_STATUS_MAX
};
enum bt_8723b_2ant_coex_algo {
BT_8723B_2ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8723B_2ANT_COEX_ALGO_SCO = 0x1,
BT_8723B_2ANT_COEX_ALGO_HID = 0x2,
BT_8723B_2ANT_COEX_ALGO_A2DP = 0x3,
BT_8723B_2ANT_COEX_ALGO_A2DP_PANHS = 0x4,
BT_8723B_2ANT_COEX_ALGO_PANEDR = 0x5,
BT_8723B_2ANT_COEX_ALGO_PANHS = 0x6,
BT_8723B_2ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
BT_8723B_2ANT_COEX_ALGO_PANEDR_HID = 0x8,
BT_8723B_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
BT_8723B_2ANT_COEX_ALGO_HID_A2DP = 0xa,
BT_8723B_2ANT_COEX_ALGO_MAX = 0xb,
};
struct coex_dm_8723b_2ant {
/* fw mechanism */
u8 pre_bt_dec_pwr_lvl;
u8 cur_bt_dec_pwr_lvl;
u8 pre_fw_dac_swing_lvl;
u8 cur_fw_dac_swing_lvl;
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean reset_tdma_adjust;
boolean auto_tdma_adjust;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
/* sw mechanism */
boolean pre_rf_rx_lpf_shrink;
boolean cur_rf_rx_lpf_shrink;
u32 bt_rf_0x1e_backup;
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
boolean pre_dac_swing_on;
u32 pre_dac_swing_lvl;
boolean cur_dac_swing_on;
u32 cur_dac_swing_lvl;
boolean pre_adc_back_off;
boolean cur_adc_back_off;
boolean pre_agc_table_en;
boolean cur_agc_table_en;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
boolean limited_dig;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
boolean need_recover0x948;
u32 backup0x948;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
boolean is_switch_to_1dot5_ant;
u8 switch_thres_offset;
};
struct coex_sta_8723b_2ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean bt_abnormal_scan;
boolean under_lps;
boolean under_ips;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
u8 bt_rssi;
boolean bt_tx_rx_mask;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
boolean c2h_bt_info_req_sent;
u8 bt_info_c2h[BT_INFO_SRC_8723B_2ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8723B_2ANT_MAX];
boolean bt_whck_test;
boolean c2h_bt_inquiry_page;
boolean c2h_bt_remote_name_req;
u8 bt_retry_cnt;
u8 bt_info_ext;
u32 pop_event_cnt;
u8 scan_ap_num;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_vht;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_vht;
u32 bt_coex_supported_version;
u8 coex_table_type;
boolean force_lps_on;
u8 dis_ver_info_cnt;
u8 a2dp_bit_pool;
u8 cut_version;
u8 hid_busy_num;
u8 bt_info_ext2;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8723b2ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8723b2ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
void ex_halbtc8723b2ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8723b2ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8723b2ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b2ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b2ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b2ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b2ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8723b2ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8723b2ant_pnp_notify(IN struct btc_coexist *btcoexist,
IN u8 pnp_state);
void ex_halbtc8723b2ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8723b2ant_display_coex_info(IN struct btc_coexist *btcoexist);
#else
#define ex_halbtc8723b2ant_power_on_setting(btcoexist)
#define ex_halbtc8723b2ant_pre_load_firmware(btcoexist)
#define ex_halbtc8723b2ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8723b2ant_init_coex_dm(btcoexist)
#define ex_halbtc8723b2ant_ips_notify(btcoexist, type)
#define ex_halbtc8723b2ant_lps_notify(btcoexist, type)
#define ex_halbtc8723b2ant_scan_notify(btcoexist, type)
#define ex_halbtc8723b2ant_connect_notify(btcoexist, type)
#define ex_halbtc8723b2ant_media_status_notify(btcoexist, type)
#define ex_halbtc8723b2ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8723b2ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8723b2ant_halt_notify(btcoexist)
#define ex_halbtc8723b2ant_pnp_notify(btcoexist, pnp_state)
#define ex_halbtc8723b2ant_periodical(btcoexist)
#define ex_halbtc8723b2ant_display_coex_info(btcoexist)
#endif
#endif

82
hal/btc/halbtc8723bwifionly.c 100644
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@ -0,0 +1,82 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#include "mp_precomp.h"
VOID
ex_hal8723b_wifi_only_hw_config(
IN struct wifi_only_cfg *pwifionlycfg
)
{
struct wifi_only_haldata *pwifionly_haldata = &pwifionlycfg->haldata_info;
halwifionly_write1byte(pwifionlycfg, 0x778, 0x3); /* Set pta for wifi first priority, 0x1 need to reference pta table to determine wifi and bt priority */
halwifionly_bitmaskwrite1byte(pwifionlycfg, 0x40, 0x20, 0x1);
/* Set Antenna path to Wifi */
halwifionly_write2byte(pwifionlycfg, 0x0765, 0x8); /* Set pta for wifi first priority, 0x0 need to reference pta table to determine wifi and bt priority */
halwifionly_write2byte(pwifionlycfg, 0x076e, 0xc);
halwifionly_write4byte(pwifionlycfg, 0x000006c0, 0xaaaaaaaa); /* pta table, 0xaaaaaaaa means wifi is higher priority than bt */
halwifionly_write4byte(pwifionlycfg, 0x000006c4, 0xaaaaaaaa);
halwifionly_bitmaskwrite1byte(pwifionlycfg, 0x67, 0x20, 0x1); /* BT select s0/s1 is controlled by WiFi */
/* 0x948 setting */
if (pwifionlycfg->chip_interface == WIFIONLY_INTF_PCI) {
/* HP Foxconn NGFF at S0
not sure HP pg correct or not(EEPROMBluetoothSingleAntPath), so here we just write
0x948=0x280 for HP HW id NIC. */
if (pwifionly_haldata->customer_id == CUSTOMER_HP_1) {
halwifionly_write4byte(pwifionlycfg, 0x948, 0x280);
halwifionly_phy_set_rf_reg(pwifionlycfg, 0, 0x1, 0xfffff, 0x0); /* WiFi TRx Mask off */
return;
}
}
if (pwifionly_haldata->efuse_pg_antnum == 2) {
halwifionly_write4byte(pwifionlycfg, 0x948, 0x0);
} else {
/* 3Attention !!! For 8723BU !!!!
For 8723BU single ant case: jira [USB-1237]
Because of 8723BU S1 has HW problem, we only can use S0 instead.
Whether Efuse 0xc3 [6] is 0 or 1, we should always use S0 and write 0x948 to 80/280
--------------------------------------------------
BT Team :
When in Single Ant case, Reg[0x948] has two case : 0x80 or 0x200
When in Two Ant case, Reg[0x948] has two case : 0x280 or 0x0
Efuse 0xc3 [6] Antenna Path
0xc3 [6] = 0 ==> S1 ==> 0x948 = 0/40/200
0xc3 [6] = 1 ==> S0 ==> 0x948 = 80/240/280 */
if (pwifionlycfg->chip_interface == WIFIONLY_INTF_USB)
halwifionly_write4byte(pwifionlycfg, 0x948, 0x80);
else {
if (pwifionly_haldata->efuse_pg_antpath == 0)
halwifionly_write4byte(pwifionlycfg, 0x948, 0x0);
else
halwifionly_write4byte(pwifionlycfg, 0x948, 0x280);
}
}
/* after 8723B F-cut, TRx Mask should be set when 0x948=0x0 or 0x280
PHY_SetRFReg(Adapter, 0, 0x1, 0xfffff, 0x780); WiFi TRx Mask on */
halwifionly_phy_set_rf_reg(pwifionlycfg, 0, 0x1, 0xfffff, 0x0); /*WiFi TRx Mask off */
}

19
platform/platform_zte_zx296716_sdio.h → hal/btc/halbtc8723bwifionly.h
View File

@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation.
* Copyright(c) 2016 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@ -12,14 +12,11 @@
* more details.
*
*****************************************************************************/
#ifndef __PLATFORM_ZTE_ZX296716_SDIO_H__
#define __PLATFORM_ZTE_ZX296716_SDIO_H__
#ifndef __INC_HAL8723BWIFIONLYHWCFG_H
#define __INC_HAL8723BWIFIONLYHWCFG_H
extern void sdio_reinit(void);
extern void extern_wifi_set_enable(int val);
#ifdef CONFIG_A16T03_BOARD
extern int sdio_host_is_null(void);
extern void remove_card(void);
#endif /* CONFIG_A16T03_BOARD */
#endif /* __PLATFORM_ZTE_ZX296716_SDIO_H__ */
VOID
ex_hal8723b_wifi_only_hw_config(
IN struct wifi_only_cfg *pwifionlycfg
);
#endif

6587
hal/btc/halbtc8723d1ant.c 100644
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hal/btc/halbtc8723d1ant.h 100644
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/******************************************************************************
*
* Copyright(c) 2016 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8723D_SUPPORT == 1)
/* *******************************************
* The following is for 8723D 1ANT BT Co-exist definition
* ******************************************* */
#define BT_8723D_1ANT_COEX_DBG 0
#define BT_AUTO_REPORT_ONLY_8723D_1ANT 1
#define BT_INFO_8723D_1ANT_B_FTP BIT(7)
#define BT_INFO_8723D_1ANT_B_A2DP BIT(6)
#define BT_INFO_8723D_1ANT_B_HID BIT(5)
#define BT_INFO_8723D_1ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8723D_1ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8723D_1ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8723D_1ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8723D_1ANT_B_CONNECTION BIT(0)
#define BT_INFO_8723D_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \
(((_BT_INFO_EXT_&BIT(0))) ? TRUE : FALSE)
#define BTC_RSSI_COEX_THRESH_TOL_8723D_1ANT 2
#define BT_8723D_1ANT_WIFI_NOISY_THRESH 30 /* max: 255 */
#define BT_8723D_1ANT_DEFAULT_ISOLATION 15 /* unit: dB */
/* for Antenna detection */
#define BT_8723D_1ANT_ANTDET_PSDTHRES_BACKGROUND 50
#define BT_8723D_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70
#define BT_8723D_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 55
#define BT_8723D_1ANT_ANTDET_PSDTHRES_1ANT 35
#define BT_8723D_1ANT_ANTDET_RETRY_INTERVAL 10 /* retry timer if ant det is fail, unit: second */
#define BT_8723D_1ANT_ANTDET_SWEEPPOINT_DELAY 60000
#define BT_8723D_1ANT_ANTDET_ENABLE 1
#define BT_8723D_1ANT_ANTDET_BTTXTIME 100
#define BT_8723D_1ANT_ANTDET_BTTXCHANNEL 39
#define BT_8723D_1ANT_ANTDET_PSD_SWWEEPCOUNT 50
#define BT_8723D_1ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT 30000
enum bt_8723d_1ant_signal_state {
BT_8723D_1ANT_SIG_STA_SET_TO_LOW = 0x0,
BT_8723D_1ANT_SIG_STA_SET_BY_HW = 0x0,
BT_8723D_1ANT_SIG_STA_SET_TO_HIGH = 0x1,
BT_8723D_1ANT_SIG_STA_MAX
};
enum bt_8723d_1ant_path_ctrl_owner {
BT_8723D_1ANT_PCO_BTSIDE = 0x0,
BT_8723D_1ANT_PCO_WLSIDE = 0x1,
BT_8723D_1ANT_PCO_MAX
};
enum bt_8723d_1ant_gnt_ctrl_type {
BT_8723D_1ANT_GNT_TYPE_CTRL_BY_PTA = 0x0,
BT_8723D_1ANT_GNT_TYPE_CTRL_BY_SW = 0x1,
BT_8723D_1ANT_GNT_TYPE_MAX
};
enum bt_8723d_1ant_gnt_ctrl_block {
BT_8723D_1ANT_GNT_BLOCK_RFC_BB = 0x0,
BT_8723D_1ANT_GNT_BLOCK_RFC = 0x1,
BT_8723D_1ANT_GNT_BLOCK_BB = 0x2,
BT_8723D_1ANT_GNT_BLOCK_MAX
};
enum bt_8723d_1ant_lte_coex_table_type {
BT_8723D_1ANT_CTT_WL_VS_LTE = 0x0,
BT_8723D_1ANT_CTT_BT_VS_LTE = 0x1,
BT_8723D_1ANT_CTT_MAX
};
enum bt_8723d_1ant_lte_break_table_type {
BT_8723D_1ANT_LBTT_WL_BREAK_LTE = 0x0,
BT_8723D_1ANT_LBTT_BT_BREAK_LTE = 0x1,
BT_8723D_1ANT_LBTT_LTE_BREAK_WL = 0x2,
BT_8723D_1ANT_LBTT_LTE_BREAK_BT = 0x3,
BT_8723D_1ANT_LBTT_MAX
};
enum bt_info_src_8723d_1ant {
BT_INFO_SRC_8723D_1ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8723D_1ANT_BT_RSP = 0x1,
BT_INFO_SRC_8723D_1ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8723D_1ANT_MAX
};
enum bt_8723d_1ant_bt_status {
BT_8723D_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8723D_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8723D_1ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8723D_1ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8723D_1ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8723D_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8723D_1ANT_BT_STATUS_MAX
};
enum bt_8723d_1ant_wifi_status {
BT_8723D_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8723D_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1,
BT_8723D_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2,
BT_8723D_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT = 0x3,
BT_8723D_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4,
BT_8723D_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5,
BT_8723D_1ANT_WIFI_STATUS_MAX
};
enum bt_8723d_1ant_coex_algo {
BT_8723D_1ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8723D_1ANT_COEX_ALGO_SCO = 0x1,
BT_8723D_1ANT_COEX_ALGO_HID = 0x2,
BT_8723D_1ANT_COEX_ALGO_A2DP = 0x3,
BT_8723D_1ANT_COEX_ALGO_A2DP_PANHS = 0x4,
BT_8723D_1ANT_COEX_ALGO_PANEDR = 0x5,
BT_8723D_1ANT_COEX_ALGO_PANHS = 0x6,
BT_8723D_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
BT_8723D_1ANT_COEX_ALGO_PANEDR_HID = 0x8,
BT_8723D_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
BT_8723D_1ANT_COEX_ALGO_HID_A2DP = 0xa,
BT_8723D_1ANT_COEX_ALGO_MAX = 0xb,
};
enum bt_8723d_1ant_phase {
BT_8723D_1ANT_PHASE_COEX_INIT = 0x0,
BT_8723D_1ANT_PHASE_WLANONLY_INIT = 0x1,
BT_8723D_1ANT_PHASE_WLAN_OFF = 0x2,
BT_8723D_1ANT_PHASE_2G_RUNTIME = 0x3,
BT_8723D_1ANT_PHASE_5G_RUNTIME = 0x4,
BT_8723D_1ANT_PHASE_BTMPMODE = 0x5,
BT_8723D_1ANT_PHASE_ANTENNA_DET = 0x6,
BT_8723D_1ANT_PHASE_COEX_POWERON = 0x7,
BT_8723D_1ANT_PHASE_MAX
};
enum bt_8723d_1ant_Scoreboard {
BT_8723D_1ANT_SCOREBOARD_ACTIVE = BIT(0),
BT_8723D_1ANT_SCOREBOARD_ONOFF = BIT(1),
BT_8723D_1ANT_SCOREBOARD_SCAN = BIT(2),
BT_8723D_1ANT_SCOREBOARD_UNDERTEST = BIT(3),
BT_8723D_1ANT_SCOREBOARD_WLBUSY = BIT(6)
};
struct coex_dm_8723d_1ant {
/* hw setting */
u8 pre_ant_pos_type;
u8 cur_ant_pos_type;
/* fw mechanism */
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
/* sw mechanism */
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
boolean limited_dig;
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
u16 backup_retry_limit;
u8 backup_ampdu_max_time;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
u32 pre_ra_mask;
u32 cur_ra_mask;
u8 pre_arfr_type;
u8 cur_arfr_type;
u8 pre_retry_limit_type;
u8 cur_retry_limit_type;
u8 pre_ampdu_time_type;
u8 cur_ampdu_time_type;
u32 arp_cnt;
u8 error_condition;
};
struct coex_sta_8723d_1ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean bt_hi_pri_link_exist;
u8 num_of_profile;
boolean under_lps;
boolean under_ips;
u32 specific_pkt_period_cnt;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
boolean is_hiPri_rx_overhead;
s8 bt_rssi;
boolean bt_tx_rx_mask;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
u8 bt_info_c2h[BT_INFO_SRC_8723D_1ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8723D_1ANT_MAX];
boolean bt_whck_test;
boolean c2h_bt_inquiry_page;
boolean c2h_bt_remote_name_req;
boolean c2h_bt_page; /* Add for win8.1 page out issue */
boolean wifi_is_high_pri_task; /* Add for win8.1 page out issue */
u8 bt_retry_cnt;
u8 bt_info_ext;
u8 bt_info_ext2;
u32 pop_event_cnt;
u8 scan_ap_num;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_vht;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_vht;
boolean cck_lock;
boolean cck_lock_ever;
boolean cck_lock_warn;
u8 coex_table_type;
boolean force_lps_ctrl;
boolean concurrent_rx_mode_on;
u16 score_board;
u8 isolation_btween_wb; /* 0~ 50 */
u8 a2dp_bit_pool;
u8 cut_version;
boolean acl_busy;
boolean bt_create_connection;
u32 bt_coex_supported_feature;
u32 bt_coex_supported_version;
u8 bt_ble_scan_type;
u32 bt_ble_scan_para[3];
boolean run_time_state;
boolean freeze_coexrun_by_btinfo;
boolean is_A2DP_3M;
boolean voice_over_HOGP;
u8 bt_info;
boolean is_autoslot;
u8 forbidden_slot;
u8 hid_busy_num;
u8 hid_pair_cnt;
u32 cnt_RemoteNameReq;
u32 cnt_setupLink;
u32 cnt_ReInit;
u32 cnt_IgnWlanAct;
u32 cnt_Page;
u32 cnt_RoleSwitch;
u16 bt_reg_vendor_ac;
u16 bt_reg_vendor_ae;
boolean is_setupLink;
u8 wl_noisy_level;
u32 gnt_error_cnt;
u8 bt_afh_map[10];
u8 bt_relink_downcount;
boolean is_tdma_btautoslot;
boolean is_tdma_btautoslot_hang;
boolean is_rf_state_off;
boolean is_hid_low_pri_tx_overhead;
boolean is_bt_multi_link;
boolean is_bt_a2dp_sink;
u8 wl_fw_dbg_info[10];
u8 wl_rx_rate;
u8 wl_rts_rx_rate;
u16 score_board_WB;
boolean is_hid_rcu;
boolean is_ble_scan_toggle;
u16 legacy_forbidden_slot;
u16 le_forbidden_slot;
u8 bt_a2dp_vendor_id;
u32 bt_a2dp_device_name;
boolean is_bt_opp_exist;
};
#define BT_8723D_1ANT_ANTDET_PSD_POINTS 256 /* MAX:1024 */
#define BT_8723D_1ANT_ANTDET_PSD_AVGNUM 1 /* MAX:3 */
#define BT_8723D_1ANT_ANTDET_BUF_LEN 16
struct psdscan_sta_8723d_1ant {
u32 ant_det_bt_le_channel; /* BT LE Channel ex:2412 */
u32 ant_det_bt_tx_time;
u32 ant_det_pre_psdscan_peak_val;
boolean ant_det_is_ant_det_available;
u32 ant_det_psd_scan_peak_val;
boolean ant_det_is_btreply_available;
u32 ant_det_psd_scan_peak_freq;
u8 ant_det_result;
u8 ant_det_peak_val[BT_8723D_1ANT_ANTDET_BUF_LEN];
u8 ant_det_peak_freq[BT_8723D_1ANT_ANTDET_BUF_LEN];
u32 ant_det_try_count;
u32 ant_det_fail_count;
u32 ant_det_inteval_count;
u32 ant_det_thres_offset;
u32 real_cent_freq;
s32 real_offset;
u32 real_span;
u32 psd_band_width; /* unit: Hz */
u32 psd_point; /* 128/256/512/1024 */
u32 psd_report[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_report_max_hold[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_start_point;
u32 psd_stop_point;
u32 psd_max_value_point;
u32 psd_max_value;
u32 psd_max_value2;
u32 psd_avg_value; /* filter loop_max_value that below BT_8723D_1ANT_ANTDET_PSDTHRES_1ANT, and average the rest*/
u32 psd_loop_max_value[BT_8723D_1ANT_ANTDET_PSD_SWWEEPCOUNT]; /*max value in each loop */
u32 psd_start_base;
u32 psd_avg_num; /* 1/8/16/32 */
u32 psd_gen_count;
boolean is_AntDet_running;
boolean is_psd_show_max_only;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8723d1ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8723d1ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
void ex_halbtc8723d1ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8723d1ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8723d1ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d1ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d1ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d1ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d1ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8723d1ant_wl_fwdbginfo_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8723d1ant_rx_rate_change_notify(IN struct btc_coexist *btcoexist,
IN BOOLEAN is_data_frame, IN u8 btc_rate_id);
void ex_halbtc8723d1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d1ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8723d1ant_pnp_notify(IN struct btc_coexist *btcoexist,
IN u8 pnp_state);
void ex_halbtc8723d1ant_coex_dm_reset(IN struct btc_coexist *btcoexist);
void ex_halbtc8723d1ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8723d1ant_set_antenna_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d1ant_display_coex_info(IN struct btc_coexist *btcoexist);
void ex_halbtc8723d1ant_antenna_detection(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8723d1ant_antenna_isolation(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8723d1ant_psd_scan(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8723d1ant_display_ant_detection(IN struct btc_coexist *btcoexist);
#else
#define ex_halbtc8723d1ant_power_on_setting(btcoexist)
#define ex_halbtc8723d1ant_pre_load_firmware(btcoexist)
#define ex_halbtc8723d1ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8723d1ant_init_coex_dm(btcoexist)
#define ex_halbtc8723d1ant_ips_notify(btcoexist, type)
#define ex_halbtc8723d1ant_lps_notify(btcoexist, type)
#define ex_halbtc8723d1ant_scan_notify(btcoexist, type)
#define ex_halbtc8723d1ant_connect_notify(btcoexist, type)
#define ex_halbtc8723d1ant_media_status_notify(btcoexist, type)
#define ex_halbtc8723d1ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8723d1ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8723d1ant_wl_fwdbginfo_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8723d1ant_rx_rate_change_notify(btcoexist, is_data_frame, btc_rate_id)
#define ex_halbtc8723d1ant_rf_status_notify(btcoexist, type)
#define ex_halbtc8723d1ant_halt_notify(btcoexist)
#define ex_halbtc8723d1ant_pnp_notify(btcoexist, pnp_state)
#define ex_halbtc8723d1ant_coex_dm_reset(btcoexist)
#define ex_halbtc8723d1ant_periodical(btcoexist)
#define ex_halbtc8723d1ant_display_coex_info(btcoexist)
#define ex_halbtc8723d1ant_set_antenna_notify(btcoexist, type)
#define ex_halbtc8723d1ant_antenna_detection(btcoexist, cent_freq, offset, span, seconds)
#define ex_halbtc8723d1ant_antenna_isolation(btcoexist, cent_freq, offset, span, seconds)
#define ex_halbtc8723d1ant_psd_scan(btcoexist, cent_freq, offset, span, seconds)
#define ex_halbtc8723d1ant_display_ant_detection(btcoexist)
#endif
#endif

7449
hal/btc/halbtc8723d2ant.c 100644
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hal/btc/halbtc8723d2ant.h 100644
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/******************************************************************************
*
* Copyright(c) 2016 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8723D_SUPPORT == 1)
/* *******************************************
* The following is for 8723D 2Ant BT Co-exist definition
* ******************************************* */
#define BT_8723D_2ANT_COEX_DBG 0
#define BT_AUTO_REPORT_ONLY_8723D_2ANT 1
#define BT_INFO_8723D_2ANT_B_FTP BIT(7)
#define BT_INFO_8723D_2ANT_B_A2DP BIT(6)
#define BT_INFO_8723D_2ANT_B_HID BIT(5)
#define BT_INFO_8723D_2ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8723D_2ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8723D_2ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8723D_2ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8723D_2ANT_B_CONNECTION BIT(0)
#define BTC_RSSI_COEX_THRESH_TOL_8723D_2ANT 2
#define BT_8723D_2ANT_WIFI_RSSI_COEXSWITCH_THRES1 80 /* unit: % WiFi RSSI Threshold for 2-Ant free-run/2-Ant TDMA translation, default = 42 */
#define BT_8723D_2ANT_BT_RSSI_COEXSWITCH_THRES1 80 /* unit: % BT RSSI Threshold for 2-Ant free-run/2-Ant TDMA translation, default = 46 */
#define BT_8723D_2ANT_WIFI_RSSI_COEXSWITCH_THRES2 80 /* unit: % WiFi RSSI Threshold for 1-Ant TDMA/1-Ant PS-TDMA translation, default = 42 */
#define BT_8723D_2ANT_BT_RSSI_COEXSWITCH_THRES2 80 /* unit: % BT RSSI Threshold for 1-Ant TDMA/1-Ant PS-TDMA translation, default = 46 */
#define BT_8723D_2ANT_DEFAULT_ISOLATION 15 /* unit: dB */
#define BT_8723D_2ANT_WIFI_MAX_TX_POWER 15 /* unit: dBm */
#define BT_8723D_2ANT_BT_MAX_TX_POWER 3 /* unit: dBm */
#define BT_8723D_2ANT_WIFI_SIR_THRES1 -15 /* unit: dB */
#define BT_8723D_2ANT_WIFI_SIR_THRES2 -30 /* unit: dB */
#define BT_8723D_2ANT_BT_SIR_THRES1 -15 /* unit: dB */
#define BT_8723D_2ANT_BT_SIR_THRES2 -30 /* unit: dB */
/* for Antenna detection */
#define BT_8723D_2ANT_ANTDET_PSDTHRES_BACKGROUND 50
#define BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70
#define BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 52
#define BT_8723D_2ANT_ANTDET_PSDTHRES_1ANT 40
#define BT_8723D_2ANT_ANTDET_RETRY_INTERVAL 10 /* retry timer if ant det is fail, unit: second */
#define BT_8723D_2ANT_ANTDET_SWEEPPOINT_DELAY 60000
#define BT_8723D_2ANT_ANTDET_ENABLE 1
#define BT_8723D_2ANT_ANTDET_BTTXTIME 100
#define BT_8723D_2ANT_ANTDET_BTTXCHANNEL 39
#define BT_8723D_2ANT_ANTDET_PSD_SWWEEPCOUNT 50
#define BT_8723D_2ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT 30000
enum bt_8723d_2ant_signal_state {
BT_8723D_2ANT_SIG_STA_SET_TO_LOW = 0x0,
BT_8723D_2ANT_SIG_STA_SET_BY_HW = 0x0,
BT_8723D_2ANT_SIG_STA_SET_TO_HIGH = 0x1,
BT_8723D_2ANT_SIG_STA_MAX
};
enum bt_8723d_2ant_path_ctrl_owner {
BT_8723D_2ANT_PCO_BTSIDE = 0x0,
BT_8723D_2ANT_PCO_WLSIDE = 0x1,
BT_8723D_2ANT_PCO_MAX
};
enum bt_8723d_2ant_gnt_ctrl_type {
BT_8723D_2ANT_GNT_TYPE_CTRL_BY_PTA = 0x0,
BT_8723D_2ANT_GNT_TYPE_CTRL_BY_SW = 0x1,
BT_8723D_2ANT_GNT_TYPE_MAX
};
enum bt_8723d_2ant_gnt_ctrl_block {
BT_8723D_2ANT_GNT_BLOCK_RFC_BB = 0x0,
BT_8723D_2ANT_GNT_BLOCK_RFC = 0x1,
BT_8723D_2ANT_GNT_BLOCK_BB = 0x2,
BT_8723D_2ANT_GNT_BLOCK_MAX
};
enum bt_8723d_2ant_lte_coex_table_type {
BT_8723D_2ANT_CTT_WL_VS_LTE = 0x0,
BT_8723D_2ANT_CTT_BT_VS_LTE = 0x1,
BT_8723D_2ANT_CTT_MAX
};
enum bt_8723d_2ant_lte_break_table_type {
BT_8723D_2ANT_LBTT_WL_BREAK_LTE = 0x0,
BT_8723D_2ANT_LBTT_BT_BREAK_LTE = 0x1,
BT_8723D_2ANT_LBTT_LTE_BREAK_WL = 0x2,
BT_8723D_2ANT_LBTT_LTE_BREAK_BT = 0x3,
BT_8723D_2ANT_LBTT_MAX
};
enum bt_info_src_8723d_2ant {
BT_INFO_SRC_8723D_2ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8723D_2ANT_BT_RSP = 0x1,
BT_INFO_SRC_8723D_2ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8723D_2ANT_MAX
};
enum bt_8723d_2ant_bt_status {
BT_8723D_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8723D_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8723D_2ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8723D_2ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8723D_2ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8723D_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8723D_2ANT_BT_STATUS_MAX
};
enum bt_8723d_2ant_coex_algo {
BT_8723D_2ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8723D_2ANT_COEX_ALGO_SCO = 0x1,
BT_8723D_2ANT_COEX_ALGO_HID = 0x2,
BT_8723D_2ANT_COEX_ALGO_A2DP = 0x3,
BT_8723D_2ANT_COEX_ALGO_A2DP_PANHS = 0x4,
BT_8723D_2ANT_COEX_ALGO_PANEDR = 0x5,
BT_8723D_2ANT_COEX_ALGO_PANHS = 0x6,
BT_8723D_2ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
BT_8723D_2ANT_COEX_ALGO_PANEDR_HID = 0x8,
BT_8723D_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
BT_8723D_2ANT_COEX_ALGO_HID_A2DP = 0xa,
BT_8723D_2ANT_COEX_ALGO_NOPROFILEBUSY = 0xb,
BT_8723D_2ANT_COEX_ALGO_A2DPSINK = 0xc,
BT_8723D_2ANT_COEX_ALGO_MAX
};
enum bt_8723d_2ant_phase {
BT_8723D_2ANT_PHASE_COEX_INIT = 0x0,
BT_8723D_2ANT_PHASE_WLANONLY_INIT = 0x1,
BT_8723D_2ANT_PHASE_WLAN_OFF = 0x2,
BT_8723D_2ANT_PHASE_2G_RUNTIME = 0x3,
BT_8723D_2ANT_PHASE_5G_RUNTIME = 0x4,
BT_8723D_2ANT_PHASE_BTMPMODE = 0x5,
BT_8723D_2ANT_PHASE_ANTENNA_DET = 0x6,
BT_8723D_2ANT_PHASE_COEX_POWERON = 0x7,
BT_8723D_2ANT_PHASE_2G_FREERUN = 0x8,
BT_8723D_2ANT_PHASE_MAX
};
enum bt_8723d_2ant_Scoreboard {
BT_8723D_2ANT_SCOREBOARD_ACTIVE = BIT(0),
BT_8723D_2ANT_SCOREBOARD_ONOFF = BIT(1),
BT_8723D_2ANT_SCOREBOARD_SCAN = BIT(2),
BT_8723D_2ANT_SCOREBOARD_UNDERTEST = BIT(3),
BT_8723D_2ANT_SCOREBOARD_RXGAIN = BIT(4),
BT_8723D_2ANT_SCOREBOARD_WLBUSY = BIT(6)
};
struct coex_dm_8723d_2ant {
/* fw mechanism */
u8 pre_bt_dec_pwr_lvl;
u8 cur_bt_dec_pwr_lvl;
u8 pre_fw_dac_swing_lvl;
u8 cur_fw_dac_swing_lvl;
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean reset_tdma_adjust;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
/* sw mechanism */
boolean pre_rf_rx_lpf_shrink;
boolean cur_rf_rx_lpf_shrink;
u32 bt_rf_0x1e_backup;
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
boolean pre_dac_swing_on;
u32 pre_dac_swing_lvl;
boolean cur_dac_swing_on;
u32 cur_dac_swing_lvl;
boolean pre_adc_back_off;
boolean cur_adc_back_off;
boolean pre_agc_table_en;
boolean cur_agc_table_en;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
boolean limited_dig;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
boolean need_recover0x948;
u32 backup0x948;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
boolean is_switch_to_1dot5_ant;
u8 switch_thres_offset;
u32 arp_cnt;
u8 pre_ant_pos_type;
u8 cur_ant_pos_type;
};
struct coex_sta_8723d_2ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean under_lps;
boolean under_ips;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
boolean is_hiPri_rx_overhead;
u8 bt_rssi;
boolean bt_tx_rx_mask;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
u8 bt_info_c2h[BT_INFO_SRC_8723D_2ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8723D_2ANT_MAX];
boolean bt_whck_test;
boolean c2h_bt_inquiry_page;
boolean c2h_bt_remote_name_req;
u8 bt_retry_cnt;
u8 bt_info_ext;
u8 bt_info_ext2;
u32 pop_event_cnt;
u8 scan_ap_num;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_vht;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_vht;
u32 acc_crc_ratio;
u32 now_crc_ratio;
u32 cnt_crcok_max_in_10s;
boolean cck_lock;
boolean cck_lock_ever;
boolean cck_lock_warn;
u8 coex_table_type;
boolean force_lps_ctrl;
u8 dis_ver_info_cnt;
u8 a2dp_bit_pool;
u8 cut_version;
boolean concurrent_rx_mode_on;
u16 score_board;
u8 isolation_btween_wb; /* 0~ 50 */
u8 wifi_coex_thres;
u8 bt_coex_thres;
u8 wifi_coex_thres2;
u8 bt_coex_thres2;
u8 num_of_profile;
boolean acl_busy;
boolean bt_create_connection;
boolean wifi_is_high_pri_task;
u32 specific_pkt_period_cnt;
u32 bt_coex_supported_feature;
u32 bt_coex_supported_version;
u8 bt_ble_scan_type;
u32 bt_ble_scan_para[3];
boolean run_time_state;
boolean freeze_coexrun_by_btinfo;
boolean is_A2DP_3M;
boolean voice_over_HOGP;
u8 bt_info;
boolean is_autoslot;
u8 forbidden_slot;
u8 hid_busy_num;
u8 hid_pair_cnt;
u32 cnt_RemoteNameReq;
u32 cnt_setupLink;
u32 cnt_ReInit;
u32 cnt_IgnWlanAct;
u32 cnt_Page;
u32 cnt_RoleSwitch;
u16 bt_reg_vendor_ac;
u16 bt_reg_vendor_ae;
boolean is_setupLink;
boolean wl_noisy_level;
u32 gnt_error_cnt;
u8 bt_afh_map[10];
u8 bt_relink_downcount;
boolean is_tdma_btautoslot;
boolean is_tdma_btautoslot_hang;
boolean is_eSCO_mode;
boolean is_rf_state_off;
boolean is_hid_low_pri_tx_overhead;
boolean is_bt_multi_link;
boolean is_bt_a2dp_sink;
u8 wl_fw_dbg_info[10];
u8 wl_rx_rate;
u8 wl_rts_rx_rate;
u16 score_board_WB;
boolean is_2g_freerun;
boolean is_hid_rcu;
boolean is_ble_scan_toggle;
u16 legacy_forbidden_slot;
u16 le_forbidden_slot;
u8 bt_a2dp_vendor_id;
u32 bt_a2dp_device_name;
boolean is_bt_opp_exist;
};
#define BT_8723D_2ANT_ANTDET_PSD_POINTS 256 /* MAX:1024 */
#define BT_8723D_2ANT_ANTDET_PSD_AVGNUM 1 /* MAX:3 */
#define BT_8723D_2ANT_ANTDET_BUF_LEN 16
struct psdscan_sta_8723d_2ant {
u32 ant_det_bt_le_channel; /* BT LE Channel ex:2412 */
u32 ant_det_bt_tx_time;
u32 ant_det_pre_psdscan_peak_val;
boolean ant_det_is_ant_det_available;
u32 ant_det_psd_scan_peak_val;
boolean ant_det_is_btreply_available;
u32 ant_det_psd_scan_peak_freq;
u8 ant_det_result;
u8 ant_det_peak_val[BT_8723D_2ANT_ANTDET_BUF_LEN];
u8 ant_det_peak_freq[BT_8723D_2ANT_ANTDET_BUF_LEN];
u32 ant_det_try_count;
u32 ant_det_fail_count;
u32 ant_det_inteval_count;
u32 ant_det_thres_offset;
u32 real_cent_freq;
s32 real_offset;
u32 real_span;
u32 psd_band_width; /* unit: Hz */
u32 psd_point; /* 128/256/512/1024 */
u32 psd_report[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_report_max_hold[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_start_point;
u32 psd_stop_point;
u32 psd_max_value_point;
u32 psd_max_value;
u32 psd_max_value2;
u32 psd_avg_value; /* filter loop_max_value that below BT_8723D_1ANT_ANTDET_PSDTHRES_1ANT, and average the rest*/
u32 psd_loop_max_value[BT_8723D_2ANT_ANTDET_PSD_SWWEEPCOUNT]; /*max value in each loop */
u32 psd_start_base;
u32 psd_avg_num; /* 1/8/16/32 */
u32 psd_gen_count;
boolean is_AntDet_running;
boolean is_psd_show_max_only;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8723d2ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8723d2ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
void ex_halbtc8723d2ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8723d2ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8723d2ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d2ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d2ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d2ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d2ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8723d2ant_wl_fwdbginfo_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8723d2ant_rx_rate_change_notify(IN struct btc_coexist *btcoexist,
IN BOOLEAN is_data_frame, IN u8 btc_rate_id);
void ex_halbtc8723d2ant_rf_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d2ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8723d2ant_pnp_notify(IN struct btc_coexist *btcoexist,
IN u8 pnp_state);
void ex_halbtc8723d2ant_set_antenna_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d2ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8723d2ant_display_coex_info(IN struct btc_coexist *btcoexist);
void ex_halbtc8723d2ant_antenna_detection(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8723d2ant_display_ant_detection(IN struct btc_coexist *btcoexist);
#else
#define ex_halbtc8723d2ant_power_on_setting(btcoexist)
#define ex_halbtc8723d2ant_pre_load_firmware(btcoexist)
#define ex_halbtc8723d2ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8723d2ant_init_coex_dm(btcoexist)
#define ex_halbtc8723d2ant_ips_notify(btcoexist, type)
#define ex_halbtc8723d2ant_lps_notify(btcoexist, type)
#define ex_halbtc8723d2ant_scan_notify(btcoexist, type)
#define ex_halbtc8723d2ant_connect_notify(btcoexist, type)
#define ex_halbtc8723d2ant_media_status_notify(btcoexist, type)
#define ex_halbtc8723d2ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8723d2ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8723d2ant_wl_fwdbginfo_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8723d2ant_rx_rate_change_notify(btcoexist, is_data_frame, btc_rate_id)
#define ex_halbtc8723d2ant_rf_status_notify(btcoexist, type)
#define ex_halbtc8723d2ant_halt_notify(btcoexist)
#define ex_halbtc8723d2ant_pnp_notify(btcoexist, pnp_state)
#define ex_halbtc8723d2ant_periodical(btcoexist)
#define ex_halbtc8723d2ant_display_coex_info(btcoexist)
#define ex_halbtc8723d2ant_set_antenna_notify(btcoexist, type)
#define ex_halbtc8723d2ant_display_ant_detection(btcoexist)
#define ex_halbtc8723d2ant_antenna_detection(btcoexist, cent_freq, offset, span, seconds)
#endif
#endif

3475
hal/btc/halbtc8812a1ant.c 100644
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244
hal/btc/halbtc8812a1ant.h 100644
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/******************************************************************************
*
* Copyright(c) 2016 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8812A_SUPPORT == 1)
/* *******************************************
* The following is for 8812A 1ANT BT Co-exist definition
* ******************************************* */
#define BT_AUTO_REPORT_ONLY_8812A_1ANT 1
#define BT_INFO_8812A_1ANT_B_FTP BIT(7)
#define BT_INFO_8812A_1ANT_B_A2DP BIT(6)
#define BT_INFO_8812A_1ANT_B_HID BIT(5)
#define BT_INFO_8812A_1ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8812A_1ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8812A_1ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8812A_1ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8812A_1ANT_B_CONNECTION BIT(0)
#define BT_INFO_8812A_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \
(((_BT_INFO_EXT_&BIT(0))) ? true : false)
#define BTC_RSSI_COEX_THRESH_TOL_8812A_1ANT 2
#define BT_8812A_1ANT_WIFI_NOISY_THRESH 30 /* max: 255 */
enum bt_info_src_8812a_1ant {
BT_INFO_SRC_8812A_1ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8812A_1ANT_BT_RSP = 0x1,
BT_INFO_SRC_8812A_1ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8812A_1ANT_MAX
};
enum bt_8812a_1ant_bt_status {
BT_8812A_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8812A_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8812A_1ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8812A_1ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8812A_1ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8812A_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8812A_1ANT_BT_STATUS_MAX
};
enum bt_8812a_1ant_wifi_status {
BT_8812A_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8812A_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1,
BT_8812A_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2,
BT_8812A_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT = 0x3,
BT_8812A_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4,
BT_8812A_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5,
BT_8812A_1ANT_WIFI_STATUS_MAX
};
enum bt_8812a_1ant_coex_algo {
BT_8812A_1ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8812A_1ANT_COEX_ALGO_SCO = 0x1,
BT_8812A_1ANT_COEX_ALGO_HID = 0x2,
BT_8812A_1ANT_COEX_ALGO_A2DP = 0x3,
BT_8812A_1ANT_COEX_ALGO_A2DP_PANHS = 0x4,
BT_8812A_1ANT_COEX_ALGO_PANEDR = 0x5,
BT_8812A_1ANT_COEX_ALGO_PANHS = 0x6,
BT_8812A_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
BT_8812A_1ANT_COEX_ALGO_PANEDR_HID = 0x8,
BT_8812A_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
BT_8812A_1ANT_COEX_ALGO_HID_A2DP = 0xa,
BT_8812A_1ANT_COEX_ALGO_MAX = 0xb,
};
struct coex_dm_8812a_1ant {
/* hw setting */
u8 pre_ant_pos_type;
u8 cur_ant_pos_type;
/* fw mechanism */
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean auto_tdma_adjust;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
/* sw mechanism */
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
boolean limited_dig;
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
u16 backup_retry_limit;
u8 backup_ampdu_max_time;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
u32 pre_ra_mask;
u32 cur_ra_mask;
u8 pre_arfr_type;
u8 cur_arfr_type;
u8 pre_retry_limit_type;
u8 cur_retry_limit_type;
u8 pre_ampdu_time_type;
u8 cur_ampdu_time_type;
u32 arp_cnt;
u8 error_condition;
};
struct coex_sta_8812a_1ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean under_lps;
boolean under_ips;
u32 specific_pkt_period_cnt;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
s8 bt_rssi;
boolean bt_tx_rx_mask;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
boolean c2h_bt_info_req_sent;
u8 bt_info_c2h[BT_INFO_SRC_8812A_1ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8812A_1ANT_MAX];
u32 bt_info_query_cnt;
boolean c2h_bt_inquiry_page;
boolean c2h_bt_page; /* Add for win8.1 page out issue */
boolean wifi_is_high_pri_task; /* Add for win8.1 page out issue */
u8 bt_retry_cnt;
u8 bt_info_ext;
u32 pop_event_cnt;
u8 scan_ap_num;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_agg;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_agg;
boolean cck_lock;
boolean pre_ccklock;
u8 coex_table_type;
boolean force_lps_on;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8812a1ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8812a1ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
void ex_halbtc8812a1ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8812a1ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8812a1ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a1ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a1ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a1ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a1ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8812a1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a1ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8812a1ant_pnp_notify(IN struct btc_coexist *btcoexist,
IN u8 pnp_state);
void ex_halbtc8812a1ant_coex_dm_reset(IN struct btc_coexist *btcoexist);
void ex_halbtc8812a1ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8812a1ant_dbg_control(IN struct btc_coexist *btcoexist,
IN u8 op_code, IN u8 op_len, IN u8 *pdata);
void ex_halbtc8812a1ant_display_coex_info(IN struct btc_coexist *btcoexist);
#else
#define ex_halbtc8812a1ant_power_on_setting(btcoexist)
#define ex_halbtc8812a1ant_pre_load_firmware(btcoexist)
#define ex_halbtc8812a1ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8812a1ant_init_coex_dm(btcoexist)
#define ex_halbtc8812a1ant_ips_notify(btcoexist, type)
#define ex_halbtc8812a1ant_lps_notify(btcoexist, type)
#define ex_halbtc8812a1ant_scan_notify(btcoexist, type)
#define ex_halbtc8812a1ant_connect_notify(btcoexist, type)
#define ex_halbtc8812a1ant_media_status_notify(btcoexist, type)
#define ex_halbtc8812a1ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8812a1ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8812a1ant_rf_status_notify(btcoexist, type)
#define ex_halbtc8812a1ant_halt_notify(btcoexist)
#define ex_halbtc8812a1ant_pnp_notify(btcoexist, pnp_state)
#define ex_halbtc8812a1ant_coex_dm_reset(btcoexist)
#define ex_halbtc8812a1ant_periodical(btcoexist)
#define ex_halbtc8812a1ant_dbg_control(btcoexist, op_code, op_len, pdata)
#define ex_halbtc8812a1ant_display_coex_info(btcoexist)
#endif
#endif

5638
hal/btc/halbtc8812a2ant.c 100644
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hal/btc/halbtc8812a2ant.h 100644
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/******************************************************************************
*
* Copyright(c) 2016 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8812A_SUPPORT == 1)
/* *******************************************
* The following is for 8812A 2Ant BT Co-exist definition
* ******************************************* */
#define BT_AUTO_REPORT_ONLY_8812A_2ANT 0
#define BT_INFO_8812A_2ANT_B_FTP BIT(7)
#define BT_INFO_8812A_2ANT_B_A2DP BIT(6)
#define BT_INFO_8812A_2ANT_B_HID BIT(5)
#define BT_INFO_8812A_2ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8812A_2ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8812A_2ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8812A_2ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8812A_2ANT_B_CONNECTION BIT(0)
#define BT_INFO_8812A_2ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \
(((_BT_INFO_EXT_&BIT(0))) ? true : false)
#define BTC_RSSI_COEX_THRESH_TOL_8812A_2ANT 2
#define NOISY_AP_NUM_THRESH_8812A 50
enum bt_info_src_8812a_2ant {
BT_INFO_SRC_8812A_2ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8812A_2ANT_BT_RSP = 0x1,
BT_INFO_SRC_8812A_2ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8812A_2ANT_MAX
};
enum bt_8812a_2ant_bt_status {
BT_8812A_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8812A_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8812A_2ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8812A_2ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8812A_2ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8812A_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8812A_2ANT_BT_STATUS_MAX
};
enum bt_8812a_2ant_coex_algo {
BT_8812A_2ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8812A_2ANT_COEX_ALGO_SCO = 0x1,
BT_8812A_2ANT_COEX_ALGO_SCO_HID = 0x2,
BT_8812A_2ANT_COEX_ALGO_HID = 0x3,
BT_8812A_2ANT_COEX_ALGO_A2DP = 0x4,
BT_8812A_2ANT_COEX_ALGO_A2DP_PANHS = 0x5,
BT_8812A_2ANT_COEX_ALGO_PANEDR = 0x6,
BT_8812A_2ANT_COEX_ALGO_PANHS = 0x7,
BT_8812A_2ANT_COEX_ALGO_PANEDR_A2DP = 0x8,
BT_8812A_2ANT_COEX_ALGO_PANEDR_HID = 0x9,
BT_8812A_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0xa,
BT_8812A_2ANT_COEX_ALGO_HID_A2DP_PANHS = 0xb,
BT_8812A_2ANT_COEX_ALGO_HID_A2DP = 0xc,
BT_8812A_2ANT_COEX_ALGO_MAX = 0xd
};
struct coex_dm_8812a_2ant {
/* fw mechanism */
u8 pre_bt_dec_pwr_lvl;
u8 cur_bt_dec_pwr_lvl;
u8 pre_fw_dac_swing_lvl;
u8 cur_fw_dac_swing_lvl;
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean auto_tdma_adjust;
boolean auto_tdma_adjust_low_rssi;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
/* sw mechanism */
boolean pre_rf_rx_lpf_shrink;
boolean cur_rf_rx_lpf_shrink;
u32 bt_rf_0x1e_backup;
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
boolean pre_dac_swing_on;
u32 pre_dac_swing_lvl;
boolean cur_dac_swing_on;
u32 cur_dac_swing_lvl;
boolean pre_adc_back_off;
boolean cur_adc_back_off;
boolean pre_agc_table_en;
boolean cur_agc_table_en;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
boolean limited_dig;
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
u16 backup_retry_limit;
u8 backup_ampdu_max_time;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
u32 pre_ra_mask;
u32 cur_ra_mask;
u8 cur_ra_mask_type;
u8 pre_arfr_type;
u8 cur_arfr_type;
u8 pre_retry_limit_type;
u8 cur_retry_limit_type;
u8 pre_ampdu_time_type;
u8 cur_ampdu_time_type;
boolean cur_enable_pta;
boolean pre_enable_pta;
};
struct coex_sta_8812a_2ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean acl_busy;
boolean under_lps;
boolean under_ips;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
u8 bt_rssi;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
boolean c2h_bt_info_req_sent;
u8 bt_info_c2h[BT_INFO_SRC_8812A_2ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8812A_2ANT_MAX];
u32 bt_info_query_cnt;
boolean c2h_bt_inquiry_page;
u8 bt_retry_cnt;
u8 bt_info_ext;
u8 scan_ap_num;
boolean pre_bt_disabled;
u32 pre_bt_info_c2h_cnt_bt_rsp;
u32 pre_bt_info_c2h_cnt_bt_send;
boolean force_lps_on;
u32 bt_coex_supported_version;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_vht;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_vht;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8812a2ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8812a2ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8812a2ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8812a2ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a2ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a2ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a2ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a2ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8812a2ant_rf_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a2ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8812a2ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8812a2ant_display_coex_info(IN struct btc_coexist *btcoexist);
void ex_halbtc8812a2ant_dbg_control(IN struct btc_coexist *btcoexist,
IN u8 op_code, IN u8 op_len, IN u8 *pdata);
void ex_halbtc8812a2ant_pta_off_on_notify(IN struct btc_coexist *btcoexist,
IN u8 bt_status);
#else
#define ex_halbtc8812a2ant_power_on_setting(btcoexist)
#define ex_halbtc8812a2ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8812a2ant_init_coex_dm(btcoexist)
#define ex_halbtc8812a2ant_ips_notify(btcoexist, type)
#define ex_halbtc8812a2ant_lps_notify(btcoexist, type)
#define ex_halbtc8812a2ant_scan_notify(btcoexist, type)
#define ex_halbtc8812a2ant_connect_notify(btcoexist, type)
#define ex_halbtc8812a2ant_media_status_notify(btcoexist, type)
#define ex_halbtc8812a2ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8812a2ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8812a2ant_rf_status_notify(btcoexist, type)
#define ex_halbtc8812a2ant_halt_notify(btcoexist)
#define ex_halbtc8812a2ant_periodical(btcoexist)
#define ex_halbtc8812a2ant_display_coex_info(btcoexist)
#define ex_halbtc8812a2ant_dbg_control(btcoexist, op_code, op_len, pdata)
#define ex_halbtc8812a2ant_pta_off_on_notify(btcoexist, bt_status)
#endif
#endif

5613
hal/btc/halbtc8821c1ant.c 100644
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hal/btc/halbtc8821c1ant.h 100644
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/******************************************************************************
*
* Copyright(c) 2016 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8821C_SUPPORT == 1)
/* *******************************************
* The following is for 8821C 1ANT BT Co-exist definition
* ******************************************* */
#define BT_8821C_1ANT_COEX_DBG 0
#define BT_AUTO_REPORT_ONLY_8821C_1ANT 1
#define BT_INFO_8821C_1ANT_B_FTP BIT(7)
#define BT_INFO_8821C_1ANT_B_A2DP BIT(6)
#define BT_INFO_8821C_1ANT_B_HID BIT(5)
#define BT_INFO_8821C_1ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8821C_1ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8821C_1ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8821C_1ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8821C_1ANT_B_CONNECTION BIT(0)
#define BT_INFO_8821C_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \
(((_BT_INFO_EXT_&BIT(0))) ? TRUE : FALSE)
#define BTC_RSSI_COEX_THRESH_TOL_8821C_1ANT 2
#define BT_8821C_1ANT_WIFI_NOISY_THRESH 30 /* max: 255 */
#define BT_8821C_1ANT_DEFAULT_ISOLATION 15 /* unit: dB */
/* for Antenna detection */
#define BT_8821C_1ANT_ANTDET_PSDTHRES_BACKGROUND 50
#define BT_8821C_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70
#define BT_8821C_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 55
#define BT_8821C_1ANT_ANTDET_PSDTHRES_1ANT 35
#define BT_8821C_1ANT_ANTDET_RETRY_INTERVAL 10 /* retry timer if ant det is fail, unit: second */
#define BT_8821C_1ANT_ANTDET_SWEEPPOINT_DELAY 60000
#define BT_8821C_1ANT_ANTDET_ENABLE 0
#define BT_8821C_1ANT_ANTDET_BTTXTIME 100
#define BT_8821C_1ANT_ANTDET_BTTXCHANNEL 39
#define BT_8821C_1ANT_ANTDET_PSD_SWWEEPCOUNT 50
#define BT_8821C_1ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT 30000
enum bt_8821c_1ant_signal_state {
BT_8821C_1ANT_SIG_STA_SET_TO_LOW = 0x0,
BT_8821C_1ANT_SIG_STA_SET_BY_HW = 0x0,
BT_8821C_1ANT_SIG_STA_SET_TO_HIGH = 0x1,
BT_8821C_1ANT_SIG_STA_MAX
};
enum bt_8821c_1ant_path_ctrl_owner {
BT_8821C_1ANT_PCO_BTSIDE = 0x0,
BT_8821C_1ANT_PCO_WLSIDE = 0x1,
BT_8821C_1ANT_PCO_MAX
};
enum bt_8821c_1ant_gnt_ctrl_type {
BT_8821C_1ANT_GNT_TYPE_CTRL_BY_PTA = 0x0,
BT_8821C_1ANT_GNT_TYPE_CTRL_BY_SW = 0x1,
BT_8821C_1ANT_GNT_TYPE_MAX
};
enum bt_8821c_1ant_gnt_ctrl_block {
BT_8821C_1ANT_GNT_BLOCK_RFC_BB = 0x0,
BT_8821C_1ANT_GNT_BLOCK_RFC = 0x1,
BT_8821C_1ANT_GNT_BLOCK_BB = 0x2,
BT_8821C_1ANT_GNT_BLOCK_MAX
};
enum bt_8821c_1ant_lte_coex_table_type {
BT_8821C_1ANT_CTT_WL_VS_LTE = 0x0,
BT_8821C_1ANT_CTT_BT_VS_LTE = 0x1,
BT_8821C_1ANT_CTT_MAX
};
enum bt_8821c_1ant_lte_break_table_type {
BT_8821C_1ANT_LBTT_WL_BREAK_LTE = 0x0,
BT_8821C_1ANT_LBTT_BT_BREAK_LTE = 0x1,
BT_8821C_1ANT_LBTT_LTE_BREAK_WL = 0x2,
BT_8821C_1ANT_LBTT_LTE_BREAK_BT = 0x3,
BT_8821C_1ANT_LBTT_MAX
};
enum bt_info_src_8821c_1ant {
BT_INFO_SRC_8821C_1ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8821C_1ANT_BT_RSP = 0x1,
BT_INFO_SRC_8821C_1ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8821C_1ANT_MAX
};
enum bt_8821c_1ant_bt_status {
BT_8821C_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8821C_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8821C_1ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8821C_1ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8821C_1ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8821C_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8821C_1ANT_BT_STATUS_MAX
};
enum bt_8821c_1ant_wifi_status {
BT_8821C_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8821C_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1,
BT_8821C_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2,
BT_8821C_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT = 0x3,
BT_8821C_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4,
BT_8821C_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5,
BT_8821C_1ANT_WIFI_STATUS_MAX
};
enum bt_8821c_1ant_coex_algo {
BT_8821C_1ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8821C_1ANT_COEX_ALGO_SCO = 0x1,
BT_8821C_1ANT_COEX_ALGO_HID = 0x2,
BT_8821C_1ANT_COEX_ALGO_A2DP = 0x3,
BT_8821C_1ANT_COEX_ALGO_A2DP_PANHS = 0x4,
BT_8821C_1ANT_COEX_ALGO_PANEDR = 0x5,
BT_8821C_1ANT_COEX_ALGO_PANHS = 0x6,
BT_8821C_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
BT_8821C_1ANT_COEX_ALGO_PANEDR_HID = 0x8,
BT_8821C_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
BT_8821C_1ANT_COEX_ALGO_HID_A2DP = 0xa,
BT_8821C_1ANT_COEX_ALGO_MAX = 0xb,
};
enum bt_8821c_1ant_ext_ant_switch_type {
BT_8821C_1ANT_EXT_ANT_SWITCH_USE_DPDT = 0x0,
BT_8821C_1ANT_EXT_ANT_SWITCH_USE_SPDT = 0x1,
BT_8821C_1ANT_EXT_ANT_SWITCH_NONE = 0x2,
BT_8821C_1ANT_EXT_ANT_SWITCH_MAX
};
enum bt_8821c_1ant_ext_ant_switch_ctrl_type {
BT_8821C_1ANT_EXT_ANT_SWITCH_CTRL_BY_BBSW = 0x0,
BT_8821C_1ANT_EXT_ANT_SWITCH_CTRL_BY_PTA = 0x1,
BT_8821C_1ANT_EXT_ANT_SWITCH_CTRL_BY_ANTDIV = 0x2,
BT_8821C_1ANT_EXT_ANT_SWITCH_CTRL_BY_MAC = 0x3,
BT_8821C_1ANT_EXT_ANT_SWITCH_CTRL_BY_BT = 0x4,
BT_8821C_1ANT_EXT_ANT_SWITCH_CTRL_MAX
};
enum bt_8821c_1ant_ext_ant_switch_pos_type {
BT_8821C_1ANT_EXT_ANT_SWITCH_TO_BT = 0x0,
BT_8821C_1ANT_EXT_ANT_SWITCH_TO_WLG = 0x1,
BT_8821C_1ANT_EXT_ANT_SWITCH_TO_WLA = 0x2,
BT_8821C_1ANT_EXT_ANT_SWITCH_TO_NOCARE = 0x3,
BT_8821C_1ANT_EXT_ANT_SWITCH_TO_MAX
};
enum bt_8821c_1ant_ext_band_switch_pos_type {
BT_8821C_1ANT_EXT_BAND_SWITCH_TO_WLG = 0x0,
BT_8821C_1ANT_EXT_BAND_SWITCH_TO_WLA = 0x1,
BT_8821C_1ANT_EXT_BAND_SWITCH_TO_MAX
};
enum bt_8821c_1ant_int_block {
BT_8821C_1ANT_INT_BLOCK_SWITCH_TO_WLG_OF_BTG = 0x0,
BT_8821C_1ANT_INT_BLOCK_SWITCH_TO_WLG_OF_WLAG = 0x1,
BT_8821C_1ANT_INT_BLOCK_SWITCH_TO_WLA_OF_WLAG = 0x2,
BT_8821C_1ANT_INT_BLOCK_SWITCH_TO_MAX
};
enum bt_8821c_1ant_phase {
BT_8821C_1ANT_PHASE_COEX_INIT = 0x0,
BT_8821C_1ANT_PHASE_WLANONLY_INIT = 0x1,
BT_8821C_1ANT_PHASE_WLAN_OFF = 0x2,
BT_8821C_1ANT_PHASE_2G_RUNTIME = 0x3,
BT_8821C_1ANT_PHASE_5G_RUNTIME = 0x4,
BT_8821C_1ANT_PHASE_BTMPMODE = 0x5,
BT_8821C_1ANT_PHASE_ANTENNA_DET = 0x6,
BT_8821C_1ANT_PHASE_COEX_POWERON = 0x7,
BT_8821C_1ANT_PHASE_MCC_DUALBAND_RUNTIME = 0x8,
BT_8821C_1ANT_PHASE_MAX
};
enum bt_8821c_1ant_Scoreboard {
BT_8821C_1ANT_SCOREBOARD_ACTIVE = BIT(0),
BT_8821C_1ANT_SCOREBOARD_ONOFF = BIT(1),
BT_8821C_1ANT_SCOREBOARD_SCAN = BIT(2),
BT_8821C_1ANT_SCOREBOARD_UNDERTEST = BIT(3),
BT_8821C_1ANT_SCOREBOARD_WLBUSY = BIT(6)
};
struct coex_dm_8821c_1ant {
/* hw setting */
u32 pre_ant_pos_type;
u32 cur_ant_pos_type;
/* fw mechanism */
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
/* sw mechanism */
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
boolean limited_dig;
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
u16 backup_retry_limit;
u8 backup_ampdu_max_time;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
u32 pre_ra_mask;
u32 cur_ra_mask;
u8 pre_arfr_type;
u8 cur_arfr_type;
u8 pre_retry_limit_type;
u8 cur_retry_limit_type;
u8 pre_ampdu_time_type;
u8 cur_ampdu_time_type;
u32 arp_cnt;
u32 pre_ext_ant_switch_status;
u32 cur_ext_ant_switch_status;
u8 pre_ext_band_switch_status;
u8 cur_ext_band_switch_status;
u8 pre_int_block_status;
u8 cur_int_block_status;
u8 error_condition;
};
struct coex_sta_8821c_1ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
u8 num_of_profile;
boolean under_lps;
boolean under_ips;
u32 specific_pkt_period_cnt;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
boolean is_hiPri_rx_overhead;
s8 bt_rssi;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
u8 bt_info_c2h[BT_INFO_SRC_8821C_1ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8821C_1ANT_MAX];
boolean bt_whck_test;
boolean c2h_bt_inquiry_page;
boolean c2h_bt_remote_name_req;
boolean c2h_bt_page; /* Add for win8.1 page out issue */
boolean wifi_is_high_pri_task; /* Add for win8.1 page out issue */
u8 bt_info_ext;
u8 bt_info_ext2;
u32 pop_event_cnt;
u8 scan_ap_num;
u8 bt_retry_cnt;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_vht;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_vht;
boolean cck_lock;
boolean cck_lock_ever;
boolean cck_lock_warn;
u8 coex_table_type;
boolean force_lps_ctrl;
boolean concurrent_rx_mode_on;
u16 score_board;
u8 isolation_btween_wb; /* 0~ 50 */
u8 a2dp_bit_pool;
u8 cut_version;
boolean acl_busy;
boolean bt_create_connection;
u32 bt_coex_supported_feature;
u32 bt_coex_supported_version;
u8 bt_ble_scan_type;
u32 bt_ble_scan_para[3];
boolean run_time_state;
boolean freeze_coexrun_by_btinfo;
boolean is_A2DP_3M;
boolean voice_over_HOGP;
u8 bt_info;
boolean is_autoslot;
u8 forbidden_slot;
u8 hid_busy_num;
u8 hid_pair_cnt;
u32 cnt_RemoteNameReq;
u32 cnt_setupLink;
u32 cnt_ReInit;
u32 cnt_IgnWlanAct;
u32 cnt_Page;
u32 cnt_RoleSwitch;
u16 bt_reg_vendor_ac;
u16 bt_reg_vendor_ae;
boolean is_setupLink;
u8 wl_noisy_level;
u32 gnt_error_cnt;
u8 bt_afh_map[10];
u8 bt_relink_downcount;
boolean is_tdma_btautoslot;
boolean is_tdma_btautoslot_hang;
u8 switch_band_notify_to;
boolean is_rf_state_off;
boolean is_hid_low_pri_tx_overhead;
boolean is_bt_multi_link;
boolean is_bt_a2dp_sink;
boolean is_set_ps_state_fail;
u8 cnt_set_ps_state_fail;
u8 wl_fw_dbg_info[10];
u8 wl_rx_rate;
u8 wl_rts_rx_rate;
u8 wl_center_channel;
u16 score_board_WB;
boolean is_hid_rcu;
u16 legacy_forbidden_slot;
u16 le_forbidden_slot;
u8 bt_a2dp_vendor_id;
u32 bt_a2dp_device_name;
boolean is_ble_scan_toggle;
boolean is_bt_opp_exist;
boolean gl_wifi_busy;
};
#define BT_8821C_1ANT_EXT_BAND_SWITCH_USE_DPDT 0
#define BT_8821C_1ANT_EXT_BAND_SWITCH_USE_SPDT 1
struct rfe_type_8821c_1ant {
u8 rfe_module_type;
boolean ext_ant_switch_exist;
u8 ext_ant_switch_type; /* 0:DPDT, 1:SPDT */
u8 ext_ant_switch_ctrl_polarity; /* iF 0: DPDT_P=0, DPDT_N=1 => BTG to Main, WL_A+G to Aux */
boolean ext_band_switch_exist;
u8 ext_band_switch_type; /* 0:DPDT, 1:SPDT */
u8 ext_band_switch_ctrl_polarity;
boolean ant_at_main_port;
boolean wlg_Locate_at_btg; /* If TRUE: WLG at BTG, If FALSE: WLG at WLAG */
boolean ext_ant_switch_diversity; /* If diversity on */
};
#define BT_8821C_1ANT_ANTDET_PSD_POINTS 256 /* MAX:1024 */
#define BT_8821C_1ANT_ANTDET_PSD_AVGNUM 1 /* MAX:3 */
#define BT_8821C_1ANT_ANTDET_BUF_LEN 16
struct psdscan_sta_8821c_1ant {
u32 ant_det_bt_le_channel; /* BT LE Channel ex:2412 */
u32 ant_det_bt_tx_time;
u32 ant_det_pre_psdscan_peak_val;
boolean ant_det_is_ant_det_available;
u32 ant_det_psd_scan_peak_val;
boolean ant_det_is_btreply_available;
u32 ant_det_psd_scan_peak_freq;
u8 ant_det_result;
u8 ant_det_peak_val[BT_8821C_1ANT_ANTDET_BUF_LEN];
u8 ant_det_peak_freq[BT_8821C_1ANT_ANTDET_BUF_LEN];
u32 ant_det_try_count;
u32 ant_det_fail_count;
u32 ant_det_inteval_count;
u32 ant_det_thres_offset;
u32 real_cent_freq;
s32 real_offset;
u32 real_span;
u32 psd_band_width; /* unit: Hz */
u32 psd_point; /* 128/256/512/1024 */
u32 psd_report[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_report_max_hold[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_start_point;
u32 psd_stop_point;
u32 psd_max_value_point;
u32 psd_max_value;
u32 psd_max_value2;
u32 psd_avg_value; /* filter loop_max_value that below BT_8821C_1ANT_ANTDET_PSDTHRES_1ANT, and average the rest*/
u32 psd_loop_max_value[BT_8821C_1ANT_ANTDET_PSD_SWWEEPCOUNT]; /*max value in each loop */
u32 psd_start_base;
u32 psd_avg_num; /* 1/8/16/32 */
u32 psd_gen_count;
boolean is_AntDet_running;
boolean is_psd_show_max_only;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8821c1ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c1ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c1ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8821c1ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c1ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c1ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c1ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c1ant_switchband_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c1ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c1ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8821c1ant_wl_fwdbginfo_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8821c1ant_rx_rate_change_notify(IN struct btc_coexist *btcoexist,
IN BOOLEAN is_data_frame, IN u8 btc_rate_id);
void ex_halbtc8821c1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c1ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c1ant_pnp_notify(IN struct btc_coexist *btcoexist,
IN u8 pnp_state);
void ex_halbtc8821c1ant_coex_dm_reset(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c1ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c1ant_display_simple_coex_info(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c1ant_display_coex_info(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c1ant_antenna_detection(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8821c1ant_antenna_isolation(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8821c1ant_psd_scan(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8821c1ant_display_ant_detection(IN struct btc_coexist *btcoexist);
#else
#define ex_halbtc8821c1ant_power_on_setting(btcoexist)
#define ex_halbtc8821c1ant_pre_load_firmware(btcoexist)
#define ex_halbtc8821c1ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8821c1ant_init_coex_dm(btcoexist)
#define ex_halbtc8821c1ant_ips_notify(btcoexist, type)
#define ex_halbtc8821c1ant_lps_notify(btcoexist, type)
#define ex_halbtc8821c1ant_scan_notify(btcoexist, type)
#define ex_halbtc8821c1ant_switchband_notify(btcoexist, type)
#define ex_halbtc8821c1ant_connect_notify(btcoexist, type)
#define ex_halbtc8821c1ant_media_status_notify(btcoexist, type)
#define ex_halbtc8821c1ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8821c1ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8821c1ant_wl_fwdbginfo_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8821c1ant_rx_rate_change_notify(btcoexist, is_data_frame, btc_rate_id)
#define ex_halbtc8821c1ant_rf_status_notify(btcoexist, type)
#define ex_halbtc8821c1ant_halt_notify(btcoexist)
#define ex_halbtc8821c1ant_pnp_notify(btcoexist, pnp_state)
#define ex_halbtc8821c1ant_coex_dm_reset(btcoexist)
#define ex_halbtc8821c1ant_periodical(btcoexist)
#define ex_halbtc8821c1ant_display_simple_coex_info(btcoexist)
#define ex_halbtc8821c1ant_display_coex_info(btcoexist)
#define ex_halbtc8821c1ant_antenna_detection(btcoexist, cent_freq, offset, span, seconds)
#define ex_halbtc8821c1ant_antenna_isolation(btcoexist, cent_freq, offset, span, seconds)
#define ex_halbtc8821c1ant_psd_scan(btcoexist, cent_freq, offset, span, seconds)
#define ex_halbtc8821c1ant_display_ant_detection(btcoexist)
#endif
#endif

6460
hal/btc/halbtc8821c2ant.c 100644
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545
hal/btc/halbtc8821c2ant.h 100644
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/******************************************************************************
*
* Copyright(c) 2016 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8821C_SUPPORT == 1)
/* *******************************************
* The following is for 8821C 2Ant BT Co-exist definition
* ******************************************* */
#define BT_8821C_2ANT_COEX_DBG 0
#define BT_AUTO_REPORT_ONLY_8821C_2ANT 1
#define BT_INFO_8821C_2ANT_B_FTP BIT(7)
#define BT_INFO_8821C_2ANT_B_A2DP BIT(6)
#define BT_INFO_8821C_2ANT_B_HID BIT(5)
#define BT_INFO_8821C_2ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8821C_2ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8821C_2ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8821C_2ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8821C_2ANT_B_CONNECTION BIT(0)
#define BTC_RSSI_COEX_THRESH_TOL_8821C_2ANT 2
#define BT_8821C_2ANT_WIFI_RSSI_COEXSWITCH_THRES1 80 /* unit: % WiFi RSSI Threshold for 2-Ant free-run/2-Ant TDMA translation, default = 42 */
#define BT_8821C_2ANT_BT_RSSI_COEXSWITCH_THRES1 80 /* unit: % BT RSSI Threshold for 2-Ant free-run/2-Ant TDMA translation, default = 46 */
#define BT_8821C_2ANT_WIFI_RSSI_COEXSWITCH_THRES2 80 /* unit: % WiFi RSSI Threshold for 1-Ant TDMA/1-Ant PS-TDMA translation, default = 42 */
#define BT_8821C_2ANT_BT_RSSI_COEXSWITCH_THRES2 80 /* unit: % BT RSSI Threshold for 1-Ant TDMA/1-Ant PS-TDMA translation, default = 46 */
#define BT_8821C_2ANT_DEFAULT_ISOLATION 15 /* unit: dB */
#define BT_8821C_2ANT_WIFI_MAX_TX_POWER 15 /* unit: dBm */
#define BT_8821C_2ANT_BT_MAX_TX_POWER 3 /* unit: dBm */
#define BT_8821C_2ANT_WIFI_SIR_THRES1 -15 /* unit: dB */
#define BT_8821C_2ANT_WIFI_SIR_THRES2 -30 /* unit: dB */
#define BT_8821C_2ANT_BT_SIR_THRES1 -15 /* unit: dB */
#define BT_8821C_2ANT_BT_SIR_THRES2 -30 /* unit: dB */
/* for Antenna detection */
#define BT_8821C_2ANT_ANTDET_PSDTHRES_BACKGROUND 50
#define BT_8821C_2ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70
#define BT_8821C_2ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 52
#define BT_8821C_2ANT_ANTDET_PSDTHRES_1ANT 40
#define BT_8821C_2ANT_ANTDET_RETRY_INTERVAL 10 /* retry timer if ant det is fail, unit: second */
#define BT_8821C_2ANT_ANTDET_SWEEPPOINT_DELAY 60000
#define BT_8821C_2ANT_ANTDET_ENABLE 0
#define BT_8821C_2ANT_ANTDET_BTTXTIME 100
#define BT_8821C_2ANT_ANTDET_BTTXCHANNEL 39
#define BT_8821C_2ANT_ANTDET_PSD_SWWEEPCOUNT 50
#define BT_8821C_2ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT 30000
enum bt_8821c_2ant_signal_state {
BT_8821C_2ANT_SIG_STA_SET_TO_LOW = 0x0,
BT_8821C_2ANT_SIG_STA_SET_BY_HW = 0x0,
BT_8821C_2ANT_SIG_STA_SET_TO_HIGH = 0x1,
BT_8821C_2ANT_SIG_STA_MAX
};
enum bt_8821c_2ant_path_ctrl_owner {
BT_8821C_2ANT_PCO_BTSIDE = 0x0,
BT_8821C_2ANT_PCO_WLSIDE = 0x1,
BT_8821C_2ANT_PCO_MAX
};
enum bt_8821c_2ant_gnt_ctrl_type {
BT_8821C_2ANT_GNT_TYPE_CTRL_BY_PTA = 0x0,
BT_8821C_2ANT_GNT_TYPE_CTRL_BY_SW = 0x1,
BT_8821C_2ANT_GNT_TYPE_MAX
};
enum bt_8821c_2ant_gnt_ctrl_block {
BT_8821C_2ANT_GNT_BLOCK_RFC_BB = 0x0,
BT_8821C_2ANT_GNT_BLOCK_RFC = 0x1,
BT_8821C_2ANT_GNT_BLOCK_BB = 0x2,
BT_8821C_2ANT_GNT_BLOCK_MAX
};
enum bt_8821c_2ant_lte_coex_table_type {
BT_8821C_2ANT_CTT_WL_VS_LTE = 0x0,
BT_8821C_2ANT_CTT_BT_VS_LTE = 0x1,
BT_8821C_2ANT_CTT_MAX
};
enum bt_8821c_2ant_lte_break_table_type {
BT_8821C_2ANT_LBTT_WL_BREAK_LTE = 0x0,
BT_8821C_2ANT_LBTT_BT_BREAK_LTE = 0x1,
BT_8821C_2ANT_LBTT_LTE_BREAK_WL = 0x2,
BT_8821C_2ANT_LBTT_LTE_BREAK_BT = 0x3,
BT_8821C_2ANT_LBTT_MAX
};
enum bt_info_src_8821c_2ant {
BT_INFO_SRC_8821C_2ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8821C_2ANT_BT_RSP = 0x1,
BT_INFO_SRC_8821C_2ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8821C_2ANT_MAX
};
enum bt_8821c_2ant_bt_status {
BT_8821C_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8821C_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8821C_2ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8821C_2ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8821C_2ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8821C_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8821C_2ANT_BT_STATUS_MAX
};
enum bt_8821c_2ant_coex_algo {
BT_8821C_2ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8821C_2ANT_COEX_ALGO_SCO = 0x1,
BT_8821C_2ANT_COEX_ALGO_HID = 0x2,
BT_8821C_2ANT_COEX_ALGO_A2DP = 0x3,
BT_8821C_2ANT_COEX_ALGO_A2DP_PANHS = 0x4,
BT_8821C_2ANT_COEX_ALGO_PANEDR = 0x5,
BT_8821C_2ANT_COEX_ALGO_PANHS = 0x6,
BT_8821C_2ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
BT_8821C_2ANT_COEX_ALGO_PANEDR_HID = 0x8,
BT_8821C_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
BT_8821C_2ANT_COEX_ALGO_HID_A2DP = 0xa,
BT_8821C_2ANT_COEX_ALGO_NOPROFILEBUSY = 0xb,
BT_8821C_2ANT_COEX_ALGO_A2DPSINK = 0xc,
BT_8821C_2ANT_COEX_ALGO_MAX
};
enum bt_8821c_2ant_ext_ant_switch_type {
BT_8821C_2ANT_EXT_ANT_SWITCH_USE_DPDT = 0x0,
BT_8821C_2ANT_EXT_ANT_SWITCH_USE_SPDT = 0x1,
BT_8821C_2ANT_EXT_ANT_SWITCH_NONE = 0x2,
BT_8821C_2ANT_EXT_ANT_SWITCH_MAX
};
enum bt_8821c_2ant_ext_ant_switch_ctrl_type {
BT_8821C_2ANT_EXT_ANT_SWITCH_CTRL_BY_BBSW = 0x0,
BT_8821C_2ANT_EXT_ANT_SWITCH_CTRL_BY_PTA = 0x1,
BT_8821C_2ANT_EXT_ANT_SWITCH_CTRL_BY_ANTDIV = 0x2,
BT_8821C_2ANT_EXT_ANT_SWITCH_CTRL_BY_MAC = 0x3,
BT_8821C_2ANT_EXT_ANT_SWITCH_CTRL_BY_BT = 0x4,
BT_8821C_2ANT_EXT_ANT_SWITCH_CTRL_MAX
};
enum bt_8821c_2ant_ext_ant_switch_pos_type {
BT_8821C_2ANT_EXT_ANT_SWITCH_MAIN_TO_BT = 0x0,
BT_8821C_2ANT_EXT_ANT_SWITCH_MAIN_TO_WLG = 0x1,
BT_8821C_2ANT_EXT_ANT_SWITCH_MAIN_TO_WLA = 0x2,
BT_8821C_2ANT_EXT_ANT_SWITCH_MAIN_TO_NOCARE = 0x3,
BT_8821C_2ANT_EXT_ANT_SWITCH_MAIN_TO_MAX
};
enum bt_8821c_2ant_ext_band_switch_pos_type {
BT_8821C_2ANT_EXT_BAND_SWITCH_TO_WLG = 0x0,
BT_8821C_2ANT_EXT_BAND_SWITCH_TO_WLA = 0x1,
BT_8821C_2ANT_EXT_BAND_SWITCH_TO_MAX
};
enum bt_8821c_2ant_int_block {
BT_8821C_2ANT_INT_BLOCK_SWITCH_TO_WLG_OF_BTG = 0x0,
BT_8821C_2ANT_INT_BLOCK_SWITCH_TO_WLG_OF_WLAG = 0x1,
BT_8821C_2ANT_INT_BLOCK_SWITCH_TO_WLA_OF_WLAG = 0x2,
BT_8821C_2ANT_INT_BLOCK_SWITCH_TO_MAX
};
enum bt_8821c_2ant_phase {
BT_8821C_2ANT_PHASE_COEX_INIT = 0x0,
BT_8821C_2ANT_PHASE_WLANONLY_INIT = 0x1,
BT_8821C_2ANT_PHASE_WLAN_OFF = 0x2,
BT_8821C_2ANT_PHASE_2G_RUNTIME = 0x3,
BT_8821C_2ANT_PHASE_5G_RUNTIME = 0x4,
BT_8821C_2ANT_PHASE_BTMPMODE = 0x5,
BT_8821C_2ANT_PHASE_ANTENNA_DET = 0x6,
BT_8821C_2ANT_PHASE_COEX_POWERON = 0x7,
BT_8821C_2ANT_PHASE_2G_RUNTIME_CONCURRENT = 0x8,
BT_8821C_2ANT_PHASE_MAX
};
enum bt_8821c_2ant_Scoreboard {
BT_8821C_2ANT_SCOREBOARD_ACTIVE = BIT(0),
BT_8821C_2ANT_SCOREBOARD_ONOFF = BIT(1),
BT_8821C_2ANT_SCOREBOARD_SCAN = BIT(2),
BT_8821C_2ANT_SCOREBOARD_UNDERTEST = BIT(3),
BT_8821C_2ANT_SCOREBOARD_WLBUSY = BIT(6)
};
struct coex_dm_8821c_2ant {
/* hw setting */
u32 pre_ant_pos_type;
u32 cur_ant_pos_type;
/* fw mechanism */
u8 pre_bt_dec_pwr_lvl;
u8 cur_bt_dec_pwr_lvl;
u8 pre_fw_dac_swing_lvl;
u8 cur_fw_dac_swing_lvl;
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean reset_tdma_adjust;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
/* sw mechanism */
boolean pre_rf_rx_lpf_shrink;
boolean cur_rf_rx_lpf_shrink;
u32 bt_rf_0x1e_backup;
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
boolean pre_dac_swing_on;
u32 pre_dac_swing_lvl;
boolean cur_dac_swing_on;
u32 cur_dac_swing_lvl;
boolean pre_adc_back_off;
boolean cur_adc_back_off;
boolean pre_agc_table_en;
boolean cur_agc_table_en;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
boolean limited_dig;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
boolean need_recover0x948;
u32 backup0x948;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
boolean is_switch_to_1dot5_ant;
u8 switch_thres_offset;
u32 arp_cnt;
u32 pre_ext_ant_switch_status;
u32 cur_ext_ant_switch_status;
u8 pre_ext_band_switch_status;
u8 cur_ext_band_switch_status;
u8 pre_int_block_status;
u8 cur_int_block_status;
u8 cur_antdiv_type;
};
struct coex_sta_8821c_2ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean under_lps;
boolean under_ips;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
boolean is_hiPri_rx_overhead;
u8 bt_rssi;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
u8 bt_info_c2h[BT_INFO_SRC_8821C_2ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8821C_2ANT_MAX];
boolean bt_whck_test;
boolean c2h_bt_inquiry_page;
boolean c2h_bt_remote_name_req;
u8 bt_info_ext;
u8 bt_info_ext2;
u32 pop_event_cnt;
u8 scan_ap_num;
u8 bt_retry_cnt;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_vht;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_vht;
u32 acc_crc_ratio;
u32 now_crc_ratio;
u32 cnt_crcok_max_in_10s;
boolean cck_lock;
boolean cck_lock_ever;
boolean cck_lock_warn;
u8 coex_table_type;
boolean force_lps_ctrl;
u8 dis_ver_info_cnt;
u8 a2dp_bit_pool;
u8 cut_version;
boolean concurrent_rx_mode_on;
u16 score_board;
u8 isolation_btween_wb; /* 0~ 50 */
u8 wifi_coex_thres;
u8 bt_coex_thres;
u8 wifi_coex_thres2;
u8 bt_coex_thres2;
u8 num_of_profile;
boolean acl_busy;
boolean bt_create_connection;
boolean wifi_is_high_pri_task;
u32 specific_pkt_period_cnt;
u32 bt_coex_supported_feature;
u32 bt_coex_supported_version;
u8 bt_ble_scan_type;
u32 bt_ble_scan_para[3];
boolean run_time_state;
boolean freeze_coexrun_by_btinfo;
boolean is_A2DP_3M;
boolean voice_over_HOGP;
u8 bt_info;
boolean is_autoslot;
u8 forbidden_slot;
u8 hid_busy_num;
u8 hid_pair_cnt;
u32 cnt_RemoteNameReq;
u32 cnt_setupLink;
u32 cnt_ReInit;
u32 cnt_IgnWlanAct;
u32 cnt_Page;
u32 cnt_RoleSwitch;
u16 bt_reg_vendor_ac;
u16 bt_reg_vendor_ae;
boolean is_setupLink;
u8 wl_noisy_level;
u32 gnt_error_cnt;
u8 bt_afh_map[10];
u8 bt_relink_downcount;
boolean is_tdma_btautoslot;
boolean is_tdma_btautoslot_hang;
boolean is_eSCO_mode;
u8 switch_band_notify_to;
boolean is_rf_state_off;
boolean is_hid_low_pri_tx_overhead;
boolean is_bt_multi_link;
boolean is_bt_a2dp_sink;
boolean is_set_ps_state_fail;
u8 cnt_set_ps_state_fail;
u8 wl_fw_dbg_info[10];
u8 wl_rx_rate;
u8 wl_rts_rx_rate;
u8 wl_center_channel;
u16 score_board_WB;
boolean is_hid_rcu;
u16 legacy_forbidden_slot;
u16 le_forbidden_slot;
u8 bt_a2dp_vendor_id;
u32 bt_a2dp_device_name;
boolean is_ble_scan_toggle;
boolean is_bt_opp_exist;
boolean gl_wifi_busy;
};
#define BT_8821C_2ANT_EXT_BAND_SWITCH_USE_DPDT 0
#define BT_8821C_2ANT_EXT_BAND_SWITCH_USE_SPDT 1
struct rfe_type_8821c_2ant {
u8 rfe_module_type;
boolean ext_ant_switch_exist;
u8 ext_ant_switch_type; /* 0:DPDT, 1:SPDT */
u8 ext_ant_switch_ctrl_polarity; /* iF 0: DPDT_P=0, DPDT_N=1 => BTG to Main, WL_A+G to Aux */
boolean ext_band_switch_exist;
u8 ext_band_switch_type; /* 0:DPDT, 1:SPDT */
u8 ext_band_switch_ctrl_polarity;
boolean ant_at_main_port;
boolean wlg_Locate_at_btg; /* If TRUE: WLG at BTG, If FALSE: WLG at WLAG */
boolean ext_ant_switch_diversity; /* If diversity on */
};
#define BT_8821C_2ANT_ANTDET_PSD_POINTS 256 /* MAX:1024 */
#define BT_8821C_2ANT_ANTDET_PSD_AVGNUM 1 /* MAX:3 */
#define BT_8821C_2ANT_ANTDET_BUF_LEN 16
struct psdscan_sta_8821c_2ant {
u32 ant_det_bt_le_channel; /* BT LE Channel ex:2412 */
u32 ant_det_bt_tx_time;
u32 ant_det_pre_psdscan_peak_val;
boolean ant_det_is_ant_det_available;
u32 ant_det_psd_scan_peak_val;
boolean ant_det_is_btreply_available;
u32 ant_det_psd_scan_peak_freq;
u8 ant_det_result;
u8 ant_det_peak_val[BT_8821C_2ANT_ANTDET_BUF_LEN];
u8 ant_det_peak_freq[BT_8821C_2ANT_ANTDET_BUF_LEN];
u32 ant_det_try_count;
u32 ant_det_fail_count;
u32 ant_det_inteval_count;
u32 ant_det_thres_offset;
u32 real_cent_freq;
s32 real_offset;
u32 real_span;
u32 psd_band_width; /* unit: Hz */
u32 psd_point; /* 128/256/512/1024 */
u32 psd_report[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_report_max_hold[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_start_point;
u32 psd_stop_point;
u32 psd_max_value_point;
u32 psd_max_value;
u32 psd_max_value2;
u32 psd_avg_value; /* filter loop_max_value that below BT_8821C_1ANT_ANTDET_PSDTHRES_1ANT, and average the rest*/
u32 psd_loop_max_value[BT_8821C_2ANT_ANTDET_PSD_SWWEEPCOUNT]; /*max value in each loop */
u32 psd_start_base;
u32 psd_avg_num; /* 1/8/16/32 */
u32 psd_gen_count;
boolean is_AntDet_running;
boolean is_psd_show_max_only;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8821c2ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c2ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c2ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8821c2ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c2ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c2ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c2ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c2ant_switchband_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c2ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c2ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8821c2ant_wl_fwdbginfo_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8821c2ant_rx_rate_change_notify(IN struct btc_coexist *btcoexist,
IN BOOLEAN is_data_frame, IN u8 btc_rate_id);
void ex_halbtc8821c2ant_rf_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c2ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c2ant_pnp_notify(IN struct btc_coexist *btcoexist,
IN u8 pnp_state);
void ex_halbtc8821c2ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c2ant_display_simple_coex_info(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c2ant_display_coex_info(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c2ant_antenna_detection(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8821c2ant_display_ant_detection(IN struct btc_coexist *btcoexist);
#else
#define ex_halbtc8821c2ant_power_on_setting(btcoexist)
#define ex_halbtc8821c2ant_pre_load_firmware(btcoexist)
#define ex_halbtc8821c2ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8821c2ant_init_coex_dm(btcoexist)
#define ex_halbtc8821c2ant_ips_notify(btcoexist, type)
#define ex_halbtc8821c2ant_lps_notify(btcoexist, type)
#define ex_halbtc8821c2ant_scan_notify(btcoexist, type)
#define ex_halbtc8821c2ant_switchband_notify(btcoexist, type)
#define ex_halbtc8821c2ant_connect_notify(btcoexist, type)
#define ex_halbtc8821c2ant_media_status_notify(btcoexist, type)
#define ex_halbtc8821c2ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8821c2ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8821c2ant_wl_fwdbginfo_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8821c2ant_rx_rate_change_notify(btcoexist, is_data_frame, btc_rate_id)
#define ex_halbtc8821c2ant_rf_status_notify(btcoexist, type)
#define ex_halbtc8821c2ant_halt_notify(btcoexist)
#define ex_halbtc8821c2ant_pnp_notify(btcoexist, pnp_state)
#define ex_halbtc8821c2ant_periodical(btcoexist)
#define ex_halbtc8821c2ant_display_simple_coex_info(btcoexist)
#define ex_halbtc8821c2ant_display_coex_info(btcoexist)
#define ex_halbtc8821c2ant_display_ant_detection(btcoexist)
#define ex_halbtc8821c2ant_antenna_detection(btcoexist, cent_freq, offset, span, seconds)
#endif
#endif

200
hal/btc/halbtc8821cwifionly.c 100644
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@ -0,0 +1,200 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#include "mp_precomp.h"
static struct rfe_type_8821c_wifi_only gl_rfe_type_8821c_1ant;
static struct rfe_type_8821c_wifi_only *rfe_type = &gl_rfe_type_8821c_1ant;
VOID hal8821c_wifi_only_switch_antenna(
IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
)
{
boolean switch_polatiry_inverse = false;
u8 regval_0xcb7 = 0;
u8 pos_type, ctrl_type;
if (!rfe_type->ext_ant_switch_exist)
return;
/* swap control polarity if use different switch control polarity*/
/* Normal switch polarity for DPDT, 0xcb4[29:28] = 2b'01 => BTG to Main, WLG to Aux, 0xcb4[29:28] = 2b'10 => BTG to Aux, WLG to Main */
/* Normal switch polarity for SPDT, 0xcb4[29:28] = 2b'01 => Ant to BTG, 0xcb4[29:28] = 2b'10 => Ant to WLG */
if (rfe_type->ext_ant_switch_ctrl_polarity)
switch_polatiry_inverse = !switch_polatiry_inverse;
/* swap control polarity if 1-Ant at Aux */
if (rfe_type->ant_at_main_port == false)
switch_polatiry_inverse = !switch_polatiry_inverse;
if (is_5g)
pos_type = BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_TO_WLA;
else
pos_type = BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_TO_WLG;
switch (pos_type) {
default:
case BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_TO_WLA:
break;
case BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_TO_WLG:
if (!rfe_type->wlg_Locate_at_btg)
switch_polatiry_inverse = !switch_polatiry_inverse;
break;
}
if (pwifionlycfg->haldata_info.ant_div_cfg)
ctrl_type = BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_BY_ANTDIV;
else
ctrl_type = BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_BY_BBSW;
switch (ctrl_type) {
default:
case BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_BY_BBSW:
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x4c, 0x01800000, 0x2);
/* BB SW, DPDT use RFE_ctrl8 and RFE_ctrl9 as control pin */
halwifionly_phy_set_bb_reg(pwifionlycfg, 0xcb4, 0x000000ff, 0x77);
regval_0xcb7 = (switch_polatiry_inverse == false ? 0x1 : 0x2);
/* 0xcb4[29:28] = 2b'01 for no switch_polatiry_inverse, DPDT_SEL_N =1, DPDT_SEL_P =0 */
halwifionly_phy_set_bb_reg(pwifionlycfg, 0xcb4, 0x30000000, regval_0xcb7);
break;
case BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_BY_ANTDIV:
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x4c, 0x01800000, 0x2);
/* BB SW, DPDT use RFE_ctrl8 and RFE_ctrl9 as control pin */
halwifionly_phy_set_bb_reg(pwifionlycfg, 0xcb4, 0x000000ff, 0x88);
/* no regval_0xcb7 setup required, because antenna switch control value by antenna diversity */
break;
}
}
VOID halbtc8821c_wifi_only_set_rfe_type(
IN struct wifi_only_cfg *pwifionlycfg
)
{
/* the following setup should be got from Efuse in the future */
rfe_type->rfe_module_type = (pwifionlycfg->haldata_info.rfe_type) & 0x1f;
rfe_type->ext_ant_switch_ctrl_polarity = 0;
switch (rfe_type->rfe_module_type) {
case 0:
default:
rfe_type->ext_ant_switch_exist = true;
rfe_type->ext_ant_switch_type =
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_USE_DPDT; /*2-Ant, DPDT, WLG*/
rfe_type->wlg_Locate_at_btg = false;
rfe_type->ant_at_main_port = true;
break;
case 1:
rfe_type->ext_ant_switch_exist = true;
rfe_type->ext_ant_switch_type =
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_USE_SPDT; /*1-Ant, Main, DPDT or SPDT, WLG */
rfe_type->wlg_Locate_at_btg = false;
rfe_type->ant_at_main_port = true;
break;
case 2:
rfe_type->ext_ant_switch_exist = true;
rfe_type->ext_ant_switch_type =
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_USE_SPDT; /*1-Ant, Main, DPDT or SPDT, BTG */
rfe_type->wlg_Locate_at_btg = true;
rfe_type->ant_at_main_port = true;
break;
case 3:
rfe_type->ext_ant_switch_exist = true;
rfe_type->ext_ant_switch_type =
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_USE_DPDT; /*1-Ant, Aux, DPDT, WLG */
rfe_type->wlg_Locate_at_btg = false;
rfe_type->ant_at_main_port = false;
break;
case 4:
rfe_type->ext_ant_switch_exist = true;
rfe_type->ext_ant_switch_type =
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_USE_DPDT; /*1-Ant, Aux, DPDT, BTG */
rfe_type->wlg_Locate_at_btg = true;
rfe_type->ant_at_main_port = false;
break;
case 5:
rfe_type->ext_ant_switch_exist = false; /*2-Ant, no antenna switch, WLG*/
rfe_type->ext_ant_switch_type =
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_NONE;
rfe_type->wlg_Locate_at_btg = false;
rfe_type->ant_at_main_port = true;
break;
case 6:
rfe_type->ext_ant_switch_exist = false; /*2-Ant, no antenna switch, WLG*/
rfe_type->ext_ant_switch_type =
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_NONE;
rfe_type->wlg_Locate_at_btg = false;
rfe_type->ant_at_main_port = true;
break;
case 7:
rfe_type->ext_ant_switch_exist = true; /*2-Ant, DPDT, BTG*/
rfe_type->ext_ant_switch_type =
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_USE_DPDT;
rfe_type->wlg_Locate_at_btg = true;
rfe_type->ant_at_main_port = true;
break;
}
}
VOID
ex_hal8821c_wifi_only_hw_config(
IN struct wifi_only_cfg *pwifionlycfg
)
{
halbtc8821c_wifi_only_set_rfe_type(pwifionlycfg);
/* set gnt_wl, gnt_bt control owner to WL*/
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x70, 0x400000, 0x1);
/*gnt_wl=1 , gnt_bt=0*/
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x1704, 0xffffffff, 0x7700);
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x1700, 0xffffffff, 0xc00f0038);
}
VOID
ex_hal8821c_wifi_only_scannotify(
IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
)
{
hal8821c_wifi_only_switch_antenna(pwifionlycfg, is_5g);
}
VOID
ex_hal8821c_wifi_only_switchbandnotify(
IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
)
{
hal8821c_wifi_only_switch_antenna(pwifionlycfg, is_5g);
}

84
hal/btc/halbtc8821cwifionly.h 100644
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@ -0,0 +1,84 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __INC_HAL8821CWIFIONLYHWCFG_H
#define __INC_HAL8821CWIFIONLYHWCFG_H
struct rfe_type_8821c_wifi_only {
u8 rfe_module_type;
boolean ext_ant_switch_exist;
u8 ext_ant_switch_type; /* 0:DPDT, 1:SPDT */
u8 ext_ant_switch_ctrl_polarity; /* iF 0: DPDT_P=0, DPDT_N=1 => BTG to Main, WL_A+G to Aux */
boolean ant_at_main_port;
boolean wlg_Locate_at_btg; /* If true: WLG at BTG, If false: WLG at WLAG */
boolean ext_ant_switch_diversity; /* If diversity on */
};
enum bt_8821c_wifi_only_ext_ant_switch_type {
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_USE_DPDT = 0x0,
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_USE_SPDT = 0x1,
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_NONE = 0x2,
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_MAX
};
enum bt_8821c_wifi_only_ext_ant_switch_ctrl_type {
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_BY_BBSW = 0x0,
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_BY_PTA = 0x1,
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_BY_ANTDIV = 0x2,
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_BY_MAC = 0x3,
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_BY_BT = 0x4,
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_MAX
};
enum bt_8821c_wifi_only_ext_ant_switch_pos_type {
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_TO_BT = 0x0,
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_TO_WLG = 0x1,
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_TO_WLA = 0x2,
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_TO_NOCARE = 0x3,
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_TO_MAX
};
VOID
hal8821c_wifi_only_switch_antenna(
IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
);
VOID
halbtc8821c_wifi_only_set_rfe_type(
IN struct wifi_only_cfg *pwifionlycfg
);
VOID
ex_hal8821c_wifi_only_hw_config(
IN struct wifi_only_cfg *pwifionlycfg
);
VOID
ex_hal8821c_wifi_only_scannotify(
IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
);
VOID
ex_hal8821c_wifi_only_switchbandnotify(
IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
);
#endif

6713
hal/btc/halbtc8822b1ant.c 100644
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hal/btc/halbtc8822b1ant.h 100644
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/******************************************************************************
*
* Copyright(c) 2016 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8822B_SUPPORT == 1)
/* *******************************************
* The following is for 8822B 1ANT BT Co-exist definition
* ******************************************* */
#define BT_8822B_1ANT_COEX_DBG 0
#define BT_AUTO_REPORT_ONLY_8822B_1ANT 1
#define BT_INFO_8822B_1ANT_B_FTP BIT(7)
#define BT_INFO_8822B_1ANT_B_A2DP BIT(6)
#define BT_INFO_8822B_1ANT_B_HID BIT(5)
#define BT_INFO_8822B_1ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8822B_1ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8822B_1ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8822B_1ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8822B_1ANT_B_CONNECTION BIT(0)
#define BT_INFO_8822B_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \
(((_BT_INFO_EXT_&BIT(0))) ? true : false)
#define BTC_RSSI_COEX_THRESH_TOL_8822B_1ANT 2
#define BT_8822B_1ANT_WIFI_NOISY_THRESH 150 /* max: 255 */
#define BT_8822B_1ANT_DEFAULT_ISOLATION 15 /* unit: dB */
/* for Antenna detection */
#define BT_8822B_1ANT_ANTDET_PSDTHRES_BACKGROUND 50
#define BT_8822B_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70
#define BT_8822B_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 55
#define BT_8822B_1ANT_ANTDET_PSDTHRES_1ANT 35
#define BT_8822B_1ANT_ANTDET_RETRY_INTERVAL 10 /* retry timer if ant det is fail, unit: second */
#define BT_8822B_1ANT_ANTDET_ENABLE 0
#define BT_8822B_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE 0
#define BT_8822B_1ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT 30000
enum bt_8822b_1ant_signal_state {
BT_8822B_1ANT_SIG_STA_SET_TO_LOW = 0x0,
BT_8822B_1ANT_SIG_STA_SET_BY_HW = 0x0,
BT_8822B_1ANT_SIG_STA_SET_TO_HIGH = 0x1,
BT_8822B_1ANT_SIG_STA_MAX
};
enum bt_8822b_1ant_path_ctrl_owner {
BT_8822B_1ANT_PCO_BTSIDE = 0x0,
BT_8822B_1ANT_PCO_WLSIDE = 0x1,
BT_8822B_1ANT_PCO_MAX
};
enum bt_8822b_1ant_gnt_ctrl_type {
BT_8822B_1ANT_GNT_CTRL_BY_PTA = 0x0,
BT_8822B_1ANT_GNT_CTRL_BY_SW = 0x1,
BT_8822B_1ANT_GNT_CTRL_MAX
};
enum bt_8822b_1ant_gnt_ctrl_block {
BT_8822B_1ANT_GNT_BLOCK_RFC_BB = 0x0,
BT_8822B_1ANT_GNT_BLOCK_RFC = 0x1,
BT_8822B_1ANT_GNT_BLOCK_BB = 0x2,
BT_8822B_1ANT_GNT_BLOCK_MAX
};
enum bt_8822b_1ant_lte_coex_table_type {
BT_8822B_1ANT_CTT_WL_VS_LTE = 0x0,
BT_8822B_1ANT_CTT_BT_VS_LTE = 0x1,
BT_8822B_1ANT_CTT_MAX
};
enum bt_8822b_1ant_lte_break_table_type {
BT_8822B_1ANT_LBTT_WL_BREAK_LTE = 0x0,
BT_8822B_1ANT_LBTT_BT_BREAK_LTE = 0x1,
BT_8822B_1ANT_LBTT_LTE_BREAK_WL = 0x2,
BT_8822B_1ANT_LBTT_LTE_BREAK_BT = 0x3,
BT_8822B_1ANT_LBTT_MAX
};
enum bt_info_src_8822b_1ant {
BT_INFO_SRC_8822B_1ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8822B_1ANT_BT_RSP = 0x1,
BT_INFO_SRC_8822B_1ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8822B_1ANT_MAX
};
enum bt_8822b_1ant_bt_status {
BT_8822B_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8822B_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8822B_1ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8822B_1ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8822B_1ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8822B_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8822B_1ANT_BT_STATUS_MAX
};
enum bt_8822b_1ant_wifi_status {
BT_8822B_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8822B_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1,
BT_8822B_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2,
BT_8822B_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT = 0x3,
BT_8822B_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4,
BT_8822B_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5,
BT_8822B_1ANT_WIFI_STATUS_MAX
};
enum bt_8822b_1ant_coex_algo {
BT_8822B_1ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8822B_1ANT_COEX_ALGO_SCO = 0x1,
BT_8822B_1ANT_COEX_ALGO_HID = 0x2,
BT_8822B_1ANT_COEX_ALGO_A2DP = 0x3,
BT_8822B_1ANT_COEX_ALGO_A2DP_PANHS = 0x4,
BT_8822B_1ANT_COEX_ALGO_PANEDR = 0x5,
BT_8822B_1ANT_COEX_ALGO_PANHS = 0x6,
BT_8822B_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
BT_8822B_1ANT_COEX_ALGO_PANEDR_HID = 0x8,
BT_8822B_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
BT_8822B_1ANT_COEX_ALGO_HID_A2DP = 0xa,
BT_8822B_1ANT_COEX_ALGO_NOPROFILEBUSY = 0xb,
BT_8822B_1ANT_COEX_ALGO_A2DPSINK = 0xc,
BT_8822B_1ANT_COEX_ALGO_MAX
};
enum bt_8822b_1ant_ext_ant_switch_type {
BT_8822B_1ANT_EXT_ANT_SWITCH_USE_SPDT = 0x0,
BT_8822B_1ANT_EXT_ANT_SWITCH_USE_SP3T = 0x1,
BT_8822B_1ANT_EXT_ANT_SWITCH_MAX
};
enum bt_8822b_1ant_ext_ant_switch_ctrl_type {
BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_BY_BBSW = 0x0,
BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_BY_PTA = 0x1,
BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_BY_ANTDIV = 0x2,
BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_BY_MAC = 0x3,
BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_BY_BT = 0x4,
BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_MAX
};
enum bt_8822b_1ant_ext_ant_switch_pos_type {
BT_8822B_1ANT_EXT_ANT_SWITCH_TO_BT = 0x0,
BT_8822B_1ANT_EXT_ANT_SWITCH_TO_WLG = 0x1,
BT_8822B_1ANT_EXT_ANT_SWITCH_TO_WLA = 0x2,
BT_8822B_1ANT_EXT_ANT_SWITCH_TO_NOCARE = 0x3,
BT_8822B_1ANT_EXT_ANT_SWITCH_TO_MAX
};
enum bt_8822b_1ant_phase {
BT_8822B_1ANT_PHASE_COEX_INIT = 0x0,
BT_8822B_1ANT_PHASE_WLANONLY_INIT = 0x1,
BT_8822B_1ANT_PHASE_WLAN_OFF = 0x2,
BT_8822B_1ANT_PHASE_2G_RUNTIME = 0x3,
BT_8822B_1ANT_PHASE_5G_RUNTIME = 0x4,
BT_8822B_1ANT_PHASE_BTMPMODE = 0x5,
BT_8822B_1ANT_PHASE_COEX_POWERON = 0x6,
BT_8822B_1ANT_PHASE_2G_FREERUN_ANT_WL = 0x7,
BT_8822B_1ANT_PHASE_2G_FREERUN_ANT_BT = 0x8,
BT_8822B_1ANT_PHASE_MCC_DUALBAND_RUNTIME = 0x9,
BT_8822B_1ANT_PHASE_MAX
};
/*ADD SCOREBOARD TO FIX BT LPS 32K ISSUE WHILE WL BUSY*/
enum bt_8822b_1ant_Scoreboard {
BT_8822B_1ANT_SCOREBOARD_ACTIVE = BIT(0),
BT_8822B_1ANT_SCOREBOARD_ONOFF = BIT(1),
BT_8822B_1ANT_SCOREBOARD_SCAN = BIT(2),
BT_8822B_1ANT_SCOREBOARD_UNDERTEST = BIT(3),
BT_8822B_1ANT_SCOREBOARD_RXGAIN = BIT(4),
BT_8822B_1ANT_SCOREBOARD_WLBUSY = BIT(6)
};
struct coex_dm_8822b_1ant {
/* hw setting */
u32 pre_ant_pos_type;
u32 cur_ant_pos_type;
/* fw mechanism */
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean auto_tdma_adjust;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
u8 pre_bt_dec_pwr_lvl;
u8 cur_bt_dec_pwr_lvl;
u8 pre_fw_dac_swing_lvl;
u8 cur_fw_dac_swing_lvl;
/* sw mechanism */
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
boolean limited_dig;
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
u16 backup_retry_limit;
u8 backup_ampdu_max_time;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
u32 pre_ra_mask;
u32 cur_ra_mask;
u8 pre_arfr_type;
u8 cur_arfr_type;
u8 pre_retry_limit_type;
u8 cur_retry_limit_type;
u8 pre_ampdu_time_type;
u8 cur_ampdu_time_type;
u32 arp_cnt;
u32 pre_ext_ant_switch_status;
u32 cur_ext_ant_switch_status;
u8 error_condition;
boolean pre_agc_table_en;
boolean cur_agc_table_en;
};
struct coex_sta_8822b_1ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
u8 num_of_profile;
boolean under_lps;
boolean under_ips;
u32 specific_pkt_period_cnt;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
boolean is_hiPri_rx_overhead;
s8 bt_rssi;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
u8 bt_info_c2h[BT_INFO_SRC_8822B_1ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8822B_1ANT_MAX];
boolean bt_whck_test;
boolean c2h_bt_inquiry_page;
boolean c2h_bt_remote_name_req;
boolean c2h_bt_page; /* Add for win8.1 page out issue */
boolean wifi_is_high_pri_task; /* Add for win8.1 page out issue */
u8 bt_info_ext;
u8 bt_info_ext2;
u32 pop_event_cnt;
u8 scan_ap_num;
u8 bt_retry_cnt;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_vht;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_vht;
boolean cck_lock;
boolean cck_lock_ever;
boolean cck_lock_warn;
u8 coex_table_type;
boolean force_lps_ctrl;
boolean concurrent_rx_mode_on;
u16 score_board;
u8 isolation_btween_wb; /* 0~ 50 */
u8 a2dp_bit_pool;
u8 cut_version;
boolean acl_busy;
boolean bt_create_connection;
u32 bt_coex_supported_feature;
u32 bt_coex_supported_version;
u8 bt_ble_scan_type;
u32 bt_ble_scan_para[3];
boolean run_time_state;
boolean freeze_coexrun_by_btinfo;
boolean is_A2DP_3M;
boolean voice_over_HOGP;
u8 bt_info;
boolean is_autoslot;
u8 forbidden_slot;
u8 hid_busy_num;
u8 hid_pair_cnt;
u32 cnt_RemoteNameReq;
u32 cnt_setupLink;
u32 cnt_ReInit;
u32 cnt_IgnWlanAct;
u32 cnt_Page;
u32 cnt_RoleSwitch;
u16 bt_reg_vendor_ac;
u16 bt_reg_vendor_ae;
boolean is_setupLink;
u8 wl_noisy_level;
u32 gnt_error_cnt;
u8 bt_afh_map[10];
u8 bt_relink_downcount;
boolean is_tdma_btautoslot;
boolean is_tdma_btautoslot_hang;
u8 switch_band_notify_to;
boolean is_rf_state_off;
boolean is_hid_low_pri_tx_overhead;
boolean is_bt_multi_link;
boolean is_bt_a2dp_sink;
boolean is_set_ps_state_fail;
u8 cnt_set_ps_state_fail;
u8 wl_fw_dbg_info[10];
u8 wl_rx_rate;
u8 wl_rts_rx_rate;
u8 wl_center_channel;
u16 score_board_WB;
boolean is_hid_rcu;
u16 legacy_forbidden_slot;
u16 le_forbidden_slot;
u8 bt_a2dp_vendor_id;
u32 bt_a2dp_device_name;
boolean is_ble_scan_toggle;
boolean is_bt_opp_exist;
boolean gl_wifi_busy;
};
struct rfe_type_8822b_1ant {
u8 rfe_module_type;
boolean ext_ant_switch_exist;
u8 ext_ant_switch_type;
/* iF 0: ANTSW(rfe_sel9)=0, ANTSWB(rfe_sel8)=1 => Ant to BT/5G */
u8 ext_ant_switch_ctrl_polarity;
};
#define BT_8822B_1ANT_ANTDET_PSD_POINTS 256 /* MAX:1024 */
#define BT_8822B_1ANT_ANTDET_PSD_AVGNUM 1 /* MAX:3 */
#define BT_8822B_1ANT_ANTDET_BUF_LEN 16
struct psdscan_sta_8822b_1ant {
u32 ant_det_bt_le_channel; /* BT LE Channel ex:2412 */
u32 ant_det_bt_tx_time;
u32 ant_det_pre_psdscan_peak_val;
boolean ant_det_is_ant_det_available;
u32 ant_det_psd_scan_peak_val;
boolean ant_det_is_btreply_available;
u32 ant_det_psd_scan_peak_freq;
u8 ant_det_result;
u8 ant_det_peak_val[BT_8822B_1ANT_ANTDET_BUF_LEN];
u8 ant_det_peak_freq[BT_8822B_1ANT_ANTDET_BUF_LEN];
u32 ant_det_try_count;
u32 ant_det_fail_count;
u32 ant_det_inteval_count;
u32 ant_det_thres_offset;
u32 real_cent_freq;
s32 real_offset;
u32 real_span;
u32 psd_band_width; /* unit: Hz */
u32 psd_point; /* 128/256/512/1024 */
u32 psd_report[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_report_max_hold[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_start_point;
u32 psd_stop_point;
u32 psd_max_value_point;
u32 psd_max_value;
u32 psd_start_base;
u32 psd_avg_num; /* 1/8/16/32 */
u32 psd_gen_count;
boolean is_psd_running;
boolean is_psd_show_max_only;
boolean is_AntDet_running;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8822b1ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b1ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b1ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8822b1ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b1ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b1ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b1ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b1ant_scan_notify_without_bt(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b1ant_switchband_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b1ant_switchband_notify_without_bt(IN struct btc_coexist
*btcoexist,
IN u8 type);
void ex_halbtc8822b1ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b1ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8822b1ant_wl_fwdbginfo_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8822b1ant_rx_rate_change_notify(IN struct btc_coexist *btcoexist,
IN BOOLEAN is_data_frame, IN u8 btc_rate_id);
void ex_halbtc8822b1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b1ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b1ant_pnp_notify(IN struct btc_coexist *btcoexist,
IN u8 pnp_state);
void ex_halbtc8822b1ant_ScoreBoardStatusNotify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8822b1ant_coex_dm_reset(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b1ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b1ant_display_simple_coex_info(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b1ant_display_coex_info(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b1ant_antenna_detection(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8822b1ant_antenna_isolation(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8822b1ant_psd_scan(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8822b1ant_display_ant_detection(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b1ant_dbg_control(IN struct btc_coexist *btcoexist,
IN u8 op_code, IN u8 op_len, IN u8 *pdata);
#else
#define ex_halbtc8822b1ant_power_on_setting(btcoexist)
#define ex_halbtc8822b1ant_pre_load_firmware(btcoexist)
#define ex_halbtc8822b1ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8822b1ant_init_coex_dm(btcoexist)
#define ex_halbtc8822b1ant_ips_notify(btcoexist, type)
#define ex_halbtc8822b1ant_lps_notify(btcoexist, type)
#define ex_halbtc8822b1ant_scan_notify(btcoexist, type)
#define ex_halbtc8822b1ant_scan_notify_without_bt(btcoexist, type)
#define ex_halbtc8822b1ant_switchband_notify(btcoexist, type)
#define ex_halbtc8822b1ant_switchband_notify_without_bt(btcoexist, type)
#define ex_halbtc8822b1ant_connect_notify(btcoexist, type)
#define ex_halbtc8822b1ant_media_status_notify(btcoexist, type)
#define ex_halbtc8822b1ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8822b1ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8822b1ant_wl_fwdbginfo_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8822b1ant_rx_rate_change_notify(btcoexist, is_data_frame, btc_rate_id)
#define ex_halbtc8822b1ant_rf_status_notify(btcoexist, type)
#define ex_halbtc8822b1ant_halt_notify(btcoexist)
#define ex_halbtc8822b1ant_pnp_notify(btcoexist, pnp_state)
#define ex_halbtc8822b1ant_ScoreBoardStatusNotify(btcoexist, tmp_buf, length)
#define ex_halbtc8822b1ant_coex_dm_reset(btcoexist)
#define ex_halbtc8822b1ant_periodical(btcoexist)
#define ex_halbtc8822b1ant_display_coex_info(btcoexist)
#define ex_halbtc8822b1ant_antenna_detection(btcoexist, cent_freq, offset, span, seconds)
#define ex_halbtc8822b1ant_antenna_isolation(btcoexist, cent_freq, offset, span, seconds)
#define ex_halbtc8822b1ant_psd_scan(btcoexist, cent_freq, offset, span, seconds)
#define ex_halbtc8822b1ant_display_ant_detection(btcoexist)
#define ex_halbtc8822b1ant_dbg_control(btcoexist, op_code, op_len, pdata)
#endif
#else
void ex_halbtc8822b1ant_init_hw_config_without_bt(IN struct btc_coexist
*btcoexist);
void ex_halbtc8822b1ant_switch_band_without_bt(IN struct btc_coexist *btcoexist,
IN boolean wifi_only_5g);
#endif

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hal/btc/halbtc8822b2ant.c 100644
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hal/btc/halbtc8822b2ant.h 100644
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/******************************************************************************
*
* Copyright(c) 2016 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8822B_SUPPORT == 1)
/* *******************************************
* The following is for 8822B 2Ant BT Co-exist definition
* ******************************************* */
#define BT_8822B_2ANT_COEX_DBG 0
#define BT_AUTO_REPORT_ONLY_8822B_2ANT 1
#define BT_INFO_8822B_2ANT_B_FTP BIT(7)
#define BT_INFO_8822B_2ANT_B_A2DP BIT(6)
#define BT_INFO_8822B_2ANT_B_HID BIT(5)
#define BT_INFO_8822B_2ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8822B_2ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8822B_2ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8822B_2ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8822B_2ANT_B_CONNECTION BIT(0)
#define BTC_RSSI_COEX_THRESH_TOL_8822B_2ANT 2
/* unit: % WiFi RSSI Threshold for 2-Ant free-run/2-Ant TDMA translation.
* (default = 42)
*/
#define BT_8822B_2ANT_WIFI_RSSI_COEXSWITCH_THRES1 30
/* unit: % BT RSSI Threshold for 2-Ant free-run/2-Ant TDMA translation.
* (default = 46)
*/
#define BT_8822B_2ANT_BT_RSSI_COEXSWITCH_THRES1 20
/* unit: % WiFi RSSI Threshold for 1-Ant TDMA/1-Ant PS-TDMA translation.
* (default = 42)
*/
#define BT_8822B_2ANT_WIFI_RSSI_COEXSWITCH_THRES2 30
/* unit: % BT RSSI Threshold for 1-Ant TDMA/1-Ant PS-TDMA translation.
* (default = 46)
*/
#define BT_8822B_2ANT_BT_RSSI_COEXSWITCH_THRES2 20
#define BT_8822B_2ANT_DEFAULT_ISOLATION 25 /* unit: dB */
#define BT_8822B_2ANT_WIFI_MAX_TX_POWER 15 /* unit: dBm */
#define BT_8822B_2ANT_BT_MAX_TX_POWER 3 /* unit: dBm */
#define BT_8822B_2ANT_WIFI_SIR_THRES1 -15 /* unit: dB */
#define BT_8822B_2ANT_WIFI_SIR_THRES2 -30 /* unit: dB */
#define BT_8822B_2ANT_BT_SIR_THRES1 -15 /* unit: dB */
#define BT_8822B_2ANT_BT_SIR_THRES2 -30 /* unit: dB */
/* for Antenna detection */
#define BT_8822B_2ANT_ANTDET_PSDTHRES_BACKGROUND 50
#define BT_8822B_2ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70
#define BT_8822B_2ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 52
#define BT_8822B_2ANT_ANTDET_PSDTHRES_1ANT 40
#define BT_8822B_2ANT_ANTDET_RETRY_INTERVAL 10 /* retry timer if ant det is fail, unit: second */
#define BT_8822B_2ANT_ANTDET_SWEEPPOINT_DELAY 60000
#define BT_8822B_2ANT_ANTDET_ENABLE 0
#define BT_8822B_2ANT_ANTDET_BTTXTIME 100
#define BT_8822B_2ANT_ANTDET_BTTXCHANNEL 39
#define BT_8822B_2ANT_ANTDET_PSD_SWWEEPCOUNT 50
#define BT_8822B_2ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT 30000
enum bt_8822b_2ant_signal_state {
BT_8822B_2ANT_SIG_STA_SET_TO_LOW = 0x0,
BT_8822B_2ANT_SIG_STA_SET_BY_HW = 0x0,
BT_8822B_2ANT_SIG_STA_SET_TO_HIGH = 0x1,
BT_8822B_2ANT_SIG_STA_MAX
};
enum bt_8822b_2ant_path_ctrl_owner {
BT_8822B_2ANT_PCO_BTSIDE = 0x0,
BT_8822B_2ANT_PCO_WLSIDE = 0x1,
BT_8822B_2ANT_PCO_MAX
};
enum bt_8822b_2ant_gnt_ctrl_type {
BT_8822B_2ANT_GNT_TYPE_CTRL_BY_PTA = 0x0,
BT_8822B_2ANT_GNT_TYPE_CTRL_BY_SW = 0x1,
BT_8822B_2ANT_GNT_TYPE_MAX
};
enum bt_8822b_2ant_gnt_ctrl_block {
BT_8822B_2ANT_GNT_BLOCK_RFC_BB = 0x0,
BT_8822B_2ANT_GNT_BLOCK_RFC = 0x1,
BT_8822B_2ANT_GNT_BLOCK_BB = 0x2,
BT_8822B_2ANT_GNT_BLOCK_MAX
};
enum bt_8822b_2ant_lte_coex_table_type {
BT_8822B_2ANT_CTT_WL_VS_LTE = 0x0,
BT_8822B_2ANT_CTT_BT_VS_LTE = 0x1,
BT_8822B_2ANT_CTT_MAX
};
enum bt_8822b_2ant_lte_break_table_type {
BT_8822B_2ANT_LBTT_WL_BREAK_LTE = 0x0,
BT_8822B_2ANT_LBTT_BT_BREAK_LTE = 0x1,
BT_8822B_2ANT_LBTT_LTE_BREAK_WL = 0x2,
BT_8822B_2ANT_LBTT_LTE_BREAK_BT = 0x3,
BT_8822B_2ANT_LBTT_MAX
};
enum bt_info_src_8822b_2ant {
BT_INFO_SRC_8822B_2ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8822B_2ANT_BT_RSP = 0x1,
BT_INFO_SRC_8822B_2ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8822B_2ANT_MAX
};
enum bt_8822b_2ant_bt_status {
BT_8822B_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8822B_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8822B_2ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8822B_2ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8822B_2ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8822B_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8822B_2ANT_BT_STATUS_MAX
};
enum bt_8822b_2ant_coex_algo {
BT_8822B_2ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8822B_2ANT_COEX_ALGO_SCO = 0x1,
BT_8822B_2ANT_COEX_ALGO_HID = 0x2,
BT_8822B_2ANT_COEX_ALGO_A2DP = 0x3,
BT_8822B_2ANT_COEX_ALGO_A2DP_PANHS = 0x4,
BT_8822B_2ANT_COEX_ALGO_PANEDR = 0x5,
BT_8822B_2ANT_COEX_ALGO_PANHS = 0x6,
BT_8822B_2ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
BT_8822B_2ANT_COEX_ALGO_PANEDR_HID = 0x8,
BT_8822B_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
BT_8822B_2ANT_COEX_ALGO_HID_A2DP = 0xa,
BT_8822B_2ANT_COEX_ALGO_NOPROFILEBUSY = 0xb,
BT_8822B_2ANT_COEX_ALGO_A2DPSINK = 0xc,
BT_8822B_2ANT_COEX_ALGO_MAX
};
enum bt_8822b_2ant_ext_ant_switch_type {
BT_8822B_2ANT_EXT_ANT_SWITCH_USE_DPDT = 0x0,
BT_8822B_2ANT_EXT_ANT_SWITCH_USE_SPDT = 0x1,
BT_8822B_2ANT_EXT_ANT_SWITCH_NONE = 0x2,
BT_8822B_2ANT_EXT_ANT_SWITCH_MAX
};
enum bt_8822b_2ant_ext_ant_switch_ctrl_type {
BT_8822B_2ANT_EXT_ANT_SWITCH_CTRL_BY_BBSW = 0x0,
BT_8822B_2ANT_EXT_ANT_SWITCH_CTRL_BY_PTA = 0x1,
BT_8822B_2ANT_EXT_ANT_SWITCH_CTRL_BY_ANTDIV = 0x2,
BT_8822B_2ANT_EXT_ANT_SWITCH_CTRL_BY_MAC = 0x3,
BT_8822B_2ANT_EXT_ANT_SWITCH_CTRL_BY_BT = 0x4,
BT_8822B_2ANT_EXT_ANT_SWITCH_CTRL_MAX
};
enum bt_8822b_2ant_ext_ant_switch_pos_type {
BT_8822B_2ANT_EXT_ANT_SWITCH_MAIN_TO_BT = 0x0,
BT_8822B_2ANT_EXT_ANT_SWITCH_MAIN_TO_WLG = 0x1,
BT_8822B_2ANT_EXT_ANT_SWITCH_MAIN_TO_WLA = 0x2,
BT_8822B_2ANT_EXT_ANT_SWITCH_MAIN_TO_NOCARE = 0x3,
BT_8822B_2ANT_EXT_ANT_SWITCH_MAIN_TO_MAX
};
enum bt_8822b_2ant_ext_band_switch_pos_type {
BT_8822B_2ANT_EXT_BAND_SWITCH_TO_WLG = 0x0,
BT_8822B_2ANT_EXT_BAND_SWITCH_TO_WLA = 0x1,
BT_8822B_2ANT_EXT_BAND_SWITCH_TO_MAX
};
enum bt_8822b_2ant_int_block {
BT_8822B_2ANT_INT_BLOCK_SWITCH_TO_WLG_OF_BTG = 0x0,
BT_8822B_2ANT_INT_BLOCK_SWITCH_TO_WLG_OF_WLAG = 0x1,
BT_8822B_2ANT_INT_BLOCK_SWITCH_TO_WLA_OF_WLAG = 0x2,
BT_8822B_2ANT_INT_BLOCK_SWITCH_TO_MAX
};
enum bt_8822b_2ant_phase {
BT_8822B_2ANT_PHASE_COEX_INIT = 0x0,
BT_8822B_2ANT_PHASE_WLANONLY_INIT = 0x1,
BT_8822B_2ANT_PHASE_WLAN_OFF = 0x2,
BT_8822B_2ANT_PHASE_2G_RUNTIME = 0x3,
BT_8822B_2ANT_PHASE_5G_RUNTIME = 0x4,
BT_8822B_2ANT_PHASE_BTMPMODE = 0x5,
BT_8822B_2ANT_PHASE_ANTENNA_DET = 0x6,
BT_8822B_2ANT_PHASE_COEX_POWERON = 0x7,
BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT = 0x8,
BT_8822B_2ANT_PHASE_2G_FREERUN = 0x9,
BT_8822B_2ANT_PHASE_MAX
};
/*ADD SCOREBOARD TO FIX BT LPS 32K ISSUE WHILE WL BUSY*/
enum bt_8822b_2ant_Scoreboard {
BT_8822B_2ANT_SCOREBOARD_ACTIVE = BIT(0),
BT_8822B_2ANT_SCOREBOARD_ONOFF = BIT(1),
BT_8822B_2ANT_SCOREBOARD_SCAN = BIT(2),
BT_8822B_2ANT_SCOREBOARD_UNDERTEST = BIT(3),
BT_8822B_2ANT_SCOREBOARD_RXGAIN = BIT(4),
BT_8822B_2ANT_SCOREBOARD_WLBUSY = BIT(6)
};
struct coex_dm_8822b_2ant {
/* hw setting */
u32 pre_ant_pos_type;
u32 cur_ant_pos_type;
/* fw mechanism */
u8 pre_bt_dec_pwr_lvl;
u8 cur_bt_dec_pwr_lvl;
u8 pre_fw_dac_swing_lvl;
u8 cur_fw_dac_swing_lvl;
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean reset_tdma_adjust;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
/* sw mechanism */
boolean pre_rf_rx_lpf_shrink;
boolean cur_rf_rx_lpf_shrink;
u32 bt_rf_0x1e_backup;
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
boolean pre_dac_swing_on;
u32 pre_dac_swing_lvl;
boolean cur_dac_swing_on;
u32 cur_dac_swing_lvl;
boolean pre_adc_back_off;
boolean cur_adc_back_off;
boolean pre_agc_table_en;
boolean cur_agc_table_en;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
boolean limited_dig;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
boolean need_recover0x948;
u32 backup0x948;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
boolean is_switch_to_1dot5_ant;
u8 switch_thres_offset;
u32 arp_cnt;
u32 pre_ext_ant_switch_status;
u32 cur_ext_ant_switch_status;
u8 pre_ext_band_switch_status;
u8 cur_ext_band_switch_status;
u8 pre_int_block_status;
u8 cur_int_block_status;
};
struct coex_sta_8822b_2ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean under_lps;
boolean under_ips;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
boolean is_hiPri_rx_overhead;
u8 bt_rssi;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
u8 bt_info_c2h[BT_INFO_SRC_8822B_2ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8822B_2ANT_MAX];
boolean bt_whck_test;
boolean c2h_bt_inquiry_page;
boolean c2h_bt_remote_name_req;
u8 bt_info_ext;
u8 bt_info_ext2;
u32 pop_event_cnt;
u8 scan_ap_num;
u8 bt_retry_cnt;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_vht;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_vht;
u32 acc_crc_ratio;
u32 now_crc_ratio;
boolean cck_lock;
boolean cck_lock_ever;
boolean cck_lock_warn;
u8 coex_table_type;
boolean force_lps_ctrl;
u8 dis_ver_info_cnt;
u8 a2dp_bit_pool;
u8 cut_version;
boolean concurrent_rx_mode_on;
u16 score_board;
u8 isolation_btween_wb; /* 0~ 50 */
u8 wifi_coex_thres;
u8 bt_coex_thres;
u8 wifi_coex_thres2;
u8 bt_coex_thres2;
u8 num_of_profile;
boolean acl_busy;
boolean bt_create_connection;
boolean wifi_is_high_pri_task;
u32 specific_pkt_period_cnt;
u32 bt_coex_supported_feature;
u32 bt_coex_supported_version;
u8 bt_ble_scan_type;
u32 bt_ble_scan_para[3];
boolean run_time_state;
boolean freeze_coexrun_by_btinfo;
boolean is_A2DP_3M;
boolean voice_over_HOGP;
u8 bt_info;
boolean is_autoslot;
u8 forbidden_slot;
u8 hid_busy_num;
u8 hid_pair_cnt;
u32 cnt_RemoteNameReq;
u32 cnt_setupLink;
u32 cnt_ReInit;
u32 cnt_IgnWlanAct;
u32 cnt_Page;
u32 cnt_RoleSwitch;
u16 bt_reg_vendor_ac;
u16 bt_reg_vendor_ae;
boolean is_setupLink;
u8 wl_noisy_level;
u32 gnt_error_cnt;
u8 bt_afh_map[10];
u8 bt_relink_downcount;
boolean is_tdma_btautoslot;
boolean is_tdma_btautoslot_hang;
boolean is_eSCO_mode;
u8 switch_band_notify_to;
boolean is_rf_state_off;
boolean is_hid_low_pri_tx_overhead;
boolean is_bt_multi_link;
boolean is_bt_a2dp_sink;
boolean is_set_ps_state_fail;
u8 cnt_set_ps_state_fail;
u8 wl_fw_dbg_info[10];
u8 wl_rx_rate;
u8 wl_rts_rx_rate;
u8 wl_center_channel;
boolean is_2g_freerun;
u16 score_board_WB;
boolean is_hid_rcu;
u16 legacy_forbidden_slot;
u16 le_forbidden_slot;
u8 bt_a2dp_vendor_id;
u32 bt_a2dp_device_name;
boolean is_ble_scan_toggle;
boolean is_bt_opp_exist;
boolean gl_wifi_busy;
};
#define BT_8822B_2ANT_EXT_BAND_SWITCH_USE_DPDT 0
#define BT_8822B_2ANT_EXT_BAND_SWITCH_USE_SPDT 1
struct rfe_type_8822b_2ant {
u8 rfe_module_type;
boolean ext_ant_switch_exist;
u8 ext_ant_switch_type; /* 0:DPDT, 1:SPDT */
/* iF 0: DPDT_P=0, DPDT_N=1 => BTG to Main, WL_A+G to Aux */
u8 ext_ant_switch_ctrl_polarity;
boolean ext_band_switch_exist;
u8 ext_band_switch_type; /* 0:DPDT, 1:SPDT */
u8 ext_band_switch_ctrl_polarity;
/* If true: WLG at BTG, If false: WLG at WLAG */
boolean wlg_Locate_at_btg;
boolean ext_ant_switch_diversity; /* If diversity on */
};
#define BT_8822B_2ANT_ANTDET_PSD_POINTS 256 /* MAX:1024 */
#define BT_8822B_2ANT_ANTDET_PSD_AVGNUM 1 /* MAX:3 */
#define BT_8822B_2ANT_ANTDET_BUF_LEN 16
struct psdscan_sta_8822b_2ant {
u32 ant_det_bt_le_channel; /* BT LE Channel ex:2412 */
u32 ant_det_bt_tx_time;
u32 ant_det_pre_psdscan_peak_val;
boolean ant_det_is_ant_det_available;
u32 ant_det_psd_scan_peak_val;
boolean ant_det_is_btreply_available;
u32 ant_det_psd_scan_peak_freq;
u8 ant_det_result;
u8 ant_det_peak_val[BT_8822B_2ANT_ANTDET_BUF_LEN];
u8 ant_det_peak_freq[BT_8822B_2ANT_ANTDET_BUF_LEN];
u32 ant_det_try_count;
u32 ant_det_fail_count;
u32 ant_det_inteval_count;
u32 ant_det_thres_offset;
u32 real_cent_freq;
s32 real_offset;
u32 real_span;
u32 psd_band_width; /* unit: Hz */
u32 psd_point; /* 128/256/512/1024 */
u32 psd_report[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_report_max_hold[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_start_point;
u32 psd_stop_point;
u32 psd_max_value_point;
u32 psd_max_value;
u32 psd_max_value2;
/* filter loop_max_value that below BT_8822B_1ANT_ANTDET_PSDTHRES_1ANT,
* and average the rest
*/
u32 psd_avg_value;
/*max value in each loop */
u32 psd_loop_max_value[BT_8822B_2ANT_ANTDET_PSD_SWWEEPCOUNT];
u32 psd_start_base;
u32 psd_avg_num; /* 1/8/16/32 */
u32 psd_gen_count;
boolean is_AntDet_running;
boolean is_psd_show_max_only;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8822b2ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b2ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b2ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8822b2ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b2ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b2ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b2ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b2ant_switchband_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b2ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b2ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8822b2ant_wl_fwdbginfo_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8822b2ant_rx_rate_change_notify(IN struct btc_coexist *btcoexist,
IN BOOLEAN is_data_frame, IN u8 btc_rate_id);
void ex_halbtc8822b2ant_rf_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b2ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b2ant_pnp_notify(IN struct btc_coexist *btcoexist,
IN u8 pnp_state);
void ex_halbtc8822b2ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b2ant_display_simple_coex_info(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b2ant_display_coex_info(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b2ant_antenna_detection(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8822b2ant_display_ant_detection(IN struct btc_coexist *btcoexist);
#else
#define ex_halbtc8822b2ant_power_on_setting(btcoexist)
#define ex_halbtc8822b2ant_pre_load_firmware(btcoexist)
#define ex_halbtc8822b2ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8822b2ant_init_coex_dm(btcoexist)
#define ex_halbtc8822b2ant_ips_notify(btcoexist, type)
#define ex_halbtc8822b2ant_lps_notify(btcoexist, type)
#define ex_halbtc8822b2ant_scan_notify(btcoexist, type)
#define ex_halbtc8822b2ant_switchband_notify(btcoexist, type)
#define ex_halbtc8822b2ant_connect_notify(btcoexist, type)
#define ex_halbtc8822b2ant_media_status_notify(btcoexist, type)
#define ex_halbtc8822b2ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8822b2ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8822b2ant_wl_fwdbginfo_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8822b2ant_rx_rate_change_notify(btcoexist, is_data_frame, btc_rate_id)
#define ex_halbtc8822b2ant_rf_status_notify(btcoexist, type)
#define ex_halbtc8822b2ant_halt_notify(btcoexist)
#define ex_halbtc8822b2ant_pnp_notify(btcoexist, pnp_state)
#define ex_halbtc8822b2ant_periodical(btcoexist)
#define ex_halbtc8822b2ant_display_coex_info(btcoexist)
#define ex_halbtc8822b2ant_display_ant_detection(btcoexist)
#define ex_halbtc8822b2ant_antenna_detection(btcoexist, cent_freq, offset, span, seconds)
#endif
#endif

68
hal/btc/halbtc8822bwifionly.c 100644
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@ -0,0 +1,68 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#include "mp_precomp.h"
VOID
ex_hal8822b_wifi_only_hw_config(
IN struct wifi_only_cfg *pwifionlycfg
)
{
/*BB control*/
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x4c, 0x01800000, 0x2);
/*SW control*/
halwifionly_phy_set_bb_reg(pwifionlycfg, 0xcb4, 0xff, 0x77);
/*antenna mux switch */
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x974, 0x300, 0x3);
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x1990, 0x300, 0x0);
halwifionly_phy_set_bb_reg(pwifionlycfg, 0xcbc, 0x80000, 0x0);
/*switch to WL side controller and gnt_wl gnt_bt debug signal */
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x70, 0xff000000, 0x0e);
/*gnt_wl=1 , gnt_bt=0*/
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x1704, 0xffffffff, 0x7700);
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x1700, 0xffffffff, 0xc00f0038);
}
VOID
ex_hal8822b_wifi_only_scannotify(
IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
)
{
hal8822b_wifi_only_switch_antenna(pwifionlycfg, is_5g);
}
VOID
ex_hal8822b_wifi_only_switchbandnotify(
IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
)
{
hal8822b_wifi_only_switch_antenna(pwifionlycfg, is_5g);
}
VOID
hal8822b_wifi_only_switch_antenna(IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
)
{
if (is_5g)
halwifionly_phy_set_bb_reg(pwifionlycfg, 0xcbc, 0x300, 0x1);
else
halwifionly_phy_set_bb_reg(pwifionlycfg, 0xcbc, 0x300, 0x2);
}

36
platform/platform_aml_s905_sdio.h → hal/btc/halbtc8822bwifionly.h
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@ -1,6 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation.
* Copyright(c) 2016 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
@ -12,17 +12,25 @@
* more details.
*
*****************************************************************************/
#ifndef __PLATFORM_AML_S905_SDIO_H__
#define __PLATFORM_AML_S905_SDIO_H__
#ifndef __INC_HAL8822BWIFIONLYHWCFG_H
#define __INC_HAL8822BWIFIONLYHWCFG_H
#include <linux/version.h> /* Linux vresion */
extern void sdio_reinit(void);
extern void extern_wifi_set_enable(int is_on);
#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 14, 0))
extern void wifi_teardown_dt(void);
extern int wifi_setup_dt(void);
#endif /* kernel < 3.14.0 */
#endif /* __PLATFORM_AML_S905_SDIO_H__ */
VOID
ex_hal8822b_wifi_only_hw_config(
IN struct wifi_only_cfg *pwifionlycfg
);
VOID
ex_hal8822b_wifi_only_scannotify(
IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
);
VOID
ex_hal8822b_wifi_only_switchbandnotify(
IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
);
VOID
hal8822b_wifi_only_switch_antenna(IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
);
#endif

93
hal/efuse/rtl8814a/HalEfuseMask8814A_PCIE.c 100644
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@ -0,0 +1,93 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include <drv_types.h>
#include "HalEfuseMask8814A_PCIE.h"
/******************************************************************************
* MPCIE.TXT
******************************************************************************/
u1Byte Array_MP_8814A_MPCIE[] = {
0xFF,
0xFF,
0xFF,
0xFF,
0xFF,
0xFF,
0xFF,
0xFF,
0xFF,
0xFF,
0xFF,
0xFF,
0xF3,
0xFF,
0x10,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
};
u2Byte
EFUSE_GetArrayLen_MP_8814A_MPCIE(VOID)
{
return sizeof(Array_MP_8814A_MPCIE)/sizeof(u1Byte);
}
VOID
EFUSE_GetMaskArray_MP_8814A_MPCIE(pu1Byte Array)
{
u2Byte len = EFUSE_GetArrayLen_MP_8814A_MPCIE(), i = 0;
for (i = 0; i < len; ++i)
Array[i] = Array_MP_8814A_MPCIE[i];
}
BOOLEAN
EFUSE_IsAddressMasked_MP_8814A_MPCIE(u2Byte Offset)
{
int r = Offset/16;
int c = (Offset%16) / 2;
int result = 0;
if (c < 4) /*Upper double word*/
result = (Array_MP_8814A_MPCIE[r] & (0x10 << c));
else
result = (Array_MP_8814A_MPCIE[r] & (0x01 << (c-4)));
return (result > 0) ? 0 : 1;
}

33
hal/efuse/rtl8814a/HalEfuseMask8814A_PCIE.h 100644
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@ -0,0 +1,33 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/******************************************************************************
* MPCIE.TXT
******************************************************************************/
u2Byte EFUSE_GetArrayLen_MP_8814A_MPCIE(VOID);
VOID EFUSE_GetMaskArray_MP_8814A_MPCIE(pu1Byte Array);
BOOLEAN EFUSE_IsAddressMasked_MP_8814A_MPCIE(u2Byte Offset);

90
hal/efuse/rtl8814a/HalEfuseMask8814A_USB.c 100644
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@ -0,0 +1,90 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include <drv_types.h>
#include "HalEfuseMask8814A_USB.h"
/******************************************************************************
* MUSB.TXT
******************************************************************************/
u1Byte Array_MP_8814A_MUSB[] = {
0xFF,
0xFF,
0xFF,
0xFF,
0xFF,
0xFF,
0xFF,
0xFF,
0xFF,
0xFF,
0xFF,
0xFF,
0xF3,
0x7F,
0xFF,
0xFF,
0xFF,
0x70,
0x04,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
};
u2Byte EFUSE_GetArrayLen_MP_8814A_MUSB(VOID)
{
return sizeof(Array_MP_8814A_MUSB)/sizeof(u1Byte);
}
VOID EFUSE_GetMaskArray_MP_8814A_MUSB(pu1Byte Array)
{
u2Byte len = EFUSE_GetArrayLen_MP_8814A_MUSB(), i = 0;
for (i = 0; i < len; ++i)
Array[i] = Array_MP_8814A_MUSB[i];
}
BOOLEAN EFUSE_IsAddressMasked_MP_8814A_MUSB(u2Byte Offset)
{
int r = Offset/16;
int c = (Offset%16) / 2;
int result = 0;
if (c < 4) /*Upper double word*/
result = (Array_MP_8814A_MUSB[r] & (0x10 << c));
else
result = (Array_MP_8814A_MUSB[r] & (0x01 << (c-4)));
return (result > 0) ? 0 : 1;
}

33
hal/efuse/rtl8814a/HalEfuseMask8814A_USB.h 100644
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@ -0,0 +1,33 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/******************************************************************************
* MUSB.TXT
******************************************************************************/
u2Byte EFUSE_GetArrayLen_MP_8814A_MUSB(VOID);
VOID EFUSE_GetMaskArray_MP_8814A_MUSB(pu1Byte Array);
BOOLEAN EFUSE_IsAddressMasked_MP_8814A_MUSB(u2Byte Offset);

1754
hal/phydm/halrf/rtl8814a/halrf_8814a_ap.c 100644
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File diff suppressed because it is too large Load Diff

164
hal/phydm/halrf/rtl8814a/halrf_8814a_ap.h 100644
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@ -0,0 +1,164 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __HAL_PHY_RF_8814A_H__
#define __HAL_PHY_RF_8814A_H__
/*--------------------------Define Parameters-------------------------------*/
#define IQK_DELAY_TIME_8814A 10 //ms
#define index_mapping_NUM_8814A 15
#define AVG_THERMAL_NUM_8814A 4
#define RF_T_METER_8814A 0x42
#define MAX_PATH_NUM_8814A 4
#include "../halphyrf_ap.h"
void ConfigureTxpowerTrack_8814A(
PTXPWRTRACK_CFG pConfig
);
VOID
GetDeltaSwingTable_8814A(
IN PDM_ODM_T pDM_Odm,
OUT pu1Byte *TemperatureUP_A,
OUT pu1Byte *TemperatureDOWN_A,
OUT pu1Byte *TemperatureUP_B,
OUT pu1Byte *TemperatureDOWN_B
);
VOID
GetDeltaSwingTable_8814A_PathCD(
IN PDM_ODM_T pDM_Odm,
OUT pu1Byte *TemperatureUP_C,
OUT pu1Byte *TemperatureDOWN_C,
OUT pu1Byte *TemperatureUP_D,
OUT pu1Byte *TemperatureDOWN_D
);
VOID
ConfigureTxpowerTrack_8814A(
IN PTXPWRTRACK_CFG pConfig
);
VOID
ODM_TxPwrTrackSetPwr8814A(
IN PDM_ODM_T pDM_Odm,
IN PWRTRACK_METHOD Method,
IN u1Byte RFPath,
IN u1Byte ChannelMappedIndex
);
u1Byte
CheckRFGainOffset(
PDM_ODM_T pDM_Odm,
PWRTRACK_METHOD Method,
u1Byte RFPath
);
//
// LC calibrate
//
void
PHY_LCCalibrate_8814A(
IN PDM_ODM_T pDM_Odm
);
void
phy_LCCalibrate_8814A(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
IN PDM_ODM_T pDM_Odm,
#else
IN PADAPTER pAdapter,
#endif
IN BOOLEAN is2T
);
//
// AP calibrate
//
void
PHY_APCalibrate_8814A(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
IN PDM_ODM_T pDM_Odm,
#else
IN PADAPTER pAdapter,
#endif
IN s1Byte delta);
void
PHY_DigitalPredistortion_8814A( IN PADAPTER pAdapter);
#if 0 //FOR_8814_IQK
VOID
_PHY_SaveADDARegisters(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
IN PDM_ODM_T pDM_Odm,
#else
IN PADAPTER pAdapter,
#endif
IN pu4Byte ADDAReg,
IN pu4Byte ADDABackup,
IN u4Byte RegisterNum
);
VOID
_PHY_PathADDAOn(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
IN PDM_ODM_T pDM_Odm,
#else
IN PADAPTER pAdapter,
#endif
IN pu4Byte ADDAReg,
IN BOOLEAN isPathAOn,
IN BOOLEAN is2T
);
VOID
_PHY_MACSettingCalibration(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
IN PDM_ODM_T pDM_Odm,
#else
IN PADAPTER pAdapter,
#endif
IN pu4Byte MACReg,
IN pu4Byte MACBackup
);
VOID
_PHY_PathAStandBy(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
IN PDM_ODM_T pDM_Odm
#else
IN PADAPTER pAdapter
#endif
);
#endif
#endif // #ifndef __HAL_PHY_RF_8814A_H__

564
hal/phydm/halrf/rtl8814a/halrf_8814a_ce.c 100644
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@ -0,0 +1,564 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include "mp_precomp.h"
#include "../../phydm_precomp.h"
/*---------------------------Define Local Constant---------------------------*/
// 2010/04/25 MH Define the max tx power tracking tx agc power.
#define ODM_TXPWRTRACK_MAX_IDX_8814A 6
/*---------------------------Define Local Constant---------------------------*/
//3============================================================
//3 Tx Power Tracking
//3============================================================
// Add CheckRFGainOffset By YuChen to make sure that RF gain offset will not over upperbound 4'b1010
u8
CheckRFGainOffset(
struct dm_struct *pDM_Odm,
enum pwrtrack_method Method,
u8 RFPath
)
{
s1Byte UpperBound = 10, LowerBound = -5; // 4'b1010 = 10
s1Byte Final_RF_Index = 0;
BOOLEAN bPositive = FALSE;
u32 bitMask = 0;
u8 Final_OFDM_Swing_Index = 0, TxScalingUpperBound = 28, TxScalingLowerBound = 4;// upper bound +2dB, lower bound -10dB
struct dm_rf_calibration_struct * prf_calibrate_info = &(pDM_Odm->rf_calibrate_info);
if(Method == MIX_MODE) //normal Tx power tracking
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("is 8814 MP chip\n"));
bitMask = BIT19;
prf_calibrate_info->absolute_ofdm_swing_idx[RFPath] = prf_calibrate_info->absolute_ofdm_swing_idx[RFPath] + prf_calibrate_info->kfree_offset[RFPath];
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("=========================== [Path-%d] TXBB Offset============================\n", RFPath));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("absolute_ofdm_swing_idx[RFPath](%d) = absolute_ofdm_swing_idx[RFPath](%d) + kfree_offset[RFPath](%d), RFPath=%d\n", prf_calibrate_info->absolute_ofdm_swing_idx[RFPath], prf_calibrate_info->absolute_ofdm_swing_idx[RFPath], prf_calibrate_info->kfree_offset[RFPath], RFPath));
if (prf_calibrate_info->absolute_ofdm_swing_idx[RFPath] >= 0) /* check if RF_Index is positive or not*/
bPositive = TRUE;
else
bPositive = FALSE;
odm_set_rf_reg(pDM_Odm, RFPath, rRF_TxGainOffset, bitMask, bPositive);
bitMask = BIT18|BIT17|BIT16|BIT15;
Final_RF_Index = prf_calibrate_info->absolute_ofdm_swing_idx[RFPath] / 2; /*TxBB 1 step equal 1dB, BB swing 1step equal 0.5dB*/
}
if(Final_RF_Index > UpperBound) //Upper bound = 10dB, if more htan upper bound, then move to bb swing max = +2dB
{
odm_set_rf_reg(pDM_Odm, RFPath, rRF_TxGainOffset, bitMask, UpperBound); //set RF Reg0x55 per path
Final_OFDM_Swing_Index = prf_calibrate_info->default_ofdm_index + (prf_calibrate_info->absolute_ofdm_swing_idx[RFPath] - (UpperBound << 1));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Final_OFDM_Swing_Index(%d) = default_ofdm_index(%d) + (absolute_ofdm_swing_idx[RFPath](%d) - (UpperBound(%d) << 1)), RFPath=%d\n", Final_OFDM_Swing_Index, prf_calibrate_info->default_ofdm_index, prf_calibrate_info->absolute_ofdm_swing_idx[RFPath], UpperBound, RFPath));
if (Final_OFDM_Swing_Index > TxScalingUpperBound) { /* bb swing upper bound = +2dB */
Final_OFDM_Swing_Index = TxScalingUpperBound;
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Final_OFDM_Swing_Index(%d) > TxScalingUpperBound(%d) Final_OFDM_Swing_Index = TxScalingUpperBound\n", Final_OFDM_Swing_Index, TxScalingUpperBound));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("===========================================================================\n"));
}
return Final_OFDM_Swing_Index;
}
else if(Final_RF_Index < LowerBound) // lower bound = -5dB
{
odm_set_rf_reg(pDM_Odm, RFPath, rRF_TxGainOffset, bitMask, (-1)*(LowerBound)); //set RF Reg0x55 per path
Final_OFDM_Swing_Index = prf_calibrate_info->default_ofdm_index - ((LowerBound<<1) - prf_calibrate_info->absolute_ofdm_swing_idx[RFPath]);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Final_OFDM_Swing_Index(%d) = default_ofdm_index(%d) - ((LowerBound(%d)<<1) - absolute_ofdm_swing_idx[RFPath](%d)), RFPath=%d\n", Final_OFDM_Swing_Index, prf_calibrate_info->default_ofdm_index, LowerBound, prf_calibrate_info->absolute_ofdm_swing_idx[RFPath], RFPath));
if (Final_OFDM_Swing_Index < TxScalingLowerBound) { /* BB swing lower bound = -10dB */
Final_OFDM_Swing_Index = TxScalingLowerBound;
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Final_OFDM_Swing_Index(%d) > TxScalingLowerBound(%d) Final_OFDM_Swing_Index = TxScalingLowerBound\n", Final_OFDM_Swing_Index, TxScalingLowerBound));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("===========================================================================\n"));
}
return Final_OFDM_Swing_Index;
}
else // normal case
{
if(bPositive == TRUE)
odm_set_rf_reg(pDM_Odm, RFPath, rRF_TxGainOffset, bitMask, Final_RF_Index); //set RF Reg0x55 per path
else
odm_set_rf_reg(pDM_Odm, RFPath, rRF_TxGainOffset, bitMask, (-1)*Final_RF_Index); //set RF Reg0x55 per path
Final_OFDM_Swing_Index = prf_calibrate_info->default_ofdm_index + (prf_calibrate_info->absolute_ofdm_swing_idx[RFPath])%2;
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Final_OFDM_Swing_Index(%d) = default_ofdm_index(%d) + (absolute_ofdm_swing_idx[RFPath])//2(%d), RFPath=%d\n", Final_OFDM_Swing_Index, prf_calibrate_info->default_ofdm_index, (prf_calibrate_info->absolute_ofdm_swing_idx[RFPath])%2, RFPath));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("===========================================================================\n"));
return Final_OFDM_Swing_Index;
}
return FALSE;
}
VOID
ODM_TxPwrTrackSetPwr8814A(
IN PVOID pDM_VOID,
enum pwrtrack_method Method,
u8 RFPath,
u8 ChannelMappedIndex
)
{
struct dm_struct * pDM_Odm = (struct dm_struct *)pDM_VOID;
PADAPTER Adapter = pDM_Odm->adapter;
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
struct dm_rf_calibration_struct * prf_calibrate_info = &(pDM_Odm->rf_calibrate_info);
u8 Final_OFDM_Swing_Index = 0;
if (Method == MIX_MODE)
{
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("prf_calibrate_info->default_ofdm_index=%d, prf_calibrate_info->absolute_ofdm_swing_idx[RFPath]=%d, RF_Path = %d\n",
prf_calibrate_info->default_ofdm_index, prf_calibrate_info->absolute_ofdm_swing_idx[RFPath], RFPath));
Final_OFDM_Swing_Index = CheckRFGainOffset(pDM_Odm, MIX_MODE, RFPath);
}
else if(Method == TSSI_MODE)
{
odm_set_rf_reg(pDM_Odm, RFPath, rRF_TxGainOffset, BIT18|BIT17|BIT16|BIT15, 0);
}
else if(Method == BBSWING) // use for mp driver clean power tracking status
{
prf_calibrate_info->absolute_ofdm_swing_idx[RFPath] = prf_calibrate_info->absolute_ofdm_swing_idx[RFPath] + prf_calibrate_info->kfree_offset[RFPath];
Final_OFDM_Swing_Index = prf_calibrate_info->default_ofdm_index + (prf_calibrate_info->absolute_ofdm_swing_idx[RFPath]);
odm_set_rf_reg(pDM_Odm, RFPath, rRF_TxGainOffset, BIT18|BIT17|BIT16|BIT15, 0);
}
if((Method == MIX_MODE) || (Method == BBSWING))
{
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("=========================== [Path-%d] BBSWING Offset============================\n", RFPath));
switch(RFPath)
{
case RF_PATH_A:
odm_set_bb_reg(pDM_Odm, rA_TxScale_Jaguar, 0xFFE00000, tx_scaling_table_jaguar[Final_OFDM_Swing_Index]); //set BBswing
ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
("******Path_A Compensate with BBSwing , Final_OFDM_Swing_Index = %d \n", Final_OFDM_Swing_Index));
break;
case RF_PATH_B:
odm_set_bb_reg(pDM_Odm, rB_TxScale_Jaguar, 0xFFE00000, tx_scaling_table_jaguar[Final_OFDM_Swing_Index]); //set BBswing
ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
("******Path_B Compensate with BBSwing , Final_OFDM_Swing_Index = %d \n", Final_OFDM_Swing_Index));
break;
case RF_PATH_C:
odm_set_bb_reg(pDM_Odm, rC_TxScale_Jaguar2, 0xFFE00000, tx_scaling_table_jaguar[Final_OFDM_Swing_Index]); //set BBswing
ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
("******Path_C Compensate with BBSwing , Final_OFDM_Swing_Index = %d \n", Final_OFDM_Swing_Index));
break;
case RF_PATH_D:
odm_set_bb_reg(pDM_Odm, rD_TxScale_Jaguar2, 0xFFE00000, tx_scaling_table_jaguar[Final_OFDM_Swing_Index]); //set BBswing
ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
("******Path_D Compensate with BBSwing , Final_OFDM_Swing_Index = %d \n", Final_OFDM_Swing_Index));
break;
default:
ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
("Wrong Path name!!!! \n"));
break;
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("===========================================================================\n"));
}
return;
} // ODM_TxPwrTrackSetPwr8814A
VOID
GetDeltaSwingTable_8814A(
IN PVOID pDM_VOID,
u8* *TemperatureUP_A,
u8* *TemperatureDOWN_A,
u8* *TemperatureUP_B,
u8* *TemperatureDOWN_B
)
{
struct dm_struct * pDM_Odm = (struct dm_struct *)pDM_VOID;
PADAPTER Adapter = pDM_Odm->adapter;
struct dm_rf_calibration_struct * prf_calibrate_info = &(pDM_Odm->rf_calibrate_info);
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
u8 TxRate = 0xFF;
u8 channel = pHalData->current_channel;
if (*(pDM_Odm->mp_mode) == TRUE) {
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
#if (MP_DRIVER == 1)
PMPT_CONTEXT pMptCtx = &(Adapter->mpt_ctx);
TxRate = mpt_to_mgnt_rate(pMptCtx->mpt_rate_index);
#endif
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.mpt_ctx);
TxRate = mpt_to_mgnt_rate(pMptCtx->mpt_rate_index);
#endif
#endif
} else {
u2Byte rate = *(pDM_Odm->forced_data_rate);
if (!rate) { /*auto rate*/
if (pDM_Odm->tx_rate != 0xFF) {
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->tx_rate);
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
TxRate = hw_rate_to_m_rate(pDM_Odm->tx_rate);
#endif
}
} else { /*force rate*/
TxRate = (u8)rate;
}
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Power Tracking TxRate=0x%X\n", TxRate));
if (1 <= channel && channel <= 14) {
if (IS_CCK_RATE(TxRate)) {
*TemperatureUP_A = prf_calibrate_info->delta_swing_table_idx_2g_cck_a_p;
*TemperatureDOWN_A = prf_calibrate_info->delta_swing_table_idx_2g_cck_a_n;
*TemperatureUP_B = prf_calibrate_info->delta_swing_table_idx_2g_cck_b_p;
*TemperatureDOWN_B = prf_calibrate_info->delta_swing_table_idx_2g_cck_b_n;
} else {
*TemperatureUP_A = prf_calibrate_info->delta_swing_table_idx_2ga_p;
*TemperatureDOWN_A = prf_calibrate_info->delta_swing_table_idx_2ga_n;
*TemperatureUP_B = prf_calibrate_info->delta_swing_table_idx_2gb_p;
*TemperatureDOWN_B = prf_calibrate_info->delta_swing_table_idx_2gb_n;
}
} else if (36 <= channel && channel <= 64) {
*TemperatureUP_A = prf_calibrate_info->delta_swing_table_idx_5ga_p[0];
*TemperatureDOWN_A = prf_calibrate_info->delta_swing_table_idx_5ga_n[0];
*TemperatureUP_B = prf_calibrate_info->delta_swing_table_idx_5gb_p[0];
*TemperatureDOWN_B = prf_calibrate_info->delta_swing_table_idx_5gb_n[0];
} else if (100 <= channel && channel <= 144) {
*TemperatureUP_A = prf_calibrate_info->delta_swing_table_idx_5ga_p[1];
*TemperatureDOWN_A = prf_calibrate_info->delta_swing_table_idx_5ga_n[1];
*TemperatureUP_B = prf_calibrate_info->delta_swing_table_idx_5gb_p[1];
*TemperatureDOWN_B = prf_calibrate_info->delta_swing_table_idx_5gb_n[1];
} else if (149 <= channel && channel <= 173) {
*TemperatureUP_A = prf_calibrate_info->delta_swing_table_idx_5ga_p[2];
*TemperatureDOWN_A = prf_calibrate_info->delta_swing_table_idx_5ga_n[2];
*TemperatureUP_B = prf_calibrate_info->delta_swing_table_idx_5gb_p[2];
*TemperatureDOWN_B = prf_calibrate_info->delta_swing_table_idx_5gb_n[2];
} else {
*TemperatureUP_A = (u8*)delta_swing_table_idx_2ga_p_8188e;
*TemperatureDOWN_A = (u8*)delta_swing_table_idx_2ga_n_8188e;
*TemperatureUP_B = (u8*)delta_swing_table_idx_2ga_p_8188e;
*TemperatureDOWN_B = (u8*)delta_swing_table_idx_2ga_n_8188e;
}
return;
}
VOID
GetDeltaSwingTable_8814A_PathCD(
IN PVOID pDM_VOID,
u8* *TemperatureUP_C,
u8* *TemperatureDOWN_C,
u8* *TemperatureUP_D,
u8* *TemperatureDOWN_D
)
{
struct dm_struct * pDM_Odm = (struct dm_struct *)pDM_VOID;
PADAPTER Adapter = pDM_Odm->adapter;
struct dm_rf_calibration_struct * prf_calibrate_info = &(pDM_Odm->rf_calibrate_info);
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
u8 TxRate = 0xFF;
u8 channel = pHalData->current_channel;
if (*(pDM_Odm->mp_mode) == TRUE) {
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
#if (MP_DRIVER == 1)
PMPT_CONTEXT pMptCtx = &(Adapter->mpt_ctx);
TxRate = mpt_to_mgnt_rate(pMptCtx->mpt_rate_index);
#endif
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.mpt_ctx);
TxRate = mpt_to_mgnt_rate(pMptCtx->mpt_rate_index);
#endif
#endif
} else {
u2Byte rate = *(pDM_Odm->forced_data_rate);
if (!rate) { /*auto rate*/
if (pDM_Odm->tx_rate != 0xFF) {
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->tx_rate);
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
TxRate = hw_rate_to_m_rate(pDM_Odm->tx_rate);
#endif
}
} else { /*force rate*/
TxRate = (u8)rate;
}
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Power Tracking TxRate=0x%X\n", TxRate));
if ( 1 <= channel && channel <= 14) {
if (IS_CCK_RATE(TxRate)) {
*TemperatureUP_C = prf_calibrate_info->delta_swing_table_idx_2g_cck_c_p;
*TemperatureDOWN_C = prf_calibrate_info->delta_swing_table_idx_2g_cck_c_n;
*TemperatureUP_D = prf_calibrate_info->delta_swing_table_idx_2g_cck_d_p;
*TemperatureDOWN_D = prf_calibrate_info->delta_swing_table_idx_2g_cck_d_n;
} else {
*TemperatureUP_C = prf_calibrate_info->delta_swing_table_idx_2gc_p;
*TemperatureDOWN_C = prf_calibrate_info->delta_swing_table_idx_2gc_n;
*TemperatureUP_D = prf_calibrate_info->delta_swing_table_idx_2gd_p;
*TemperatureDOWN_D = prf_calibrate_info->delta_swing_table_idx_2gd_n;
}
} else if (36 <= channel && channel <= 64) {
*TemperatureUP_C = prf_calibrate_info->delta_swing_table_idx_5gc_p[0];
*TemperatureDOWN_C = prf_calibrate_info->delta_swing_table_idx_5gc_n[0];
*TemperatureUP_D = prf_calibrate_info->delta_swing_table_idx_5gd_p[0];
*TemperatureDOWN_D = prf_calibrate_info->delta_swing_table_idx_5gd_n[0];
} else if (100 <= channel && channel <= 144) {
*TemperatureUP_C = prf_calibrate_info->delta_swing_table_idx_5gc_p[1];
*TemperatureDOWN_C = prf_calibrate_info->delta_swing_table_idx_5gc_n[1];
*TemperatureUP_D = prf_calibrate_info->delta_swing_table_idx_5gd_p[1];
*TemperatureDOWN_D = prf_calibrate_info->delta_swing_table_idx_5gd_n[1];
} else if (149 <= channel && channel <= 173) {
*TemperatureUP_C = prf_calibrate_info->delta_swing_table_idx_5gc_p[2];
*TemperatureDOWN_C = prf_calibrate_info->delta_swing_table_idx_5gc_n[2];
*TemperatureUP_D = prf_calibrate_info->delta_swing_table_idx_5gd_p[2];
*TemperatureDOWN_D = prf_calibrate_info->delta_swing_table_idx_5gd_n[2];
} else {
*TemperatureUP_C = (u8*)delta_swing_table_idx_2ga_p_8188e;
*TemperatureDOWN_C = (u8*)delta_swing_table_idx_2ga_n_8188e;
*TemperatureUP_D = (u8*)delta_swing_table_idx_2ga_p_8188e;
*TemperatureDOWN_D = (u8*)delta_swing_table_idx_2ga_n_8188e;
}
return;
}
void configure_txpower_track_8814a(
struct txpwrtrack_cfg *pConfig
)
{
pConfig->swing_table_size_cck = CCK_TABLE_SIZE;
pConfig->swing_table_size_ofdm = OFDM_TABLE_SIZE;
pConfig->threshold_iqk = 8;
pConfig->average_thermal_num = AVG_THERMAL_NUM_8814A;
pConfig->rf_path_count = MAX_PATH_NUM_8814A;
pConfig->thermal_reg_addr = RF_T_METER_88E;
pConfig->odm_tx_pwr_track_set_pwr = ODM_TxPwrTrackSetPwr8814A;
pConfig->do_iqk = DoIQK_8814A;
pConfig->phy_lc_calibrate = phy_lc_calibrate_8814a;
pConfig->get_delta_swing_table = GetDeltaSwingTable_8814A;
pConfig->get_delta_swing_table8814only = GetDeltaSwingTable_8814A_PathCD;
}
VOID
_phy_lc_calibrate_8814a(
IN struct dm_struct * pDM_Odm,
IN BOOLEAN is2T
)
{
u32 /*RF_Amode=0, RF_Bmode=0,*/ LC_Cal = 0, tmp = 0, cnt;
//Check continuous TX and Packet TX
u32 reg0x914 = odm_read_4byte(pDM_Odm, rSingleTone_ContTx_Jaguar);;
// Backup RF reg18.
if((reg0x914 & 0x70000) == 0)
odm_write_1byte(pDM_Odm, REG_TXPAUSE, 0xFF);
//3 3. Read RF reg18
LC_Cal = odm_get_rf_reg(pDM_Odm, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask);
//3 4. Set LC calibration begin bit15
odm_set_rf_reg(pDM_Odm, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, 0x1b126);
ODM_delay_ms(100);
for (cnt = 0; cnt < 100; cnt++) {
if (odm_get_rf_reg(pDM_Odm, RF_PATH_A, RF_CHNLBW, 0x8000) != 0x1)
break;
ODM_delay_ms(10);
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("retry cnt = %d\n", cnt));
odm_set_rf_reg( pDM_Odm, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, 0x13126);
odm_set_rf_reg( pDM_Odm, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, 0x13124);
//3 Restore original situation
if((reg0x914 & 70000) == 0)
odm_write_1byte(pDM_Odm, REG_TXPAUSE, 0x00);
// Recover channel number
odm_set_rf_reg(pDM_Odm, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, LC_Cal);
//DbgPrint("Call %s\n", __FUNCTION__);
}
VOID
phy_APCalibrate_8814A(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
IN struct dm_struct * pDM_Odm,
#else
IN PADAPTER pAdapter,
#endif
IN s1Byte delta,
IN BOOLEAN is2T
)
{
}
VOID
phy_lc_calibrate_8814a(
IN PVOID pDM_VOID
)
{
BOOLEAN bStartContTx = FALSE, bSingleTone = FALSE, bCarrierSuppression = FALSE;
struct dm_struct * pDM_Odm = (struct dm_struct *)pDM_VOID;
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
PADAPTER pAdapter = pDM_Odm->adapter;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
#if (MP_DRIVER == 1)
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
PMPT_CONTEXT pMptCtx = &(pAdapter->mpt_ctx);
bStartContTx = pMptCtx->bStartContTx;
bSingleTone = pMptCtx->bSingleTone;
bCarrierSuppression = pMptCtx->bCarrierSuppression;
#else
PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx);
#endif
#endif
#endif
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("===> PHY_LCCalibrate_8814A\n"));
//#if (MP_DRIVER == 1)
_phy_lc_calibrate_8814a(pDM_Odm, TRUE);
//#endif
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("<=== PHY_LCCalibrate_8814A\n"));
}
VOID
PHY_APCalibrate_8814A(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
IN struct dm_struct * pDM_Odm,
#else
IN PADAPTER pAdapter,
#endif
IN s1Byte delta
)
{
}
VOID
PHY_DPCalibrate_8814A(
IN struct dm_struct * pDM_Odm
)
{
}
BOOLEAN
phy_QueryRFPathSwitch_8814A(
IN PADAPTER pAdapter
)
{
return TRUE;
}
BOOLEAN PHY_QueryRFPathSwitch_8814A(
IN PADAPTER pAdapter
)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
#if DISABLE_BB_RF
return TRUE;
#endif
return phy_QueryRFPathSwitch_8814A(pAdapter);
}
VOID _phy_SetRFPathSwitch_8814A(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
IN struct dm_struct * pDM_Odm,
#else
IN PADAPTER pAdapter,
#endif
IN BOOLEAN bMain,
IN BOOLEAN is2T
)
{
}
VOID phy_set_rf_path_switch_8814a(
#if ((DM_ODM_SUPPORT_TYPE & ODM_AP) || (DM_ODM_SUPPORT_TYPE == ODM_CE))
IN struct dm_struct * pDM_Odm,
#else
IN PADAPTER pAdapter,
#endif
IN boolean bMain
)
{
}

112
hal/phydm/halrf/rtl8814a/halrf_8814a_ce.h 100644
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@ -0,0 +1,112 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __HAL_PHY_RF_8814A_H__
#define __HAL_PHY_RF_8814A_H__
/*--------------------------Define Parameters-------------------------------*/
#define AVG_THERMAL_NUM_8814A 4
#define RF_T_METER_8814A 0x42
#include "../halphyrf_ce.h"
void configure_txpower_track_8814a(
struct txpwrtrack_cfg *pConfig
);
VOID
GetDeltaSwingTable_8814A(
IN PVOID pDM_VOID,
u8* *TemperatureUP_A,
u8* *TemperatureDOWN_A,
u8* *TemperatureUP_B,
u8* *TemperatureDOWN_B
);
VOID
GetDeltaSwingTable_8814A_PathCD(
IN PVOID pDM_VOID,
u8* *TemperatureUP_C,
u8* *TemperatureDOWN_C,
u8* *TemperatureUP_D,
u8* *TemperatureDOWN_D
);
VOID
ODM_TxPwrTrackSetPwr8814A(
IN PVOID pDM_VOID,
enum pwrtrack_method Method,
u8 RFPath,
u8 ChannelMappedIndex
);
u8
CheckRFGainOffset(
struct dm_struct *pDM_Odm,
enum pwrtrack_method Method,
u8 RFPath
);
VOID
phy_iq_calibrate_8814a(
IN PVOID pDM_VOID,
boolean bReCovery
);
//
// LC calibrate
//
void
phy_lc_calibrate_8814a(
IN PVOID pDM_VOID
);
//
// AP calibrate
//
void
PHY_APCalibrate_8814A(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
struct dm_struct * pDM_Odm,
#else
IN PADAPTER pAdapter,
#endif
IN s1Byte delta
);
VOID
PHY_DPCalibrate_8814A(
struct dm_struct * pDM_Odm
);
VOID phy_set_rf_path_switch_8814a(
#if ((DM_ODM_SUPPORT_TYPE & ODM_AP) || (DM_ODM_SUPPORT_TYPE == ODM_CE))
struct dm_struct * pDM_Odm,
#else
IN PADAPTER pAdapter,
#endif
boolean bMain
);
#endif // #ifndef __HAL_PHY_RF_8188E_H__

528
hal/phydm/halrf/rtl8814a/halrf_8814a_win.c 100644
View File

@ -0,0 +1,528 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include "mp_precomp.h"
#include "../phydm_precomp.h"
#if (RTL8814A_SUPPORT == 1)
/*---------------------------Define Local Constant---------------------------*/
// 2010/04/25 MH Define the max tx power tracking tx agc power.
#define ODM_TXPWRTRACK_MAX_IDX_8814A 6
/*---------------------------Define Local Constant---------------------------*/
//3============================================================
//3 Tx Power Tracking
//3============================================================
// Add CheckRFGainOffset By YuChen to make sure that RF gain offset will not over upperbound 4'b1010
u1Byte
CheckRFGainOffset(
PDM_ODM_T pDM_Odm,
u1Byte RFPath
)
{
u1Byte UpperBound = 10; // 4'b1010 = 10
u1Byte Final_RF_Index = 0;
BOOLEAN bPositive = FALSE;
PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo);
if( pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath] >= 0) // check if RF_Index is positive or not
{
Final_RF_Index = pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath] >> 1;
bPositive = TRUE;
ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)RFPath, rRF_TxGainOffset, BIT15, bPositive);
}
else
{
Final_RF_Index = (-1)*pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath] >> 1;
bPositive = FALSE;
ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)RFPath, rRF_TxGainOffset, BIT15, bPositive);
}
if(bPositive == TRUE)
{
if(Final_RF_Index >= UpperBound)
{
ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)RFPath, rRF_TxGainOffset, 0xF0000, UpperBound); //set RF Reg0x55 per path
return UpperBound;
}
else
{
ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)RFPath, rRF_TxGainOffset, 0xF0000, Final_RF_Index); //set RF Reg0x55 per path
return Final_RF_Index;
}
}
else
{
ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)RFPath, rRF_TxGainOffset, 0xF0000, Final_RF_Index); //set RF Reg0x55 per path
return Final_RF_Index;
}
return FALSE;
}
VOID
ODM_TxPwrTrackSetPwr8814A(
PDM_ODM_T pDM_Odm,
PWRTRACK_METHOD Method,
u1Byte RFPath,
u1Byte ChannelMappedIndex
)
{
u1Byte Final_OFDM_Swing_Index = 0;
u1Byte Final_CCK_Swing_Index = 0;
u1Byte Final_RF_Index = 0;
u1Byte UpperBound = 10, TxScalingUpperBound = 28; // Upperbound = 4'b1010, TxScalingUpperBound = +2 dB
PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo);
if (Method == MIX_MODE)
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("pRFCalibrateInfo->DefaultOfdmIndex=%d, pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath]=%d, RF_Path = %d\n",
pRFCalibrateInfo->DefaultOfdmIndex, pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath], RFPath));
Final_CCK_Swing_Index = pRFCalibrateInfo->DefaultCckIndex + pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath];
Final_OFDM_Swing_Index = pRFCalibrateInfo->DefaultOfdmIndex + (pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath])%2;
Final_RF_Index = CheckRFGainOffset(pDM_Odm, RFPath); // check if Final_RF_Index >= 10
if((Final_RF_Index == UpperBound) && (pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath] >= 0)) // check BBSW is not over +2dB
{
Final_OFDM_Swing_Index = pRFCalibrateInfo->DefaultOfdmIndex + (pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath] - (UpperBound << 1));
if(Final_OFDM_Swing_Index > TxScalingUpperBound)
Final_OFDM_Swing_Index = TxScalingUpperBound;
}
switch(RFPath)
{
case ODM_RF_PATH_A:
ODM_SetBBReg(pDM_Odm, rA_TxScale_Jaguar, 0xFFE00000, TxScalingTable_Jaguar[Final_OFDM_Swing_Index]); //set BBswing
ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
("******Path_A Compensate with BBSwing , Final_OFDM_Swing_Index = %d, Final_RF_Index = %d \n", Final_OFDM_Swing_Index, Final_RF_Index));
break;
case ODM_RF_PATH_B:
ODM_SetBBReg(pDM_Odm, rB_TxScale_Jaguar, 0xFFE00000, TxScalingTable_Jaguar[Final_OFDM_Swing_Index]); //set BBswing
ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
("******Path_B Compensate with BBSwing , Final_OFDM_Swing_Index = %d, Final_RF_Index = %d \n", Final_OFDM_Swing_Index, Final_RF_Index));
break;
case ODM_RF_PATH_C:
ODM_SetBBReg(pDM_Odm, rC_TxScale_Jaguar2, 0xFFE00000, TxScalingTable_Jaguar[Final_OFDM_Swing_Index]); //set BBswing
ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
("******Path_C Compensate with BBSwing , Final_OFDM_Swing_Index = %d, Final_RF_Index = %d \n", Final_OFDM_Swing_Index, Final_RF_Index));
break;
case ODM_RF_PATH_D:
ODM_SetBBReg(pDM_Odm, rD_TxScale_Jaguar2, 0xFFE00000, TxScalingTable_Jaguar[Final_OFDM_Swing_Index]); //set BBswing
ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
("******Path_D Compensate with BBSwing , Final_OFDM_Swing_Index = %d, Final_RF_Index = %d \n", Final_OFDM_Swing_Index, Final_RF_Index));
break;
default:
ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
("Wrong Path name!!!! \n"));
break;
}
}
return;
} // ODM_TxPwrTrackSetPwr8814A
VOID
GetDeltaSwingTable_8814A(
IN PDM_ODM_T pDM_Odm,
OUT pu1Byte *TemperatureUP_A,
OUT pu1Byte *TemperatureDOWN_A,
OUT pu1Byte *TemperatureUP_B,
OUT pu1Byte *TemperatureDOWN_B
)
{
PADAPTER Adapter = pDM_Odm->Adapter;
PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo);
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
u1Byte TxRate = 0xFF;
u1Byte channel = pHalData->CurrentChannel;
if (pDM_Odm->mp_mode == TRUE) {
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
#if (MP_DRIVER == 1)
PMPT_CONTEXT pMptCtx = &(Adapter->MptCtx);
TxRate = MptToMgntRate(pMptCtx->MptRateIndex);
#endif
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.MptCtx);
TxRate = MptToMgntRate(pMptCtx->MptRateIndex);
#endif
#endif
} else {
u2Byte rate = *(pDM_Odm->pForcedDataRate);
if (!rate) { /*auto rate*/
if (rate != 0xFF) {
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->TxRate);
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
TxRate = HwRateToMRate(pDM_Odm->TxRate);
#endif
}
} else { /*force rate*/
TxRate = (u1Byte)rate;
}
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Power Tracking TxRate=0x%X\n", TxRate));
if (1 <= channel && channel <= 14) {
if (IS_CCK_RATE(TxRate)) {
*TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_P;
*TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_N;
*TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_P;
*TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_N;
} else {
*TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GA_P;
*TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GA_N;
*TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_2GB_P;
*TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_2GB_N;
}
} else if (36 <= channel && channel <= 64) {
*TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P[0];
*TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N[0];
*TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P[0];
*TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N[0];
} else if (100 <= channel && channel <= 144) {
*TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P[1];
*TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N[1];
*TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P[1];
*TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N[1];
} else if (149 <= channel && channel <= 173) {
*TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P[2];
*TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N[2];
*TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P[2];
*TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N[2];
} else {
*TemperatureUP_A = (pu1Byte)DeltaSwingTableIdx_2GA_P_8188E;
*TemperatureDOWN_A = (pu1Byte)DeltaSwingTableIdx_2GA_N_8188E;
*TemperatureUP_B = (pu1Byte)DeltaSwingTableIdx_2GA_P_8188E;
*TemperatureDOWN_B = (pu1Byte)DeltaSwingTableIdx_2GA_N_8188E;
}
return;
}
VOID
GetDeltaSwingTable_8814A_PathCD(
IN PDM_ODM_T pDM_Odm,
OUT pu1Byte *TemperatureUP_C,
OUT pu1Byte *TemperatureDOWN_C,
OUT pu1Byte *TemperatureUP_D,
OUT pu1Byte *TemperatureDOWN_D
)
{
PADAPTER Adapter = pDM_Odm->Adapter;
PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo);
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
u1Byte TxRate = 0xFF;
u1Byte channel = pHalData->CurrentChannel;
if (pDM_Odm->mp_mode == TRUE) {
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
#if (MP_DRIVER == 1)
PMPT_CONTEXT pMptCtx = &(Adapter->MptCtx);
TxRate = MptToMgntRate(pMptCtx->MptRateIndex);
#endif
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.MptCtx);
TxRate = MptToMgntRate(pMptCtx->MptRateIndex);
#endif
#endif
} else {
u2Byte rate = *(pDM_Odm->pForcedDataRate);
if (!rate) { /*auto rate*/
if (rate != 0xFF) {
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->TxRate);
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
TxRate = HwRateToMRate(pDM_Odm->TxRate);
#endif
}
} else { /*force rate*/
TxRate = (u1Byte)rate;
}
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Power Tracking TxRate=0x%X\n", TxRate));
if ( 1 <= channel && channel <= 14) {
if (IS_CCK_RATE(TxRate)) {
*TemperatureUP_C = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKC_P;
*TemperatureDOWN_C = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKC_N;
*TemperatureUP_D = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKD_P;
*TemperatureDOWN_D = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKD_N;
} else {
*TemperatureUP_C = pRFCalibrateInfo->DeltaSwingTableIdx_2GC_P;
*TemperatureDOWN_C = pRFCalibrateInfo->DeltaSwingTableIdx_2GC_N;
*TemperatureUP_D = pRFCalibrateInfo->DeltaSwingTableIdx_2GD_P;
*TemperatureDOWN_D = pRFCalibrateInfo->DeltaSwingTableIdx_2GD_N;
}
} else if (36 <= channel && channel <= 64) {
*TemperatureUP_C = pRFCalibrateInfo->DeltaSwingTableIdx_5GC_P[0];
*TemperatureDOWN_C = pRFCalibrateInfo->DeltaSwingTableIdx_5GC_N[0];
*TemperatureUP_D = pRFCalibrateInfo->DeltaSwingTableIdx_5GD_P[0];
*TemperatureDOWN_D = pRFCalibrateInfo->DeltaSwingTableIdx_5GD_N[0];
} else if (100 <= channel && channel <= 144) {
*TemperatureUP_C = pRFCalibrateInfo->DeltaSwingTableIdx_5GC_P[1];
*TemperatureDOWN_C = pRFCalibrateInfo->DeltaSwingTableIdx_5GC_N[1];
*TemperatureUP_D = pRFCalibrateInfo->DeltaSwingTableIdx_5GD_P[1];
*TemperatureDOWN_D = pRFCalibrateInfo->DeltaSwingTableIdx_5GD_N[1];
} else if (149 <= channel && channel <= 173) {
*TemperatureUP_C = pRFCalibrateInfo->DeltaSwingTableIdx_5GC_P[2];
*TemperatureDOWN_C = pRFCalibrateInfo->DeltaSwingTableIdx_5GC_N[2];
*TemperatureUP_D = pRFCalibrateInfo->DeltaSwingTableIdx_5GD_P[2];
*TemperatureDOWN_D = pRFCalibrateInfo->DeltaSwingTableIdx_5GD_N[2];
} else {
*TemperatureUP_C = (pu1Byte)DeltaSwingTableIdx_2GA_P_8188E;
*TemperatureDOWN_C = (pu1Byte)DeltaSwingTableIdx_2GA_N_8188E;
*TemperatureUP_D = (pu1Byte)DeltaSwingTableIdx_2GA_P_8188E;
*TemperatureDOWN_D = (pu1Byte)DeltaSwingTableIdx_2GA_N_8188E;
}
return;
}
void ConfigureTxpowerTrack_8814A(
PTXPWRTRACK_CFG pConfig
)
{
pConfig->SwingTableSize_CCK = CCK_TABLE_SIZE;
pConfig->SwingTableSize_OFDM = OFDM_TABLE_SIZE;
pConfig->Threshold_IQK = 8;
pConfig->AverageThermalNum = AVG_THERMAL_NUM_8814A;
pConfig->RfPathCount = MAX_PATH_NUM_8814A;
pConfig->ThermalRegAddr = RF_T_METER_88E;
pConfig->ODM_TxPwrTrackSetPwr = ODM_TxPwrTrackSetPwr8814A;
pConfig->DoIQK = DoIQK_8814A;
pConfig->PHY_LCCalibrate = PHY_LCCalibrate_8814A;
pConfig->GetDeltaSwingTable = GetDeltaSwingTable_8814A;
pConfig->GetDeltaSwingTable8814only = GetDeltaSwingTable_8814A_PathCD;
}
VOID
phy_LCCalibrate_8814A(
IN PDM_ODM_T pDM_Odm,
IN BOOLEAN is2T
)
{
u4Byte LC_Cal = 0, cnt;
//Check continuous TX and Packet TX
u4Byte reg0x914 = ODM_Read4Byte(pDM_Odm, rSingleTone_ContTx_Jaguar);;
// Backup RF reg18.
LC_Cal = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask);
if((reg0x914 & 0x70000) == 0)
ODM_Write1Byte(pDM_Odm, REG_TXPAUSE_8812A, 0xFF);
//3 3. Read RF reg18
LC_Cal = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask);
//3 4. Set LC calibration begin bit15
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, LC_Cal|0x08000);
ODM_delay_ms(100);
for (cnt = 0; cnt < 100; cnt++) {
if (ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x8000) != 0x1)
break;
ODM_delay_ms(10);
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("retry cnt = %d\n", cnt));
//3 Restore original situation
if((reg0x914 & 70000) == 0)
ODM_Write1Byte(pDM_Odm, REG_TXPAUSE_8812A, 0x00);
// Recover channel number
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, LC_Cal);
DbgPrint("Call %s\n", __FUNCTION__);
}
VOID
phy_APCalibrate_8814A(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
IN PDM_ODM_T pDM_Odm,
#else
IN PADAPTER pAdapter,
#endif
IN s1Byte delta,
IN BOOLEAN is2T
)
{
}
VOID
PHY_LCCalibrate_8814A(
IN PDM_ODM_T pDM_Odm
)
{
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
PADAPTER pAdapter = pDM_Odm->Adapter;
#if (MP_DRIVER == 1)
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx);
#else
PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx);
#endif
#endif
#endif
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("===> PHY_LCCalibrate_8814A\n"));
//#if (MP_DRIVER == 1)
phy_LCCalibrate_8814A(pDM_Odm, TRUE);
//#endif
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("<=== PHY_LCCalibrate_8814A\n"));
}
VOID
PHY_APCalibrate_8814A(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
IN PDM_ODM_T pDM_Odm,
#else
IN PADAPTER pAdapter,
#endif
IN s1Byte delta
)
{
}
VOID
PHY_DPCalibrate_8814A(
IN PDM_ODM_T pDM_Odm
)
{
}
BOOLEAN
phy_QueryRFPathSwitch_8814A(
IN PADAPTER pAdapter
)
{
return TRUE;
}
BOOLEAN PHY_QueryRFPathSwitch_8814A(
IN PADAPTER pAdapter
)
{
#if DISABLE_BB_RF
return TRUE;
#endif
return phy_QueryRFPathSwitch_8814A(pAdapter);
}
VOID phy_SetRFPathSwitch_8814A(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
IN PDM_ODM_T pDM_Odm,
#else
IN PADAPTER pAdapter,
#endif
IN BOOLEAN bMain,
IN BOOLEAN is2T
)
{
}
VOID PHY_SetRFPathSwitch_8814A(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
IN PDM_ODM_T pDM_Odm,
#else
IN PADAPTER pAdapter,
#endif
IN BOOLEAN bMain
)
{
}
#else /* (RTL8814A_SUPPORT == 0)*/
VOID
PHY_LCCalibrate_8814A(
IN PDM_ODM_T pDM_Odm
){}
VOID
PHY_IQCalibrate_8814A(
IN PDM_ODM_T pDM_Odm,
IN BOOLEAN bReCovery
){}
#endif /* (RTL8814A_SUPPORT == 0)*/

106
hal/phydm/halrf/rtl8814a/halrf_8814a_win.h 100644
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@ -0,0 +1,106 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __HAL_PHY_RF_8814A_H__
#define __HAL_PHY_RF_8814A_H__
/*--------------------------Define Parameters-------------------------------*/
#define AVG_THERMAL_NUM_8814A 4
#include "halphyrf_win.h"
void ConfigureTxpowerTrack_8814A(
PTXPWRTRACK_CFG pConfig
);
VOID
GetDeltaSwingTable_8814A(
IN PDM_ODM_T pDM_Odm,
OUT pu1Byte *TemperatureUP_A,
OUT pu1Byte *TemperatureDOWN_A,
OUT pu1Byte *TemperatureUP_B,
OUT pu1Byte *TemperatureDOWN_B
);
VOID
GetDeltaSwingTable_8814A_PathCD(
IN PDM_ODM_T pDM_Odm,
OUT pu1Byte *TemperatureUP_C,
OUT pu1Byte *TemperatureDOWN_C,
OUT pu1Byte *TemperatureUP_D,
OUT pu1Byte *TemperatureDOWN_D
);
VOID
ODM_TxPwrTrackSetPwr8814A(
PDM_ODM_T pDM_Odm,
PWRTRACK_METHOD Method,
u1Byte RFPath,
u1Byte ChannelMappedIndex
);
u1Byte
CheckRFGainOffset(
PDM_ODM_T pDM_Odm,
u1Byte RFPath
);
//
// LC calibrate
//
void
PHY_LCCalibrate_8814A(
IN PDM_ODM_T pDM_Odm
);
//
// AP calibrate
//
void
PHY_APCalibrate_8814A(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
IN PDM_ODM_T pDM_Odm,
#else
IN PADAPTER pAdapter,
#endif
IN s1Byte delta
);
VOID
PHY_DPCalibrate_8814A(
IN PDM_ODM_T pDM_Odm
);
VOID PHY_SetRFPathSwitch_8814A(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
IN PDM_ODM_T pDM_Odm,
#else
IN PADAPTER pAdapter,
#endif
IN BOOLEAN bMain
);
#endif // #ifndef __HAL_PHY_RF_8188E_H__

557
hal/phydm/halrf/rtl8814a/halrf_iqk_8814a.c 100644
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@ -0,0 +1,557 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include "mp_precomp.h"
#include "../../phydm_precomp.h"
/*---------------------------Define Local Constant---------------------------*/
/*---------------------------Define Local Constant---------------------------*/
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
void DoIQK_8814A(
void* pDM_VOID,
u8 DeltaThermalIndex,
u8 ThermalValue,
u8 Threshold
)
{
struct dm_struct * pDM_Odm = (struct dm_struct *)pDM_VOID;
odm_reset_iqk_result(pDM_Odm);
pDM_Odm->rf_calibrate_info.thermal_value_iqk= ThermalValue;
phy_iq_calibrate_8814a(pDM_Odm, FALSE);
}
#else
/*Originally pConfig->DoIQK is hooked PHY_IQCalibrate_8814A, but DoIQK_8814A and PHY_IQCalibrate_8814A have different arguments*/
void DoIQK_8814A(
void* pDM_VOID,
u8 DeltaThermalIndex,
u8 ThermalValue,
u8 Threshold
)
{
struct dm_struct * pDM_Odm = (struct dm_struct *)pDM_VOID;
boolean bReCovery = (boolean) DeltaThermalIndex;
phy_iq_calibrate_8814a(pDM_Odm, bReCovery);
}
#endif
//1 7. IQK
VOID
_IQK_BackupMacBB_8814A(
IN struct dm_struct * pDM_Odm,
u32* MAC_backup,
u32* BB_backup,
u32* Backup_MAC_REG,
u32* Backup_BB_REG
)
{
u32 i;
//save MACBB default value
for (i = 0; i < MAC_REG_NUM_8814; i++){
MAC_backup[i] = odm_read_4byte(pDM_Odm, Backup_MAC_REG[i]);
}
for (i = 0; i < BB_REG_NUM_8814; i++){
BB_backup[i] = odm_read_4byte(pDM_Odm, Backup_BB_REG[i]);
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("BackupMacBB Success!!!!\n"));
}
VOID
_IQK_BackupRF_8814A(
IN struct dm_struct * pDM_Odm,
u32 RF_backup[][4],
u32* Backup_RF_REG
)
{
u32 i;
//Save RF Parameters
for (i = 0; i < RF_REG_NUM_8814; i++){
RF_backup[i][RF_PATH_A] = odm_get_rf_reg(pDM_Odm, RF_PATH_A, Backup_RF_REG[i], bRFRegOffsetMask);
RF_backup[i][RF_PATH_B] = odm_get_rf_reg(pDM_Odm, RF_PATH_B, Backup_RF_REG[i], bRFRegOffsetMask);
RF_backup[i][RF_PATH_C] = odm_get_rf_reg(pDM_Odm, RF_PATH_C, Backup_RF_REG[i], bRFRegOffsetMask);
RF_backup[i][RF_PATH_D] = odm_get_rf_reg(pDM_Odm, RF_PATH_D, Backup_RF_REG[i], bRFRegOffsetMask);
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("BackupRF Success!!!!\n"));
}
VOID
_IQK_AFESetting_8814A(
IN struct dm_struct * pDM_Odm,
IN boolean Do_IQK
)
{
if(Do_IQK)
{
// IQK AFE Setting RX_WAIT_CCA mode
odm_write_4byte(pDM_Odm, 0xc60, 0x0e808003);
odm_write_4byte(pDM_Odm, 0xe60, 0x0e808003);
odm_write_4byte(pDM_Odm, 0x1860, 0x0e808003);
odm_write_4byte(pDM_Odm, 0x1a60, 0x0e808003);
odm_set_bb_reg(pDM_Odm, 0x90c, BIT(13), 0x1);
odm_set_bb_reg(pDM_Odm, 0x764, BIT(10)|BIT(9), 0x3);
odm_set_bb_reg(pDM_Odm, 0x764, BIT(10)|BIT(9), 0x0);
odm_set_bb_reg(pDM_Odm, 0x804, BIT(2), 0x1);
odm_set_bb_reg(pDM_Odm, 0x804, BIT(2), 0x0);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("AFE IQK mode Success!!!!\n"));
}
else
{
odm_write_4byte(pDM_Odm, 0xc60, 0x07808003);
odm_write_4byte(pDM_Odm, 0xe60, 0x07808003);
odm_write_4byte(pDM_Odm, 0x1860, 0x07808003);
odm_write_4byte(pDM_Odm, 0x1a60, 0x07808003);
odm_set_bb_reg(pDM_Odm, 0x90c, BIT(13), 0x1);
odm_set_bb_reg(pDM_Odm, 0x764, BIT(10)|BIT(9), 0x3);
odm_set_bb_reg(pDM_Odm, 0x764, BIT(10)|BIT(9), 0x0);
odm_set_bb_reg(pDM_Odm, 0x804, BIT(2), 0x1);
odm_set_bb_reg(pDM_Odm, 0x804, BIT(2), 0x0);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("AFE Normal mode Success!!!!\n"));
}
}
VOID
_IQK_RestoreMacBB_8814A(
IN struct dm_struct * pDM_Odm,
u32* MAC_backup,
u32* BB_backup,
u32* Backup_MAC_REG,
u32* Backup_BB_REG
)
{
u32 i;
//Reload MacBB Parameters
for (i = 0; i < MAC_REG_NUM_8814; i++){
odm_write_4byte(pDM_Odm, Backup_MAC_REG[i], MAC_backup[i]);
}
for (i = 0; i < BB_REG_NUM_8814; i++){
odm_write_4byte(pDM_Odm, Backup_BB_REG[i], BB_backup[i]);
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("RestoreMacBB Success!!!!\n"));
}
VOID
_IQK_RestoreRF_8814A(
IN struct dm_struct * pDM_Odm,
u32* Backup_RF_REG,
u32 RF_backup[][4]
)
{
u32 i;
odm_set_rf_reg(pDM_Odm, RF_PATH_A, 0xef, bRFRegOffsetMask, 0x0);
odm_set_rf_reg(pDM_Odm, RF_PATH_B, 0xef, bRFRegOffsetMask, 0x0);
odm_set_rf_reg(pDM_Odm, RF_PATH_C, 0xef, bRFRegOffsetMask, 0x0);
odm_set_rf_reg(pDM_Odm, RF_PATH_D, 0xef, bRFRegOffsetMask, 0x0);
for (i = 0; i < RF_REG_NUM_8814; i++){
odm_set_rf_reg(pDM_Odm, RF_PATH_A, Backup_RF_REG[i], bRFRegOffsetMask, RF_backup[i][RF_PATH_A]);
odm_set_rf_reg(pDM_Odm, RF_PATH_B, Backup_RF_REG[i], bRFRegOffsetMask, RF_backup[i][RF_PATH_B]);
odm_set_rf_reg(pDM_Odm, RF_PATH_C, Backup_RF_REG[i], bRFRegOffsetMask, RF_backup[i][RF_PATH_C]);
odm_set_rf_reg(pDM_Odm, RF_PATH_D, Backup_RF_REG[i], bRFRegOffsetMask, RF_backup[i][RF_PATH_D]);
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("RestoreRF Success!!!!\n"));
}
VOID
PHY_ResetIQKResult_8814A(
IN struct dm_struct * pDM_Odm
)
{
odm_write_4byte(pDM_Odm, 0x1b00, 0xf8000000);
odm_write_4byte(pDM_Odm, 0x1b38, 0x20000000);
odm_write_4byte(pDM_Odm, 0x1b00, 0xf8000002);
odm_write_4byte(pDM_Odm, 0x1b38, 0x20000000);
odm_write_4byte(pDM_Odm, 0x1b00, 0xf8000004);
odm_write_4byte(pDM_Odm, 0x1b38, 0x20000000);
odm_write_4byte(pDM_Odm, 0x1b00, 0xf8000006);
odm_write_4byte(pDM_Odm, 0x1b38, 0x20000000);
odm_write_4byte(pDM_Odm, 0xc10, 0x100);
odm_write_4byte(pDM_Odm, 0xe10, 0x100);
odm_write_4byte(pDM_Odm, 0x1810, 0x100);
odm_write_4byte(pDM_Odm, 0x1a10, 0x100);
}
VOID
_IQK_ResetNCTL_8814A(
IN struct dm_struct * pDM_Odm
)
{
odm_write_4byte(pDM_Odm, 0x1b00, 0xf8000000);
odm_write_4byte(pDM_Odm, 0x1b80, 0x00000006);
odm_write_4byte(pDM_Odm, 0x1b00, 0xf8000000);
odm_write_4byte(pDM_Odm, 0x1b80, 0x00000002);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("ResetNCTL Success!!!!\n"));
}
VOID
_IQK_ConfigureMAC_8814A(
IN struct dm_struct * pDM_Odm
)
{
// ========MAC register setting========
odm_write_1byte(pDM_Odm, 0x522, 0x3f);
odm_set_bb_reg(pDM_Odm, 0x550, BIT(11)|BIT(3), 0x0);
odm_write_1byte(pDM_Odm, 0x808, 0x00); // RX ante off
odm_set_bb_reg(pDM_Odm, 0x838, 0xf, 0xe); // CCA off
odm_set_bb_reg(pDM_Odm, 0xa14, BIT(9)|BIT(8), 0x3); // CCK RX Path off
odm_write_4byte(pDM_Odm, 0xcb0, 0x77777777);
odm_write_4byte(pDM_Odm, 0xeb0, 0x77777777);
odm_write_4byte(pDM_Odm, 0x18b4, 0x77777777);
odm_write_4byte(pDM_Odm, 0x1ab4, 0x77777777);
odm_set_bb_reg(pDM_Odm, 0x1abc, 0x0ff00000, 0x77);
/*by YN*/
odm_set_bb_reg(pDM_Odm, 0xcbc, 0xf, 0x0);
}
VOID
_LOK_One_Shot(
IN void* pDM_VOID
)
{
struct dm_struct * pDM_Odm = (struct dm_struct *)pDM_VOID;
struct dm_iqk_info * pIQK_info = &pDM_Odm->IQK_info;
u8 Path = 0, delay_count = 0, ii;
boolean LOK_notready = FALSE;
u32 LOK_temp1 = 0, LOK_temp2 = 0;
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("============ LOK ============\n"));
for(Path =0; Path <=3; Path++){
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE,
("==========S%d LOK ==========\n", Path));
odm_set_bb_reg(pDM_Odm, 0x9a4, BIT(21)|BIT(20), Path); // ADC Clock source
odm_write_4byte(pDM_Odm, 0x1b00, (0xf8000001|(1<<(4+Path)))); // LOK: CMD ID = 0 {0xf8000011, 0xf8000021, 0xf8000041, 0xf8000081}
ODM_delay_ms(LOK_delay);
delay_count = 0;
LOK_notready = TRUE;
while(LOK_notready){
LOK_notready = (boolean) odm_get_bb_reg(pDM_Odm, 0x1b00, BIT(0));
ODM_delay_ms(1);
delay_count++;
if(delay_count >= 10){
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD,
("S%d LOK timeout!!!\n", Path));
_IQK_ResetNCTL_8814A(pDM_Odm);
break;
}
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE,
("S%d ==> delay_count = 0x%d\n", Path, delay_count));
if(!LOK_notready){
odm_write_4byte(pDM_Odm, 0x1b00, 0xf8000000|(Path<<1));
odm_write_4byte(pDM_Odm, 0x1bd4, 0x003f0001);
LOK_temp2 = (odm_get_bb_reg(pDM_Odm, 0x1bfc, 0x003e0000)+0x10)&0x1f;
LOK_temp1 = (odm_get_bb_reg(pDM_Odm, 0x1bfc, 0x0000003e)+0x10)&0x1f;
for(ii = 1; ii<5; ii++){
LOK_temp1 = LOK_temp1 + ((LOK_temp1 & BIT(4-ii))<<(ii*2));
LOK_temp2 = LOK_temp2 + ((LOK_temp2 & BIT(4-ii))<<(ii*2));
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE,
("LOK_temp1 = 0x%x, LOK_temp2 = 0x%x\n", LOK_temp1>>4, LOK_temp2>>4));
odm_set_rf_reg(pDM_Odm, Path, 0x8, 0x07c00, LOK_temp1>>4);
odm_set_rf_reg(pDM_Odm, Path, 0x8, 0xf8000, LOK_temp2>>4);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE,
("==>S%d fill LOK\n", Path));
}
else{
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE,
("==>S%d LOK Fail!!!\n", Path));
odm_set_rf_reg(pDM_Odm, Path, 0x8, bRFRegOffsetMask, 0x08400);
}
pIQK_info->lok_fail[Path] = LOK_notready;
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD,
("LOK0_notready = %d, LOK1_notready = %d, LOK2_notready = %d, LOK3_notready = %d\n",
pIQK_info->lok_fail[0], pIQK_info->lok_fail[1], pIQK_info->lok_fail[2], pIQK_info->lok_fail[3]));
}
VOID
_IQK_One_Shot(
IN void* pDM_VOID
)
{
struct dm_struct * pDM_Odm = (struct dm_struct *)pDM_VOID;
struct dm_iqk_info * pIQK_info = &pDM_Odm->IQK_info;
u8 Path = 0, delay_count = 0, cal_retry = 0, idx;
boolean notready = TRUE, fail = TRUE;
u32 IQK_CMD;
u16 IQK_Apply[4] = {0xc94, 0xe94, 0x1894, 0x1a94};
for(idx = 0; idx <= 1; idx++){ // ii = 0:TXK , 1: RXK
if(idx == TX_IQK){
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD,
("============ WBTXIQK ============\n"));
}
else if(idx == RX_IQK){
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD,
("============ WBRXIQK ============\n"));
}
for(Path =0; Path <=3; Path++){
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE,
("==========S%d IQK ==========\n", Path));
cal_retry = 0;
fail = TRUE;
while(fail){
odm_set_bb_reg(pDM_Odm, 0x9a4, BIT(21)|BIT(20), Path);
if(idx == TX_IQK){
IQK_CMD = (0xf8000001|(*pDM_Odm->band_width+3)<<8|(1<<(4+Path)));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE,
("TXK_Trigger = 0x%x\n", IQK_CMD));
/*
{0xf8000311, 0xf8000321, 0xf8000341, 0xf8000381} ==> 20 WBTXK (CMD = 3)
{0xf8000411, 0xf8000421, 0xf8000441, 0xf8000481} ==> 40 WBTXK (CMD = 4)
{0xf8000511, 0xf8000521, 0xf8000541, 0xf8000581} ==> 80 WBTXK (CMD = 5)
*/
odm_write_4byte(pDM_Odm, 0x1b00, IQK_CMD);
}
else if(idx == RX_IQK){
IQK_CMD = (0xf8000001|(9-*pDM_Odm->band_width)<<8|(1<<(4+Path)));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE,
("TXK_Trigger = 0x%x\n", IQK_CMD));
/*
{0xf8000911, 0xf8000921, 0xf8000941, 0xf8000981} ==> 20 WBRXK (CMD = 9)
{0xf8000811, 0xf8000821, 0xf8000841, 0xf8000881} ==> 40 WBRXK (CMD = 8)
{0xf8000711, 0xf8000721, 0xf8000741, 0xf8000781} ==> 80 WBRXK (CMD = 7)
*/
odm_write_4byte(pDM_Odm, 0x1b00, IQK_CMD);
}
ODM_delay_ms(WBIQK_delay);
delay_count = 0;
notready = TRUE;
while(notready){
notready = (boolean) odm_get_bb_reg(pDM_Odm, 0x1b00, BIT(0));
if(!notready){
fail = (boolean) odm_get_bb_reg(pDM_Odm, 0x1b08, BIT(26));
break;
}
ODM_delay_ms(1);
delay_count++;
if(delay_count >= 20){
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD,
("S%d IQK timeout!!!\n", Path));
_IQK_ResetNCTL_8814A(pDM_Odm);
break;
}
}
if(fail)
cal_retry++;
if(cal_retry >3 )
break;
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE,
("S%d ==> 0x1b00 = 0x%x\n", Path, odm_read_4byte(pDM_Odm, 0x1b00)));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE,
("S%d ==> 0x1b08 = 0x%x\n", Path, odm_read_4byte(pDM_Odm, 0x1b08)));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE,
("S%d ==> delay_count = 0x%d, cal_retry = %x\n", Path, delay_count, cal_retry));
odm_write_4byte(pDM_Odm, 0x1b00, 0xf8000000|(Path<<1));
if(!fail){
if(idx == TX_IQK){
pIQK_info->iqc_matrix[idx][Path] = odm_read_4byte(pDM_Odm, 0x1b38);
}
else if(idx == RX_IQK){
odm_write_4byte(pDM_Odm, 0x1b3c, 0x20000000);
pIQK_info->iqc_matrix[idx][Path] = odm_read_4byte(pDM_Odm, 0x1b3c);
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE,
("S%d_IQC = 0x%x\n", Path, pIQK_info->iqc_matrix[idx][Path]));
}
if(idx == RX_IQK){
if(pIQK_info->iqk_fail[TX_IQK][Path] == FALSE) // TXIQK success in RXIQK
odm_write_4byte( pDM_Odm, 0x1b38, pIQK_info->iqc_matrix[TX_IQK][Path]);
else
odm_set_bb_reg(pDM_Odm, IQK_Apply[Path], BIT0, 0x0);
if(fail) // RXIQK Fail
odm_set_bb_reg(pDM_Odm, IQK_Apply[Path], (BIT11|BIT10), 0x0);
}
pIQK_info->iqk_fail[idx][Path] = fail;
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD,
("IQK0_fail = %d, IQK1_fail = %d, IQK2_fail = %d, IQK3_fail = %d\n",
pIQK_info->iqk_fail[idx][0], pIQK_info->iqk_fail[idx][1], pIQK_info->iqk_fail[idx][2], pIQK_info->iqk_fail[idx][3]));
}
}
VOID
_IQK_Tx_8814A(
IN struct dm_struct * pDM_Odm,
IN u8 chnlIdx
)
{
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("BandWidth = %d, ExtPA2G = %d\n", *pDM_Odm->p_band_width, pDM_Odm->ext_pa));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Interface = %d, pBandType = %d\n", pDM_Odm->support_interface, *pDM_Odm->p_band_type));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("CutVersion = %x\n", pDM_Odm->cut_version));
odm_set_rf_reg(pDM_Odm, RF_PATH_A, 0x58, BIT(19), 0x1);
odm_set_rf_reg(pDM_Odm, RF_PATH_B, 0x58, BIT(19), 0x1);
odm_set_rf_reg(pDM_Odm, RF_PATH_C, 0x58, BIT(19), 0x1);
odm_set_rf_reg(pDM_Odm, RF_PATH_D, 0x58, BIT(19), 0x1);
odm_set_bb_reg(pDM_Odm, 0xc94, (BIT11|BIT10|BIT0), 0x401);
odm_set_bb_reg(pDM_Odm, 0xe94, (BIT11|BIT10|BIT0), 0x401);
odm_set_bb_reg(pDM_Odm, 0x1894, (BIT11|BIT10|BIT0), 0x401);
odm_set_bb_reg(pDM_Odm, 0x1a94, (BIT11|BIT10|BIT0), 0x401);
if(*pDM_Odm->band_type == ODM_BAND_5G)
odm_write_4byte(pDM_Odm, 0x1b00, 0xf8000ff1);
else
odm_write_4byte(pDM_Odm, 0x1b00, 0xf8000ef1);
ODM_delay_ms(1);
odm_write_4byte(pDM_Odm, 0x810, 0x20101063);
odm_write_4byte(pDM_Odm, 0x90c, 0x0B00C000);
_LOK_One_Shot(pDM_Odm);
_IQK_One_Shot(pDM_Odm);
}
VOID
_phy_iq_calibrate_8814a(
IN struct dm_struct * pDM_Odm,
IN u8 Channel
)
{
u32 MAC_backup[MAC_REG_NUM_8814], BB_backup[BB_REG_NUM_8814], RF_backup[RF_REG_NUM_8814][4];
u32 Backup_MAC_REG[MAC_REG_NUM_8814] = {0x520, 0x550};
u32 Backup_BB_REG[BB_REG_NUM_8814] = {0xa14, 0x808, 0x838, 0x90c, 0x810, 0xcb0, 0xeb0,
0x18b4, 0x1ab4, 0x1abc, 0x9a4, 0x764, 0xcbc};
u32 Backup_RF_REG[RF_REG_NUM_8814] = {0x0, 0x8f};
u8 chnlIdx = odm_get_right_chnl_place_for_iqk(Channel);
_IQK_BackupMacBB_8814A(pDM_Odm, MAC_backup, BB_backup, Backup_MAC_REG, Backup_BB_REG);
_IQK_AFESetting_8814A(pDM_Odm,TRUE);
_IQK_BackupRF_8814A(pDM_Odm, RF_backup, Backup_RF_REG);
_IQK_ConfigureMAC_8814A(pDM_Odm);
_IQK_Tx_8814A(pDM_Odm, chnlIdx);
_IQK_ResetNCTL_8814A(pDM_Odm); //for 3-wire to BB use
_IQK_AFESetting_8814A(pDM_Odm,FALSE);
_IQK_RestoreMacBB_8814A(pDM_Odm, MAC_backup, BB_backup, Backup_MAC_REG, Backup_BB_REG);
_IQK_RestoreRF_8814A(pDM_Odm, Backup_RF_REG, RF_backup);
}
/*IQK version:v1.1*/
/*update 0xcbc setting*/
VOID
phy_iq_calibrate_8814a(
IN void* pDM_VOID,
IN boolean bReCovery
)
{
struct dm_struct * pDM_Odm = (struct dm_struct *)pDM_VOID;
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
PADAPTER pAdapter = pDM_Odm->adapter;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
#if (MP_DRIVER == 1)
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx);
#else// (DM_ODM_SUPPORT_TYPE == ODM_CE)
PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx);
#endif
#endif//(MP_DRIVER == 1)
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
if (odm_check_power_status(pAdapter) == FALSE)
return;
#endif
#if MP_DRIVER == 1
if( pMptCtx->is_single_tone || pMptCtx->is_carrier_suppression )
return;
#endif
#endif
#if (DM_ODM_SUPPORT_TYPE & (ODM_CE))
_phy_iq_calibrate_8814a(pDM_Odm, pHalData->current_channel);
/*DBG_871X("%s,%d, do IQK %u ms\n", __func__, __LINE__, rtw_get_passing_time_ms(time_iqk));*/
#else
_phy_iq_calibrate_8814a(pDM_Odm, *pDM_Odm->pChannel);
#endif
}
VOID
PHY_IQCalibrate_8814A_Init(
IN void* pDM_VOID
)
{
struct dm_struct * pDM_Odm = (struct dm_struct *)pDM_VOID;
struct dm_iqk_info *pIQK_info = &pDM_Odm->IQK_info;
u8 ii, jj;
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("=====>PHY_IQCalibrate_8814A_Init\n"));
for(jj = 0; jj < 2; jj++){
for(ii = 0; ii < NUM; ii++){
pIQK_info->lok_fail[ii] = TRUE;
pIQK_info->iqk_fail[jj][ii] = TRUE;
pIQK_info->iqc_matrix[jj][ii] = 0x20000000;
}
}
}

58
hal/phydm/halrf/rtl8814a/halrf_iqk_8814a.h 100644
View File

@ -0,0 +1,58 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __PHYDM_IQK_8814A_H__
#define __PHYDM_IQK_8814A_H__
/*--------------------------Define Parameters-------------------------------*/
#define MAC_REG_NUM_8814 2
#define BB_REG_NUM_8814 13
#define RF_REG_NUM_8814 2
/*---------------------------End Define Parameters-------------------------------*/
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
VOID
DoIQK_8814A(
PVOID pDM_VOID,
u8 DeltaThermalIndex,
u8 ThermalValue,
u8 Threshold
);
#else
VOID
DoIQK_8814A(
PVOID pDM_VOID,
u8 DeltaThermalIndex,
u8 ThermalValue,
u8 Threshold
);
#endif
VOID
phy_iq_calibrate_8814a(
IN PVOID pDM_VOID,
boolean bReCovery
);
VOID
PHY_IQCalibrate_8814A_Init(
IN PVOID pDM_VOID
);
#endif /* #ifndef __PHYDM_IQK_8814A_H__*/

2
hal/phydm/phydm.c
View File

@ -455,10 +455,12 @@ phydm_hw_setting(
odm_hw_setting_8821a(dm);
#endif
#if 0 /* TODO: implementation done but may not work and do nothing with current flags. Commenting the code to match previous version behavior*/
#if (RTL8814A_SUPPORT == 1)
if (dm->support_ic_type & ODM_RTL8814A)
phydm_hwsetting_8814a(dm);
#endif
#endif
#if (RTL8822B_SUPPORT == 1)
if (dm->support_ic_type & ODM_RTL8822B)

4
hal/phydm/phydm_debug.h
View File

@ -256,8 +256,8 @@ static __inline void PHYDM_DBG(struct dm_struct *dm, int comp, char *fmt, ...)
static __inline void PHYDM_DBG_F(struct dm_struct *dm, int comp, char *fmt, ...)
{}
#else
#define PHYDM_DBG(dm, comp, fmt)
#define PHYDM_DBG_F(dm, comp, fmt)
#define PHYDM_DBG(dm, comp, fmt, args...)
#define PHYDM_DBG_F(dm, comp, fmt, args...)
#endif
#define PHYDM_PRINT_ADDR(dm, comp, title_str, ptr)
#define ODM_RT_TRACE(dm, comp, level, fmt)

29
hal/phydm/phydm_hwconfig.c
View File

@ -191,22 +191,7 @@ odm_config_rf_with_header_file(
else if (e_rf_path == RF_PATH_D)
READ_AND_CONFIG_MP(8814a, _radiod);
} else if (config_type == CONFIG_RF_TXPWR_LMT) {
if (dm->rfe_type == 0)
READ_AND_CONFIG_MP(8814a,_txpwr_lmt_type0);
else if (dm->rfe_type == 1)
READ_AND_CONFIG_MP(8814a,_txpwr_lmt_type1);
else if (dm->rfe_type == 2)
READ_AND_CONFIG_MP(8814a,_txpwr_lmt_type2);
else if (dm->rfe_type == 3)
READ_AND_CONFIG_MP(8814a,_txpwr_lmt_type3);
else if (dm->rfe_type == 5)
READ_AND_CONFIG_MP(8814a,_txpwr_lmt_type5);
else if (dm->rfe_type == 7)
READ_AND_CONFIG_MP(8814a,_txpwr_lmt_type7);
else if (dm->rfe_type == 8)
READ_AND_CONFIG_MP(8814a,_txpwr_lmt_type8);
else
READ_AND_CONFIG_MP(8814a,_txpwr_lmt);
READ_AND_CONFIG_MP(8814a,_txpwr_lmt);
}
}
#endif
@ -408,14 +393,14 @@ odm_config_rf_with_tx_pwr_track_header_file(
READ_AND_CONFIG_MP(8814a, _txpowertrack_type2);
else if (dm->rfe_type == 5)
READ_AND_CONFIG_MP(8814a, _txpowertrack_type5);
else if (dm->rfe_type == 7)
/*else if (p_dm->rfe_type == 7)
READ_AND_CONFIG_MP(8814a, _txpowertrack_type7);
else if (dm->rfe_type == 8)
READ_AND_CONFIG_MP(8814a, _txpowertrack_type8);
else if (p_dm->rfe_type == 8)
READ_AND_CONFIG_MP(8814a, _txpowertrack_type8);*/
else
READ_AND_CONFIG_MP(8814a, _txpowertrack);
READ_AND_CONFIG_MP(8814a, _txpowertssi);
// READ_AND_CONFIG_MP(8814a, _txpowertssi);
}
#endif
#if RTL8703B_SUPPORT
@ -648,7 +633,7 @@ odm_config_bb_with_header_file(
else if (config_type == CONFIG_BB_AGC_TAB)
READ_AND_CONFIG_MP(8814a, _agc_tab);
else if (config_type == CONFIG_BB_PHY_REG_PG) {
if (dm->rfe_type == 0)
/*if (p_dm->rfe_type == 0)
READ_AND_CONFIG_MP(8814a,_phy_reg_pg_type0);
else if (dm->rfe_type == 2)
READ_AND_CONFIG_MP(8814a,_phy_reg_pg_type2);
@ -662,7 +647,7 @@ odm_config_bb_with_header_file(
READ_AND_CONFIG_MP(8814a,_phy_reg_pg_type7);
else if (dm->rfe_type == 8)
READ_AND_CONFIG_MP(8814a,_phy_reg_pg_type8);
else
else*/
READ_AND_CONFIG_MP(8814a,_phy_reg_pg);
}
else if (config_type == CONFIG_BB_PHY_REG_MP)

47
hal/phydm/rtl8814a/hal8814areg_odm.h 100644
View File

@ -0,0 +1,47 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
//============================================================
/* File Name: hal8814areg_odm.h */
//
// Description:
//
// This file is for RTL8814A register definition.
//
//
//============================================================
#ifndef __HAL_8814A_REG_H__
#define __HAL_8814A_REG_H__
//
// Register Definition
//
#define TRX_ANTDIV_PATH 0x860
#define RX_ANTDIV_PATH 0xb2c
#define ODM_R_A_AGC_CORE1_8814A 0xc50
//
// Bitmap Definition
//
#define BIT_FA_RESET_8814A BIT0
#endif

4489
hal/phydm/rtl8814a/halhwimg8814a_bb.c 100644
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File diff suppressed because it is too large Load Diff

99
hal/phydm/rtl8814a/halhwimg8814a_bb.h 100644
View File

@ -0,0 +1,99 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/*Image2HeaderVersion: 2.19*/
#if (RTL8814A_SUPPORT == 1)
#ifndef __INC_MP_BB_HW_IMG_8814A_H
#define __INC_MP_BB_HW_IMG_8814A_H
/******************************************************************************
* AGC_TAB.TXT
******************************************************************************/
void
odm_read_and_config_mp_8814a_agc_tab(/* TC: Test Chip, MP: MP Chip*/
struct dm_struct * pDM_Odm
);
u4Byte ODM_GetVersion_MP_8814A_AGC_TAB(void);
/******************************************************************************
* PHY_REG.TXT
******************************************************************************/
void
odm_read_and_config_mp_8814a_phy_reg(/* TC: Test Chip, MP: MP Chip*/
struct dm_struct * pDM_Odm
);
u4Byte ODM_GetVersion_MP_8814A_PHY_REG(void);
/******************************************************************************
* PHY_REG_MP.TXT
******************************************************************************/
void
odm_read_and_config_mp_8814a_phy_reg_mp(/* TC: Test Chip, MP: MP Chip*/
struct dm_struct * pDM_Odm
);
u4Byte ODM_GetVersion_MP_8814A_PHY_REG_MP(void);
/******************************************************************************
* PHY_REG_PG.TXT
******************************************************************************/
void
odm_read_and_config_mp_8814a_phy_reg_pg(/* TC: Test Chip, MP: MP Chip*/
struct dm_struct * pDM_Odm
);
u4Byte ODM_GetVersion_MP_8814A_PHY_REG_PG(void);
/******************************************************************************
* PHY_REG_PG_Type2.TXT
******************************************************************************/
void
odm_read_and_config_mp_8814a_phy_reg_pg_type2(/* TC: Test Chip, MP: MP Chip*/
struct dm_struct * pDM_Odm
);
u4Byte ODM_GetVersion_MP_8814A_PHY_REG_PG_Type2(void);
/******************************************************************************
* PHY_REG_PG_Type3.TXT
******************************************************************************/
void
odm_read_and_config_mp_8814a_phy_reg_pg_type3(/* TC: Test Chip, MP: MP Chip*/
struct dm_struct * pDM_Odm
);
u4Byte ODM_GetVersion_MP_8814A_PHY_REG_PG_Type3(void);
/******************************************************************************
* PHY_REG_PG_Type5.TXT
******************************************************************************/
void
odm_read_and_config_mp_8814a_phy_reg_pg_type5(/* TC: Test Chip, MP: MP Chip*/
struct dm_struct * pDM_Odm
);
u4Byte ODM_GetVersion_MP_8814A_PHY_REG_PG_Type5(void);
#endif
#endif /* end of HWIMG_SUPPORT*/

7775
hal/phydm/rtl8814a/halhwimg8814a_fw.c 100644
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File diff suppressed because it is too large Load Diff

56
hal/phydm/rtl8814a/halhwimg8814a_fw.h 100644
View File

@ -0,0 +1,56 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#if (RTL8814A_SUPPORT == 1)
#ifndef __INC_MP_FW_HW_IMG_8814A_H
#define __INC_MP_FW_HW_IMG_8814A_H
/******************************************************************************
* FW_AP.TXT
******************************************************************************/
void
ODM_ReadFirmware_MP_8814A_FW_AP(
struct dm_struct *pDM_Odm,
u8 *pFirmware,
u32 *pFirmwareSize
);
u4Byte ODM_GetVersion_MP_8814A_FW_AP(void);
extern u32 array_length_mp_8814a_fw_ap;
extern u8 array_mp_8814a_fw_ap[];
/******************************************************************************
* FW_NIC.TXT
******************************************************************************/
void
ODM_ReadFirmware_MP_8814A_FW_NIC(
struct dm_struct *pDM_Odm,
u8 *pFirmware,
u32 *pFirmwareSize
);
u4Byte ODM_GetVersion_MP_8814A_FW_NIC(void);
extern u32 array_length_mp_8814a_fw_nic;
extern u8 array_mp_8814a_fw_nic[];
#endif
#endif // end of HWIMG_SUPPORT

325
hal/phydm/rtl8814a/halhwimg8814a_mac.c 100644
View File

@ -0,0 +1,325 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
/*Image2HeaderVersion: 2.19*/
#include "mp_precomp.h"
#include "../phydm_precomp.h"
#if (RTL8814A_SUPPORT == 1)
static BOOLEAN
CheckPositive(
struct dm_struct *pDM_Odm,
u32 Condition1,
u32 Condition2,
u32 Condition3,
u32 Condition4
)
{
u1Byte _BoardType = ((pDM_Odm->board_type & BIT4) >> 4) << 0 | /* _GLNA*/
((pDM_Odm->board_type & BIT3) >> 3) << 1 | /* _GPA*/
((pDM_Odm->board_type & BIT7) >> 7) << 2 | /* _ALNA*/
((pDM_Odm->board_type & BIT6) >> 6) << 3 | /* _APA */
((pDM_Odm->board_type & BIT2) >> 2) << 4; /* _BT*/
u4Byte cond1 = Condition1, cond2 = Condition2, cond3 = Condition3, cond4 = Condition4;
u4Byte driver1 = pDM_Odm->cut_version << 24 |
(pDM_Odm->support_interface & 0xF0) << 16 |
pDM_Odm->support_platform << 16 |
pDM_Odm->package_type << 12 |
(pDM_Odm->support_interface & 0x0F) << 8 |
_BoardType;
u4Byte driver2 = (pDM_Odm->type_glna & 0xFF) << 0 |
(pDM_Odm->type_gpa & 0xFF) << 8 |
(pDM_Odm->type_alna & 0xFF) << 16 |
(pDM_Odm->type_apa & 0xFF) << 24;
u4Byte driver3 = 0;
u4Byte driver4 = (pDM_Odm->type_glna & 0xFF00) >> 8 |
(pDM_Odm->type_gpa & 0xFF00) |
(pDM_Odm->type_alna & 0xFF00) << 8 |
(pDM_Odm->type_apa & 0xFF00) << 16;
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE,
("===> CheckPositive (cond1, cond2, cond3, cond4) = (0x%X 0x%X 0x%X 0x%X)\n", cond1, cond2, cond3, cond4));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE,
("===> CheckPositive (driver1, driver2, driver3, driver4) = (0x%X 0x%X 0x%X 0x%X)\n", driver1, driver2, driver3, driver4));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE,
(" (Platform, Interface) = (0x%X, 0x%X)\n", pDM_Odm->support_platform, pDM_Odm->support_interface));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE,
(" (Board, Package) = (0x%X, 0x%X)\n", pDM_Odm->board_type, pDM_Odm->package_type));
/*============== Value Defined Check ===============*/
/*QFN Type [15:12] and Cut Version [27:24] need to do value check*/
if (((cond1 & 0x0000F000) != 0) && ((cond1 & 0x0000F000) != (driver1 & 0x0000F000)))
return FALSE;
if (((cond1 & 0x0F000000) != 0) && ((cond1 & 0x0F000000) != (driver1 & 0x0F000000)))
return FALSE;
/*=============== Bit Defined Check ================*/
/* We don't care [31:28] */
cond1 &= 0x00FF0FFF;
driver1 &= 0x00FF0FFF;
if ((cond1 & driver1) == cond1) {
u4Byte bitMask = 0;
if ((cond1 & 0x0F) == 0) /* BoardType is DONTCARE*/
return TRUE;
if ((cond1 & BIT0) != 0) /*GLNA*/
bitMask |= 0x000000FF;
if ((cond1 & BIT1) != 0) /*GPA*/
bitMask |= 0x0000FF00;
if ((cond1 & BIT2) != 0) /*ALNA*/
bitMask |= 0x00FF0000;
if ((cond1 & BIT3) != 0) /*APA*/
bitMask |= 0xFF000000;
if (((cond2 & bitMask) == (driver2 & bitMask)) && ((cond4 & bitMask) == (driver4 & bitMask))) /* BoardType of each RF path is matched*/
return TRUE;
else
return FALSE;
} else
return FALSE;
}
static BOOLEAN
CheckNegative(
struct dm_struct *pDM_Odm,
u32 Condition1,
u32 Condition2
)
{
return TRUE;
}
/******************************************************************************
* MAC_REG.TXT
******************************************************************************/
u4Byte Array_MP_8814A_MAC_REG[] = {
0x010, 0x0000007C,
0x014, 0x000000DB,
0x016, 0x00000002,
0x073, 0x00000010,
0x420, 0x00000080,
0x421, 0x0000000F,
0x428, 0x0000000A,
0x429, 0x00000010,
0x430, 0x00000000,
0x431, 0x00000000,
0x432, 0x00000000,
0x433, 0x00000001,
0x434, 0x00000004,
0x435, 0x00000005,
0x436, 0x00000007,
0x437, 0x00000008,
0x43C, 0x00000004,
0x43D, 0x00000005,
0x43E, 0x00000007,
0x43F, 0x00000008,
0x440, 0x0000005D,
0x441, 0x00000001,
0x442, 0x00000000,
0x444, 0x00000010,
0x445, 0x000000F0,
0x446, 0x00000001,
0x447, 0x000000FE,
0x448, 0x00000000,
0x449, 0x00000000,
0x44A, 0x00000000,
0x44B, 0x00000040,
0x44C, 0x00000010,
0x44D, 0x000000F0,
0x44E, 0x0000003F,
0x44F, 0x00000000,
0x450, 0x00000000,
0x451, 0x00000000,
0x452, 0x00000000,
0x453, 0x00000040,
0x45E, 0x00000004,
0x49C, 0x00000010,
0x49D, 0x000000F0,
0x49E, 0x00000000,
0x49F, 0x00000006,
0x4A0, 0x000000E0,
0x4A1, 0x00000003,
0x4A2, 0x00000000,
0x4A3, 0x00000040,
0x4A4, 0x00000015,
0x4A5, 0x000000F0,
0x4A6, 0x00000000,
0x4A7, 0x00000006,
0x4A8, 0x000000E0,
0x4A9, 0x00000000,
0x4AA, 0x00000000,
0x4AB, 0x00000000,
0x7DA, 0x00000008,
0x1448, 0x00000006,
0x144A, 0x00000006,
0x144C, 0x00000006,
0x144E, 0x00000006,
0x4C8, 0x000000FF,
0x4C9, 0x00000008,
0x4CA, 0x0000003C,
0x4CB, 0x0000003C,
0x4CC, 0x000000FF,
0x4CD, 0x000000FF,
0x4CE, 0x00000001,
0x4CF, 0x00000008,
0x500, 0x00000026,
0x501, 0x000000A2,
0x502, 0x0000002F,
0x503, 0x00000000,
0x504, 0x00000028,
0x505, 0x000000A3,
0x506, 0x0000005E,
0x507, 0x00000000,
0x508, 0x0000002B,
0x509, 0x000000A4,
0x50A, 0x0000005E,
0x50B, 0x00000000,
0x50C, 0x0000004F,
0x50D, 0x000000A4,
0x50E, 0x00000000,
0x50F, 0x00000000,
0x512, 0x0000001C,
0x514, 0x0000000A,
0x516, 0x0000000A,
0x521, 0x0000002F,
0x525, 0x0000004F,
0x550, 0x00000010,
0x551, 0x00000010,
0x559, 0x00000002,
0x55C, 0x00000064,
0x55D, 0x000000FF,
0x577, 0x00000003,
0x5BE, 0x00000064,
0x604, 0x00000001,
0x605, 0x00000030,
0x607, 0x00000001,
0x608, 0x0000000E,
0x609, 0x0000002A,
0x60A, 0x00000000,
0x60C, 0x00000018,
0x60D, 0x00000050,
0x6A0, 0x000000FF,
0x6A1, 0x000000FF,
0x6A2, 0x000000FF,
0x6A3, 0x000000FF,
0x6A4, 0x000000FF,
0x6A5, 0x000000FF,
0x6DE, 0x00000084,
0x620, 0x000000FF,
0x621, 0x000000FF,
0x622, 0x000000FF,
0x623, 0x000000FF,
0x624, 0x000000FF,
0x625, 0x000000FF,
0x626, 0x000000FF,
0x627, 0x000000FF,
0x638, 0x00000064,
0x63C, 0x0000000A,
0x63D, 0x0000000A,
0x63E, 0x0000000E,
0x63F, 0x0000000E,
0x640, 0x00000040,
0x642, 0x00000040,
0x643, 0x00000000,
0x652, 0x000000C8,
0x66E, 0x00000005,
0x700, 0x00000021,
0x701, 0x00000043,
0x702, 0x00000065,
0x703, 0x00000087,
0x708, 0x00000021,
0x709, 0x00000043,
0x70A, 0x00000065,
0x70B, 0x00000087,
0x718, 0x00000040,
0x7D5, 0x000000BC,
0x7D8, 0x00000028,
0x7D9, 0x00000000,
0x7DA, 0x0000000B,
};
void
odm_read_and_config_mp_8814a_mac_reg(
struct dm_struct * pDM_Odm
)
{
u4Byte i = 0;
u1Byte cCond;
BOOLEAN bMatched = TRUE, bSkipped = FALSE;
u4Byte ArrayLen = sizeof(Array_MP_8814A_MAC_REG)/sizeof(u4Byte);
pu4Byte Array = Array_MP_8814A_MAC_REG;
u4Byte v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0;
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8814A_MAC_REG\n"));
while ((i + 1) < ArrayLen) {
v1 = Array[i];
v2 = Array[i + 1];
if (v1 & (BIT31 | BIT30)) {/*positive & negative condition*/
if (v1 & BIT31) {/* positive condition*/
cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28);
if (cCond == COND_ENDIF) {/*end*/
bMatched = TRUE;
bSkipped = FALSE;
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ENDIF\n"));
} else if (cCond == COND_ELSE) { /*else*/
bMatched = bSkipped?FALSE:TRUE;
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ELSE\n"));
} else {/*if , else if*/
pre_v1 = v1;
pre_v2 = v2;
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("IF or ELSE IF\n"));
}
} else if (v1 & BIT30) { /*negative condition*/
if (bSkipped == FALSE) {
if (CheckPositive(pDM_Odm, pre_v1, pre_v2, v1, v2)) {
bMatched = TRUE;
bSkipped = TRUE;
} else {
bMatched = FALSE;
bSkipped = FALSE;
}
} else
bMatched = FALSE;
}
} else {
if (bMatched)
odm_ConfigMAC_8814A(pDM_Odm, v1, (u1Byte)v2);
}
i = i + 2;
}
}
u4Byte
odm_get_version_mp_8814a_mac_reg(void)
{
return 85;
}
#endif /* end of HWIMG_SUPPORT*/

39
hal/phydm/rtl8814a/halhwimg8814a_mac.h 100644
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@ -0,0 +1,39 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/*Image2HeaderVersion: 2.19*/
#if (RTL8814A_SUPPORT == 1)
#ifndef __INC_MP_MAC_HW_IMG_8814A_H
#define __INC_MP_MAC_HW_IMG_8814A_H
/******************************************************************************
* MAC_REG.TXT
******************************************************************************/
void
odm_read_and_config_mp_8814a_mac_reg(/* TC: Test Chip, MP: MP Chip*/
struct dm_struct *pDM_Odm
);
u4Byte odm_get_version_mp_8814a_mac_reg(void);
#endif
#endif /* end of HWIMG_SUPPORT*/

8846
hal/phydm/rtl8814a/halhwimg8814a_rf.c 100644
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File diff suppressed because it is too large Load Diff

149
hal/phydm/rtl8814a/halhwimg8814a_rf.h 100644
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@ -0,0 +1,149 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/*Image2HeaderVersion: 2.19*/
#if (RTL8814A_SUPPORT == 1)
#ifndef __INC_MP_RF_HW_IMG_8814A_H
#define __INC_MP_RF_HW_IMG_8814A_H
/******************************************************************************
* RadioA.TXT
******************************************************************************/
void
odm_read_and_config_mp_8814a_radioa(/* TC: Test Chip, MP: MP Chip*/
struct dm_struct *pDM_Odm
);
u4Byte ODM_GetVersion_MP_8814A_RadioA(void);
/******************************************************************************
* RadioB.TXT
******************************************************************************/
void
odm_read_and_config_mp_8814a_radiob(/* TC: Test Chip, MP: MP Chip*/
struct dm_struct *pDM_Odm
);
u4Byte ODM_GetVersion_MP_8814A_RadioB(void);
/******************************************************************************
* RadioC.TXT
******************************************************************************/
void
odm_read_and_config_mp_8814a_radioc(/* TC: Test Chip, MP: MP Chip*/
struct dm_struct *pDM_Odm
);
u4Byte ODM_GetVersion_MP_8814A_RadioC(void);
/******************************************************************************
* RadioD.TXT
******************************************************************************/
void
odm_read_and_config_mp_8814a_radiod(/* TC: Test Chip, MP: MP Chip*/
struct dm_struct *pDM_Odm
);
u4Byte ODM_GetVersion_MP_8814A_RadioD(void);
/******************************************************************************
* TxPowerTrack.TXT
******************************************************************************/
void
odm_read_and_config_mp_8814a_txpowertrack(/* TC: Test Chip, MP: MP Chip*/
struct dm_struct *pDM_Odm
);
u4Byte ODM_GetVersion_MP_8814A_TxPowerTrack(void);
/******************************************************************************
* TxPowerTrack_Type0.TXT
******************************************************************************/
void
odm_read_and_config_mp_8814a_txpowertrack_type0(/* TC: Test Chip, MP: MP Chip*/
struct dm_struct *pDM_Odm
);
u4Byte ODM_GetVersion_MP_8814A_TxPowerTrack_Type0(void);
/******************************************************************************
* TxPowerTrack_Type2.TXT
******************************************************************************/
void
odm_read_and_config_mp_8814a_txpowertrack_type2(/* TC: Test Chip, MP: MP Chip*/
struct dm_struct *pDM_Odm
);
u4Byte ODM_GetVersion_MP_8814A_TxPowerTrack_Type2(void);
/******************************************************************************
* TxPowerTrack_Type5.TXT
******************************************************************************/
void
odm_read_and_config_mp_8814a_txpowertrack_type5(/* TC: Test Chip, MP: MP Chip*/
struct dm_struct *pDM_Odm
);
u4Byte ODM_GetVersion_MP_8814A_TxPowerTrack_Type5(void);
/******************************************************************************
* TXPWR_LMT.TXT
******************************************************************************/
void
odm_read_and_config_mp_8814a_txpwr_lmt(/* TC: Test Chip, MP: MP Chip*/
struct dm_struct *pDM_Odm
);
u4Byte ODM_GetVersion_MP_8814A_TXPWR_LMT(void);
/******************************************************************************
* TXPWR_LMT_type2.TXT
******************************************************************************/
void
odm_read_and_config_mp_8814a_txpwr_lmt_type2(/* TC: Test Chip, MP: MP Chip*/
struct dm_struct *pDM_Odm
);
u4Byte ODM_GetVersion_MP_8814A_TXPWR_LMT_type2(void);
/******************************************************************************
* TXPWR_LMT_Type3.TXT
******************************************************************************/
void
odm_read_and_config_mp_8814a_txpwr_lmt_type3(/* TC: Test Chip, MP: MP Chip*/
struct dm_struct *pDM_Odm
);
u4Byte ODM_GetVersion_MP_8814A_TXPWR_LMT_Type3(void);
/******************************************************************************
* TXPWR_LMT_Type5.TXT
******************************************************************************/
void
odm_read_and_config_mp_8814a_txpwr_lmt_type5(/* TC: Test Chip, MP: MP Chip*/
struct dm_struct *pDM_Odm
);
u4Byte ODM_GetVersion_MP_8814A_TXPWR_LMT_Type5(void);
#endif
#endif /* end of HWIMG_SUPPORT*/

1754
hal/phydm/rtl8814a/halphyrf_8814a_ap.c 100644
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164
hal/phydm/rtl8814a/halphyrf_8814a_ap.h 100644
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@ -0,0 +1,164 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __HAL_PHY_RF_8814A_H__
#define __HAL_PHY_RF_8814A_H__
/*--------------------------Define Parameters-------------------------------*/
#define IQK_DELAY_TIME_8814A 10 //ms
#define index_mapping_NUM_8814A 15
#define AVG_THERMAL_NUM_8814A 4
#define RF_T_METER_8814A 0x42
#define MAX_PATH_NUM_8814A 4
#include "../halphyrf_ap.h"
void ConfigureTxpowerTrack_8814A(
PTXPWRTRACK_CFG pConfig
);
VOID
GetDeltaSwingTable_8814A(
struct dm_struct *pDM_Odm,
u8* *TemperatureUP_A,
u8* *TemperatureDOWN_A,
u8* *TemperatureUP_B,
u8* *TemperatureDOWN_B
);
VOID
GetDeltaSwingTable_8814A_PathCD(
struct dm_struct *pDM_Odm,
u8* *TemperatureUP_C,
u8* *TemperatureDOWN_C,
u8* *TemperatureUP_D,
u8* *TemperatureDOWN_D
);
VOID
ConfigureTxpowerTrack_8814A(
IN PTXPWRTRACK_CFG pConfig
);
VOID
ODM_TxPwrTrackSetPwr8814A(
IN PDM_ODM_T pDM_Odm,
IN PWRTRACK_METHOD Method,
IN u1Byte RFPath,
IN u1Byte ChannelMappedIndex
);
u1Byte
CheckRFGainOffset(
PDM_ODM_T pDM_Odm,
PWRTRACK_METHOD Method,
u1Byte RFPath
);
//
// LC calibrate
//
void
PHY_LCCalibrate_8814A(
IN PDM_ODM_T pDM_Odm
);
void
phy_LCCalibrate_8814A(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
IN PDM_ODM_T pDM_Odm,
#else
IN PADAPTER pAdapter,
#endif
IN BOOLEAN is2T
);
//
// AP calibrate
//
void
PHY_APCalibrate_8814A(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
IN PDM_ODM_T pDM_Odm,
#else
IN PADAPTER pAdapter,
#endif
IN s1Byte delta);
void
PHY_DigitalPredistortion_8814A( IN PADAPTER pAdapter);
#if 0 //FOR_8814_IQK
VOID
_PHY_SaveADDARegisters(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
IN PDM_ODM_T pDM_Odm,
#else
IN PADAPTER pAdapter,
#endif
IN pu4Byte ADDAReg,
IN pu4Byte ADDABackup,
IN u4Byte RegisterNum
);
VOID
_PHY_PathADDAOn(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
IN PDM_ODM_T pDM_Odm,
#else
IN PADAPTER pAdapter,
#endif
IN pu4Byte ADDAReg,
IN BOOLEAN isPathAOn,
IN BOOLEAN is2T
);
VOID
_PHY_MACSettingCalibration(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
IN PDM_ODM_T pDM_Odm,
#else
IN PADAPTER pAdapter,
#endif
IN pu4Byte MACReg,
IN pu4Byte MACBackup
);
VOID
_PHY_PathAStandBy(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
IN PDM_ODM_T pDM_Odm
#else
IN PADAPTER pAdapter
#endif
);
#endif
#endif // #ifndef __HAL_PHY_RF_8814A_H__

528
hal/phydm/rtl8814a/halphyrf_8814a_win.c 100644
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@ -0,0 +1,528 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include "mp_precomp.h"
#include "../phydm_precomp.h"
#if (RTL8814A_SUPPORT == 1)
/*---------------------------Define Local Constant---------------------------*/
// 2010/04/25 MH Define the max tx power tracking tx agc power.
#define ODM_TXPWRTRACK_MAX_IDX_8814A 6
/*---------------------------Define Local Constant---------------------------*/
//3============================================================
//3 Tx Power Tracking
//3============================================================
// Add CheckRFGainOffset By YuChen to make sure that RF gain offset will not over upperbound 4'b1010
u1Byte
CheckRFGainOffset(
PDM_ODM_T pDM_Odm,
u1Byte RFPath
)
{
u1Byte UpperBound = 10; // 4'b1010 = 10
u1Byte Final_RF_Index = 0;
BOOLEAN bPositive = FALSE;
PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo);
if( pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath] >= 0) // check if RF_Index is positive or not
{
Final_RF_Index = pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath] >> 1;
bPositive = TRUE;
ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)RFPath, rRF_TxGainOffset, BIT15, bPositive);
}
else
{
Final_RF_Index = (-1)*pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath] >> 1;
bPositive = FALSE;
ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)RFPath, rRF_TxGainOffset, BIT15, bPositive);
}
if(bPositive == TRUE)
{
if(Final_RF_Index >= UpperBound)
{
ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)RFPath, rRF_TxGainOffset, 0xF0000, UpperBound); //set RF Reg0x55 per path
return UpperBound;
}
else
{
ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)RFPath, rRF_TxGainOffset, 0xF0000, Final_RF_Index); //set RF Reg0x55 per path
return Final_RF_Index;
}
}
else
{
ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)RFPath, rRF_TxGainOffset, 0xF0000, Final_RF_Index); //set RF Reg0x55 per path
return Final_RF_Index;
}
return FALSE;
}
VOID
ODM_TxPwrTrackSetPwr8814A(
PDM_ODM_T pDM_Odm,
PWRTRACK_METHOD Method,
u1Byte RFPath,
u1Byte ChannelMappedIndex
)
{
u1Byte Final_OFDM_Swing_Index = 0;
u1Byte Final_CCK_Swing_Index = 0;
u1Byte Final_RF_Index = 0;
u1Byte UpperBound = 10, TxScalingUpperBound = 28; // Upperbound = 4'b1010, TxScalingUpperBound = +2 dB
PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo);
if (Method == MIX_MODE)
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("pRFCalibrateInfo->DefaultOfdmIndex=%d, pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath]=%d, RF_Path = %d\n",
pRFCalibrateInfo->DefaultOfdmIndex, pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath], RFPath));
Final_CCK_Swing_Index = pRFCalibrateInfo->DefaultCckIndex + pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath];
Final_OFDM_Swing_Index = pRFCalibrateInfo->DefaultOfdmIndex + (pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath])%2;
Final_RF_Index = CheckRFGainOffset(pDM_Odm, RFPath); // check if Final_RF_Index >= 10
if((Final_RF_Index == UpperBound) && (pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath] >= 0)) // check BBSW is not over +2dB
{
Final_OFDM_Swing_Index = pRFCalibrateInfo->DefaultOfdmIndex + (pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath] - (UpperBound << 1));
if(Final_OFDM_Swing_Index > TxScalingUpperBound)
Final_OFDM_Swing_Index = TxScalingUpperBound;
}
switch(RFPath)
{
case ODM_RF_PATH_A:
ODM_SetBBReg(pDM_Odm, rA_TxScale_Jaguar, 0xFFE00000, TxScalingTable_Jaguar[Final_OFDM_Swing_Index]); //set BBswing
ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
("******Path_A Compensate with BBSwing , Final_OFDM_Swing_Index = %d, Final_RF_Index = %d \n", Final_OFDM_Swing_Index, Final_RF_Index));
break;
case ODM_RF_PATH_B:
ODM_SetBBReg(pDM_Odm, rB_TxScale_Jaguar, 0xFFE00000, TxScalingTable_Jaguar[Final_OFDM_Swing_Index]); //set BBswing
ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
("******Path_B Compensate with BBSwing , Final_OFDM_Swing_Index = %d, Final_RF_Index = %d \n", Final_OFDM_Swing_Index, Final_RF_Index));
break;
case ODM_RF_PATH_C:
ODM_SetBBReg(pDM_Odm, rC_TxScale_Jaguar2, 0xFFE00000, TxScalingTable_Jaguar[Final_OFDM_Swing_Index]); //set BBswing
ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
("******Path_C Compensate with BBSwing , Final_OFDM_Swing_Index = %d, Final_RF_Index = %d \n", Final_OFDM_Swing_Index, Final_RF_Index));
break;
case ODM_RF_PATH_D:
ODM_SetBBReg(pDM_Odm, rD_TxScale_Jaguar2, 0xFFE00000, TxScalingTable_Jaguar[Final_OFDM_Swing_Index]); //set BBswing
ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
("******Path_D Compensate with BBSwing , Final_OFDM_Swing_Index = %d, Final_RF_Index = %d \n", Final_OFDM_Swing_Index, Final_RF_Index));
break;
default:
ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
("Wrong Path name!!!! \n"));
break;
}
}
return;
} // ODM_TxPwrTrackSetPwr8814A
VOID
GetDeltaSwingTable_8814A(
IN PDM_ODM_T pDM_Odm,
OUT pu1Byte *TemperatureUP_A,
OUT pu1Byte *TemperatureDOWN_A,
OUT pu1Byte *TemperatureUP_B,
OUT pu1Byte *TemperatureDOWN_B
)
{
PADAPTER Adapter = pDM_Odm->Adapter;
PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo);
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
u1Byte TxRate = 0xFF;
u1Byte channel = pHalData->CurrentChannel;
if (pDM_Odm->mp_mode == TRUE) {
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
#if (MP_DRIVER == 1)
PMPT_CONTEXT pMptCtx = &(Adapter->MptCtx);
TxRate = MptToMgntRate(pMptCtx->MptRateIndex);
#endif
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.MptCtx);
TxRate = MptToMgntRate(pMptCtx->MptRateIndex);
#endif
#endif
} else {
u2Byte rate = *(pDM_Odm->pForcedDataRate);
if (!rate) { /*auto rate*/
if (rate != 0xFF) {
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->TxRate);
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
TxRate = HwRateToMRate(pDM_Odm->TxRate);
#endif
}
} else { /*force rate*/
TxRate = (u1Byte)rate;
}
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Power Tracking TxRate=0x%X\n", TxRate));
if (1 <= channel && channel <= 14) {
if (IS_CCK_RATE(TxRate)) {
*TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_P;
*TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_N;
*TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_P;
*TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_N;
} else {
*TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GA_P;
*TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GA_N;
*TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_2GB_P;
*TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_2GB_N;
}
} else if (36 <= channel && channel <= 64) {
*TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P[0];
*TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N[0];
*TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P[0];
*TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N[0];
} else if (100 <= channel && channel <= 144) {
*TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P[1];
*TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N[1];
*TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P[1];
*TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N[1];
} else if (149 <= channel && channel <= 173) {
*TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P[2];
*TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N[2];
*TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P[2];
*TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N[2];
} else {
*TemperatureUP_A = (pu1Byte)DeltaSwingTableIdx_2GA_P_8188E;
*TemperatureDOWN_A = (pu1Byte)DeltaSwingTableIdx_2GA_N_8188E;
*TemperatureUP_B = (pu1Byte)DeltaSwingTableIdx_2GA_P_8188E;
*TemperatureDOWN_B = (pu1Byte)DeltaSwingTableIdx_2GA_N_8188E;
}
return;
}
VOID
GetDeltaSwingTable_8814A_PathCD(
IN PDM_ODM_T pDM_Odm,
OUT pu1Byte *TemperatureUP_C,
OUT pu1Byte *TemperatureDOWN_C,
OUT pu1Byte *TemperatureUP_D,
OUT pu1Byte *TemperatureDOWN_D
)
{
PADAPTER Adapter = pDM_Odm->Adapter;
PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo);
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
u1Byte TxRate = 0xFF;
u1Byte channel = pHalData->CurrentChannel;
if (pDM_Odm->mp_mode == TRUE) {
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
#if (MP_DRIVER == 1)
PMPT_CONTEXT pMptCtx = &(Adapter->MptCtx);
TxRate = MptToMgntRate(pMptCtx->MptRateIndex);
#endif
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.MptCtx);
TxRate = MptToMgntRate(pMptCtx->MptRateIndex);
#endif
#endif
} else {
u2Byte rate = *(pDM_Odm->pForcedDataRate);
if (!rate) { /*auto rate*/
if (rate != 0xFF) {
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->TxRate);
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
TxRate = HwRateToMRate(pDM_Odm->TxRate);
#endif
}
} else { /*force rate*/
TxRate = (u1Byte)rate;
}
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Power Tracking TxRate=0x%X\n", TxRate));
if ( 1 <= channel && channel <= 14) {
if (IS_CCK_RATE(TxRate)) {
*TemperatureUP_C = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKC_P;
*TemperatureDOWN_C = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKC_N;
*TemperatureUP_D = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKD_P;
*TemperatureDOWN_D = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKD_N;
} else {
*TemperatureUP_C = pRFCalibrateInfo->DeltaSwingTableIdx_2GC_P;
*TemperatureDOWN_C = pRFCalibrateInfo->DeltaSwingTableIdx_2GC_N;
*TemperatureUP_D = pRFCalibrateInfo->DeltaSwingTableIdx_2GD_P;
*TemperatureDOWN_D = pRFCalibrateInfo->DeltaSwingTableIdx_2GD_N;
}
} else if (36 <= channel && channel <= 64) {
*TemperatureUP_C = pRFCalibrateInfo->DeltaSwingTableIdx_5GC_P[0];
*TemperatureDOWN_C = pRFCalibrateInfo->DeltaSwingTableIdx_5GC_N[0];
*TemperatureUP_D = pRFCalibrateInfo->DeltaSwingTableIdx_5GD_P[0];
*TemperatureDOWN_D = pRFCalibrateInfo->DeltaSwingTableIdx_5GD_N[0];
} else if (100 <= channel && channel <= 144) {
*TemperatureUP_C = pRFCalibrateInfo->DeltaSwingTableIdx_5GC_P[1];
*TemperatureDOWN_C = pRFCalibrateInfo->DeltaSwingTableIdx_5GC_N[1];
*TemperatureUP_D = pRFCalibrateInfo->DeltaSwingTableIdx_5GD_P[1];
*TemperatureDOWN_D = pRFCalibrateInfo->DeltaSwingTableIdx_5GD_N[1];
} else if (149 <= channel && channel <= 173) {
*TemperatureUP_C = pRFCalibrateInfo->DeltaSwingTableIdx_5GC_P[2];
*TemperatureDOWN_C = pRFCalibrateInfo->DeltaSwingTableIdx_5GC_N[2];
*TemperatureUP_D = pRFCalibrateInfo->DeltaSwingTableIdx_5GD_P[2];
*TemperatureDOWN_D = pRFCalibrateInfo->DeltaSwingTableIdx_5GD_N[2];
} else {
*TemperatureUP_C = (pu1Byte)DeltaSwingTableIdx_2GA_P_8188E;
*TemperatureDOWN_C = (pu1Byte)DeltaSwingTableIdx_2GA_N_8188E;
*TemperatureUP_D = (pu1Byte)DeltaSwingTableIdx_2GA_P_8188E;
*TemperatureDOWN_D = (pu1Byte)DeltaSwingTableIdx_2GA_N_8188E;
}
return;
}
void ConfigureTxpowerTrack_8814A(
PTXPWRTRACK_CFG pConfig
)
{
pConfig->SwingTableSize_CCK = CCK_TABLE_SIZE;
pConfig->SwingTableSize_OFDM = OFDM_TABLE_SIZE;
pConfig->Threshold_IQK = 8;
pConfig->AverageThermalNum = AVG_THERMAL_NUM_8814A;
pConfig->RfPathCount = MAX_PATH_NUM_8814A;
pConfig->ThermalRegAddr = RF_T_METER_88E;
pConfig->ODM_TxPwrTrackSetPwr = ODM_TxPwrTrackSetPwr8814A;
pConfig->DoIQK = DoIQK_8814A;
pConfig->PHY_LCCalibrate = PHY_LCCalibrate_8814A;
pConfig->GetDeltaSwingTable = GetDeltaSwingTable_8814A;
pConfig->GetDeltaSwingTable8814only = GetDeltaSwingTable_8814A_PathCD;
}
VOID
phy_LCCalibrate_8814A(
IN PDM_ODM_T pDM_Odm,
IN BOOLEAN is2T
)
{
u4Byte LC_Cal = 0, cnt;
//Check continuous TX and Packet TX
u4Byte reg0x914 = ODM_Read4Byte(pDM_Odm, rSingleTone_ContTx_Jaguar);;
// Backup RF reg18.
LC_Cal = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask);
if((reg0x914 & 0x70000) == 0)
ODM_Write1Byte(pDM_Odm, REG_TXPAUSE_8812A, 0xFF);
//3 3. Read RF reg18
LC_Cal = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask);
//3 4. Set LC calibration begin bit15
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, LC_Cal|0x08000);
ODM_delay_ms(100);
for (cnt = 0; cnt < 100; cnt++) {
if (ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x8000) != 0x1)
break;
ODM_delay_ms(10);
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("retry cnt = %d\n", cnt));
//3 Restore original situation
if((reg0x914 & 70000) == 0)
ODM_Write1Byte(pDM_Odm, REG_TXPAUSE_8812A, 0x00);
// Recover channel number
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, LC_Cal);
DbgPrint("Call %s\n", __FUNCTION__);
}
VOID
phy_APCalibrate_8814A(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
IN PDM_ODM_T pDM_Odm,
#else
IN PADAPTER pAdapter,
#endif
IN s1Byte delta,
IN BOOLEAN is2T
)
{
}
VOID
PHY_LCCalibrate_8814A(
IN PDM_ODM_T pDM_Odm
)
{
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
PADAPTER pAdapter = pDM_Odm->Adapter;
#if (MP_DRIVER == 1)
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx);
#else
PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx);
#endif
#endif
#endif
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("===> PHY_LCCalibrate_8814A\n"));
//#if (MP_DRIVER == 1)
phy_LCCalibrate_8814A(pDM_Odm, TRUE);
//#endif
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("<=== PHY_LCCalibrate_8814A\n"));
}
VOID
PHY_APCalibrate_8814A(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
IN PDM_ODM_T pDM_Odm,
#else
IN PADAPTER pAdapter,
#endif
IN s1Byte delta
)
{
}
VOID
PHY_DPCalibrate_8814A(
IN PDM_ODM_T pDM_Odm
)
{
}
BOOLEAN
phy_QueryRFPathSwitch_8814A(
IN PADAPTER pAdapter
)
{
return TRUE;
}
BOOLEAN PHY_QueryRFPathSwitch_8814A(
IN PADAPTER pAdapter
)
{
#if DISABLE_BB_RF
return TRUE;
#endif
return phy_QueryRFPathSwitch_8814A(pAdapter);
}
VOID phy_SetRFPathSwitch_8814A(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
IN PDM_ODM_T pDM_Odm,
#else
IN PADAPTER pAdapter,
#endif
IN BOOLEAN bMain,
IN BOOLEAN is2T
)
{
}
VOID PHY_SetRFPathSwitch_8814A(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
IN PDM_ODM_T pDM_Odm,
#else
IN PADAPTER pAdapter,
#endif
IN BOOLEAN bMain
)
{
}
#else /* (RTL8814A_SUPPORT == 0)*/
VOID
PHY_LCCalibrate_8814A(
IN PDM_ODM_T pDM_Odm
){}
VOID
PHY_IQCalibrate_8814A(
IN PDM_ODM_T pDM_Odm,
IN BOOLEAN bReCovery
){}
#endif /* (RTL8814A_SUPPORT == 0)*/

106
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __HAL_PHY_RF_8814A_H__
#define __HAL_PHY_RF_8814A_H__
/*--------------------------Define Parameters-------------------------------*/
#define AVG_THERMAL_NUM_8814A 4
#include "halphyrf_win.h"
void ConfigureTxpowerTrack_8814A(
PTXPWRTRACK_CFG pConfig
);
VOID
GetDeltaSwingTable_8814A(
IN PDM_ODM_T pDM_Odm,
OUT pu1Byte *TemperatureUP_A,
OUT pu1Byte *TemperatureDOWN_A,
OUT pu1Byte *TemperatureUP_B,
OUT pu1Byte *TemperatureDOWN_B
);
VOID
GetDeltaSwingTable_8814A_PathCD(
IN PDM_ODM_T pDM_Odm,
OUT pu1Byte *TemperatureUP_C,
OUT pu1Byte *TemperatureDOWN_C,
OUT pu1Byte *TemperatureUP_D,
OUT pu1Byte *TemperatureDOWN_D
);
VOID
ODM_TxPwrTrackSetPwr8814A(
PDM_ODM_T pDM_Odm,
PWRTRACK_METHOD Method,
u1Byte RFPath,
u1Byte ChannelMappedIndex
);
u1Byte
CheckRFGainOffset(
PDM_ODM_T pDM_Odm,
u1Byte RFPath
);
//
// LC calibrate
//
void
PHY_LCCalibrate_8814A(
IN PDM_ODM_T pDM_Odm
);
//
// AP calibrate
//
void
PHY_APCalibrate_8814A(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
IN PDM_ODM_T pDM_Odm,
#else
IN PADAPTER pAdapter,
#endif
IN s1Byte delta
);
VOID
PHY_DPCalibrate_8814A(
IN PDM_ODM_T pDM_Odm
);
VOID PHY_SetRFPathSwitch_8814A(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
IN PDM_ODM_T pDM_Odm,
#else
IN PADAPTER pAdapter,
#endif
IN BOOLEAN bMain
);
#endif // #ifndef __HAL_PHY_RF_8188E_H__

219
hal/phydm/rtl8814a/phydm_regconfig8814a.c 100644
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include "mp_precomp.h"
#include "../phydm_precomp.h"
#if (RTL8814A_SUPPORT == 1)
void
odm_ConfigRFReg_8814A(
struct dm_struct *pDM_Odm,
u32 Addr,
u32 Data,
enum rf_path RF_PATH,
u32 RegAddr
)
{
if(Addr == 0xfe || Addr == 0xffe)
{
#ifdef CONFIG_LONG_DELAY_ISSUE
ODM_sleep_ms(50);
#else
ODM_delay_ms(50);
#endif
}
else
{
odm_set_rf_reg(pDM_Odm, RF_PATH, RegAddr, bRFRegOffsetMask, Data);
// Add 1us delay between BB/RF register setting.
ODM_delay_us(1);
}
}
void
odm_ConfigRF_RadioA_8814A(
struct dm_struct *pDM_Odm,
u32 Addr,
u32 Data
)
{
u4Byte content = 0x1000; // RF_Content: radioa_txt
u4Byte maskforPhySet= (u4Byte)(content&0xE000);
odm_ConfigRFReg_8814A(pDM_Odm, Addr, Data, RF_PATH_A, Addr|maskforPhySet);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioA] %08X %08X\n", Addr, Data));
}
void
odm_ConfigRF_RadioB_8814A(
struct dm_struct *pDM_Odm,
u32 Addr,
u32 Data
)
{
u4Byte content = 0x1001; // RF_Content: radiob_txt
u4Byte maskforPhySet= (u4Byte)(content&0xE000);
odm_ConfigRFReg_8814A(pDM_Odm, Addr, Data, RF_PATH_B, Addr|maskforPhySet);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioB] %08X %08X\n", Addr, Data));
}
void
odm_ConfigRF_RadioC_8814A(
struct dm_struct *pDM_Odm,
u32 Addr,
u32 Data
)
{
u4Byte content = 0x1001; // RF_Content: radiob_txt
u4Byte maskforPhySet= (u4Byte)(content&0xE000);
odm_ConfigRFReg_8814A(pDM_Odm, Addr, Data, RF_PATH_C, Addr|maskforPhySet);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioC] %08X %08X\n", Addr, Data));
}
void
odm_ConfigRF_RadioD_8814A(
struct dm_struct *pDM_Odm,
u32 Addr,
u32 Data
)
{
u4Byte content = 0x1001; // RF_Content: radiob_txt
u4Byte maskforPhySet= (u4Byte)(content&0xE000);
odm_ConfigRFReg_8814A(pDM_Odm, Addr, Data, RF_PATH_D, Addr|maskforPhySet);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioD] %08X %08X\n", Addr, Data));
}
void
odm_ConfigMAC_8814A(
struct dm_struct *pDM_Odm,
u32 Addr,
IN u1Byte Data
)
{
odm_write_1byte(pDM_Odm, Addr, Data);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigMACWithHeaderFile: [MAC_REG] %08X %08X\n", Addr, Data));
}
void
odm_ConfigBB_AGC_8814A(
struct dm_struct *pDM_Odm,
u32 Addr,
u32 Bitmask,
u32 Data
)
{
odm_set_bb_reg(pDM_Odm, Addr, Bitmask, Data);
// Add 1us delay between BB/RF register setting.
ODM_delay_us(1);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigBBWithHeaderFile: [AGC_TAB] %08X %08X\n", Addr, Data));
}
void
odm_ConfigBB_PHY_REG_PG_8814A(
struct dm_struct *pDM_Odm,
u32 Band,
u32 RfPath,
u32 TxNum,
u32 Addr,
u32 Bitmask,
u32 Data
)
{
if (Addr == 0xfe || Addr == 0xffe)
#ifdef CONFIG_LONG_DELAY_ISSUE
ODM_sleep_ms(50);
#else
ODM_delay_ms(50);
#endif
else
{
#if !(DM_ODM_SUPPORT_TYPE&ODM_AP)
phy_store_tx_power_by_rate(pDM_Odm->adapter, Band, RfPath, TxNum, Addr, Bitmask, Data);
#endif
}
ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X %08X\n", Addr, Bitmask, Data));
}
void
odm_ConfigBB_PHY_8814A(
struct dm_struct *pDM_Odm,
u32 Addr,
u32 Bitmask,
u32 Data
)
{
if (Addr == 0xfe)
#ifdef CONFIG_LONG_DELAY_ISSUE
ODM_sleep_ms(50);
#else
ODM_delay_ms(50);
#endif
else if (Addr == 0xfd)
ODM_delay_ms(5);
else if (Addr == 0xfc)
ODM_delay_ms(1);
else if (Addr == 0xfb)
ODM_delay_us(50);
else if (Addr == 0xfa)
ODM_delay_us(5);
else if (Addr == 0xf9)
ODM_delay_us(1);
else
{
odm_set_bb_reg(pDM_Odm, Addr, Bitmask, Data);
}
// Add 1us delay between BB/RF register setting.
ODM_delay_us(1);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X\n", Addr, Data));
}
void
odm_ConfigBB_TXPWR_LMT_8814A(
struct dm_struct *pDM_Odm,
u8* Regulation,
u8* Band,
u8* Bandwidth,
u8* RateSection,
u8* RfPath,
u8* Channel,
u8* PowerLimit
)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
phy_set_tx_power_limit(pDM_Odm, Regulation, Band,
Bandwidth, RateSection, RfPath, Channel, PowerLimit);
#endif
}
#endif

109
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __INC_ODM_REGCONFIG_H_8814A
#define __INC_ODM_REGCONFIG_H_8814A
#if (RTL8814A_SUPPORT == 1)
void
odm_ConfigRFReg_8814A(
struct dm_struct *pDM_Odm,
u32 Addr,
u32 Data,
enum rf_path RF_PATH,
u32 RegAddr
);
void
odm_ConfigRF_RadioA_8814A(
struct dm_struct *pDM_Odm,
u32 Addr,
u32 Data
);
void
odm_ConfigRF_RadioB_8814A(
struct dm_struct *pDM_Odm,
u32 Addr,
u32 Data
);
void
odm_ConfigRF_RadioC_8814A(
struct dm_struct *pDM_Odm,
u32 Addr,
u32 Data
);
void
odm_ConfigRF_RadioD_8814A(
struct dm_struct *pDM_Odm,
u32 Addr,
u32 Data
);
void
odm_ConfigMAC_8814A(
struct dm_struct *pDM_Odm,
u32 Addr,
IN u1Byte Data
);
void
odm_ConfigBB_AGC_8814A(
struct dm_struct *pDM_Odm,
u32 Addr,
u32 Bitmask,
u32 Data
);
void
odm_ConfigBB_PHY_REG_PG_8814A(
struct dm_struct *pDM_Odm,
u32 Band,
u32 RfPath,
u32 TxNum,
u32 Addr,
u32 Bitmask,
u32 Data
);
void
odm_ConfigBB_PHY_8814A(
struct dm_struct *pDM_Odm,
u32 Addr,
u32 Bitmask,
u32 Data
);
void
odm_ConfigBB_TXPWR_LMT_8814A(
struct dm_struct *pDM_Odm,
u8* Regulation,
u8* Band,
u8* Bandwidth,
u8* RateSection,
u8* RfPath,
u8* Channel,
u8* PowerLimit
);
#endif
#endif // end of SUPPORT

465
hal/phydm/rtl8814a/phydm_rtl8814a.c 100644
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
//============================================================
// include files
//============================================================
#include "mp_precomp.h"
#include "../phydm_precomp.h"
#if (RTL8814A_SUPPORT == 1)
#ifdef PHYDM_PRIMARY_CCA
VOID
odm_Write_Dynamic_CCA_8814A(
struct dm_struct *pDM_Odm,
u8 CurrentMFstate
)
{
struct phydm_pri_cca_struct* PrimaryCCA = &(pDM_Odm->dm_pri_cca);
if (PrimaryCCA->MF_state != CurrentMFstate){
ODM_SetBBReg(pDM_Odm, ODM_REG_L1SBD_PD_CH_11N, BIT8|BIT7, CurrentMFstate);
}
PrimaryCCA->MF_state = CurrentMFstate;
}
VOID
odm_PrimaryCCA_Check_Init_8814A(
struct dm_struct *pDM_Odm)
{
#if ((DM_ODM_SUPPORT_TYPE == ODM_WIN) || (DM_ODM_SUPPORT_TYPE == ODM_AP))
PADAPTER pAdapter = pDM_Odm->Adapter;
struct phydm_pri_cca_struct* PrimaryCCA = &(pDM_Odm->dm_pri_cca);
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
pHalData->RTSEN = 0;
PrimaryCCA->DupRTS_flag = 0;
PrimaryCCA->intf_flag = 0;
PrimaryCCA->intf_type = 0;
PrimaryCCA->Monitor_flag = 0;
PrimaryCCA->PriCCA_flag = 0;
PrimaryCCA->CH_offset = 0;
PrimaryCCA->MF_state = 0;
#endif /*((DM_ODM_SUPPORT_TYPE==ODM_WIN) ||(DM_ODM_SUPPORT_TYPE==ODM_AP)) */
}
VOID
odm_DynamicPrimaryCCA_Check_8814A(
struct dm_struct *pDM_Odm
)
{
if(pDM_Odm->SupportICType != ODM_RTL8814A)
return;
switch (pDM_Odm->SupportPlatform)
{
case ODM_WIN:
#if(DM_ODM_SUPPORT_TYPE==ODM_WIN)
odm_DynamicPrimaryCCAMP_8814A(pDM_Odm);
#endif
break;
case ODM_CE:
#if(DM_ODM_SUPPORT_TYPE==ODM_CE)
#endif
break;
case ODM_AP:
#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
odm_DynamicPrimaryCCAAP_8814A(pDM_Odm);
#endif
break;
}
}
#if(DM_ODM_SUPPORT_TYPE==ODM_WIN)
VOID
odm_DynamicPrimaryCCAMP_8814A(
struct dm_struct *pDM_Odm
)
{
PADAPTER pAdapter = pDM_Odm->Adapter;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm, PHYDM_FALSEALMCNT);
struct phydm_pri_cca_struct* PrimaryCCA = &(pDM_Odm->dm_pri_cca);
BOOLEAN Is40MHz = FALSE;
u8Byte OFDM_CCA, OFDM_FA, BW_USC_Cnt, BW_LSC_Cnt;
u8 SecCHOffset;
u8 CurMFstate;
static u8 CountDown = Monitor_TIME;
OFDM_CCA = FalseAlmCnt->Cnt_OFDM_CCA;
OFDM_FA = FalseAlmCnt->Cnt_Ofdm_fail;
BW_USC_Cnt = FalseAlmCnt->Cnt_BW_USC;
BW_LSC_Cnt = FalseAlmCnt->Cnt_BW_LSC;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("8814A: OFDM CCA=%d\n", OFDM_CCA));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("8814A: OFDM FA=%d\n", OFDM_FA));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("8814A: BW_USC=%d\n", BW_USC_Cnt));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("8814A: BW_LSC=%d\n", BW_LSC_Cnt));
Is40MHz = *(pDM_Odm->pBandWidth);
SecCHOffset = *(pDM_Odm->pSecChOffset); // NIC: 2: sec is below, 1: sec is above
//DbgPrint("8814A: SecCHOffset = %d\n", SecCHOffset);
if(!pDM_Odm->bLinked){
return;
}
else{
if(Is40MHz){
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("8814A: Cont Down= %d\n", CountDown));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("8814A: Primary_CCA_flag=%d\n", PrimaryCCA->PriCCA_flag));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("8814A: Intf_Type=%d\n", PrimaryCCA->intf_type));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("8814A: Intf_flag=%d\n", PrimaryCCA->intf_flag ));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("8814A: Duplicate RTS Flag=%d\n", PrimaryCCA->DupRTS_flag));
//DbgPrint("8814A RTS_EN=%d\n", pHalData->RTSEN);
if(PrimaryCCA->PriCCA_flag == 0){
if(SecCHOffset == 2){ // Primary channel is above NOTE: duplicate CTS can remove this condition
if((OFDM_CCA > OFDMCCA_TH) && (BW_LSC_Cnt>(BW_USC_Cnt + BW_Ind_Bias))
&& (OFDM_FA>(OFDM_CCA>>1))){
PrimaryCCA->intf_type = 1;
PrimaryCCA->intf_flag = 1;
CurMFstate = MF_USC;
odm_Write_Dynamic_CCA_8814A(pDM_Odm, CurMFstate);
PrimaryCCA->PriCCA_flag = 1;
}
else if((OFDM_CCA > OFDMCCA_TH) && (BW_LSC_Cnt>(BW_USC_Cnt + BW_Ind_Bias))
&& (OFDM_FA < (OFDM_CCA>>1))){
PrimaryCCA->intf_type = 2;
PrimaryCCA->intf_flag = 1;
CurMFstate = MF_USC;
odm_Write_Dynamic_CCA_8814A(pDM_Odm, CurMFstate);
PrimaryCCA->PriCCA_flag = 1;
PrimaryCCA->DupRTS_flag = 1;
pHalData->RTSEN = 1;
}
else{
PrimaryCCA->intf_type = 0;
PrimaryCCA->intf_flag = 0;
CurMFstate = MF_USC_LSC;
odm_Write_Dynamic_CCA_8814A(pDM_Odm, CurMFstate);
pHalData->RTSEN = 0;
PrimaryCCA->DupRTS_flag = 0;
}
}
else if (SecCHOffset == 1){
if((OFDM_CCA > OFDMCCA_TH) && (BW_USC_Cnt > (BW_LSC_Cnt + BW_Ind_Bias))
&& (OFDM_FA > (OFDM_CCA>>1))){
PrimaryCCA->intf_type = 1;
PrimaryCCA->intf_flag = 1;
CurMFstate = MF_LSC;
odm_Write_Dynamic_CCA_8814A(pDM_Odm, CurMFstate);
PrimaryCCA->PriCCA_flag = 1;
}
else if((OFDM_CCA > OFDMCCA_TH) && (BW_USC_Cnt>(BW_LSC_Cnt + BW_Ind_Bias))
&& (OFDM_FA < (OFDM_CCA>>1))){
PrimaryCCA->intf_type = 2;
PrimaryCCA->intf_flag = 1;
CurMFstate = MF_LSC;
odm_Write_Dynamic_CCA_8814A(pDM_Odm, CurMFstate);
PrimaryCCA->PriCCA_flag = 1;
PrimaryCCA->DupRTS_flag = 1;
pHalData->RTSEN = 1;
}
else{
PrimaryCCA->intf_type = 0;
PrimaryCCA->intf_flag = 0;
CurMFstate = MF_USC_LSC;
odm_Write_Dynamic_CCA_8814A(pDM_Odm, CurMFstate);
pHalData->RTSEN = 0;
PrimaryCCA->DupRTS_flag = 0;
}
}
}
else{ // PrimaryCCA->PriCCA_flag==1
CountDown--;
if(CountDown == 0){
CountDown = Monitor_TIME;
PrimaryCCA->PriCCA_flag = 0;
CurMFstate = MF_USC_LSC;
odm_Write_Dynamic_CCA_8814A(pDM_Odm, CurMFstate); /* default*/
pHalData->RTSEN = 0;
PrimaryCCA->DupRTS_flag = 0;
PrimaryCCA->intf_type = 0;
PrimaryCCA->intf_flag = 0;
}
}
}
else{
return;
}
}
}
#elif(DM_ODM_SUPPORT_TYPE == ODM_AP)
VOID
odm_DynamicPrimaryCCAAP_8814A(
struct dm_struct *pDM_Odm
)
{
PADAPTER Adapter = pDM_Odm->Adapter;
prtl8192cd_priv priv = pDM_Odm->priv;
PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm, PHYDM_FALSEALMCNT);
struct phydm_pri_cca_struct* PrimaryCCA = &(pDM_Odm->dm_pri_cca);
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
u8 i;
static u4Byte Count_Down = Monitor_TIME;
BOOLEAN STA_BW = FALSE, STA_BW_pre = FALSE, STA_BW_TMP = FALSE;
BOOLEAN bConnected = FALSE;
BOOLEAN Is40MHz = FALSE;
u8 SecCHOffset;
u8 CurMFstate;
PSTA_INFO_T pstat;
Is40MHz = *(pDM_Odm->pBandWidth);
SecCHOffset = *(pDM_Odm->pSecChOffset); // AP: 1: sec is below, 2: sec is above
for(i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++){
pstat = pDM_Odm->pODM_StaInfo[i];
if(IS_STA_VALID(pstat)){
STA_BW_TMP = pstat->tx_bw;
if(STA_BW_TMP > STA_BW){
STA_BW = STA_BW_TMP;
}
bConnected = TRUE;
}
}
if(Is40MHz){
if(PrimaryCCA->PriCCA_flag == 0){
if(bConnected){
if(STA_BW == 0){ //2 STA BW=20M
PrimaryCCA->PriCCA_flag = 1;
if(SecCHOffset==1){
CurMFstate = MF_USC;
odm_Write_Dynamic_CCA_8814A(pDM_Odm, CurMFstate);
}
else if(SecCHOffset==2){
CurMFstate = MF_USC;
odm_Write_Dynamic_CCA_8814A(pDM_Odm, CurMFstate);
}
}
else{ //2 STA BW=40M
if(PrimaryCCA->intf_flag == 0){
odm_Intf_Detection(pDM_Odm);
}
else{ // intf_flag = 1
if(PrimaryCCA->intf_type == 1){
if(PrimaryCCA->CH_offset == 1){
CurMFstate = MF_USC;
if(SecCHOffset == 1){ // AP, 1: primary is above 2: primary is below
odm_Write_Dynamic_CCA_8814A(pDM_Odm, CurMFstate);
}
}
else if(PrimaryCCA->CH_offset == 2){
CurMFstate = MF_LSC;
if(SecCHOffset == 2){
odm_Write_Dynamic_CCA_8814A(pDM_Odm, CurMFstate);
}
}
}
else if(PrimaryCCA->intf_type==2){
if(PrimaryCCA->CH_offset==1){
//ODM_SetBBReg(pDM_Odm, ODM_REG_L1SBD_PD_CH_11N, BIT8|BIT7, MF_USC);
pHalData->RTSEN = 1;
}
else if(PrimaryCCA->CH_offset==2){
//ODM_SetBBReg(pDM_Odm, ODM_REG_L1SBD_PD_CH_11N, BIT8|BIT7, MF_LSC);
pHalData->RTSEN = 1;
}
}
}
}
}
else{ // disconnected interference detection
odm_Intf_Detection(pDM_Odm);
}// end of disconnected
}
else{ // PrimaryCCA->PriCCA_flag == 1
if(STA_BW==0){
STA_BW_pre = STA_BW;
return;
}
Count_Down--;
if((Count_Down == 0) || ((STA_BW & STA_BW_pre) != 1)){
Count_Down = Monitor_TIME;
PrimaryCCA->PriCCA_flag = 0;
PrimaryCCA->intf_type = 0;
PrimaryCCA->intf_flag = 0;
CurMFstate = MF_USC_LSC;
odm_Write_Dynamic_CCA_8814A(pDM_Odm, CurMFstate); /* default*/
pHalData->RTSEN = 0;
}
}
STA_BW_pre = STA_BW;
}
else{
//2 Reset
odm_PrimaryCCA_Check_Init(pDM_Odm);
CurMFstate = MF_USC_LSC;
odm_Write_Dynamic_CCA_8814A(pDM_Odm, CurMFstate);
Count_Down = Monitor_TIME;
}
}
VOID
odm_Intf_Detection_8814A(
struct dm_struct *pDM_Odm
)
{
PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm, PHYDM_FALSEALMCNT);
struct phydm_pri_cca_struct* PrimaryCCA = &(pDM_Odm->dm_pri_cca);
if((FalseAlmCnt->Cnt_OFDM_CCA>OFDMCCA_TH)
&&(FalseAlmCnt->Cnt_BW_LSC>(FalseAlmCnt->Cnt_BW_USC+BW_Ind_Bias))){
PrimaryCCA->intf_flag = 1;
PrimaryCCA->CH_offset = 1; // 1:LSC, 2:USC
if(FalseAlmCnt->Cnt_Ofdm_fail>(FalseAlmCnt->Cnt_OFDM_CCA>>1)){
PrimaryCCA->intf_type = 1;
}
else{
PrimaryCCA->intf_type = 2;
}
}
else if((FalseAlmCnt->Cnt_OFDM_CCA>OFDMCCA_TH)
&&(FalseAlmCnt->Cnt_BW_USC>(FalseAlmCnt->Cnt_BW_LSC+BW_Ind_Bias))){
PrimaryCCA->intf_flag = 1;
PrimaryCCA->CH_offset = 2; // 1:LSC, 2:USC
if(FalseAlmCnt->Cnt_Ofdm_fail>(FalseAlmCnt->Cnt_OFDM_CCA>>1)){
PrimaryCCA->intf_type = 1;
}
else{
PrimaryCCA->intf_type = 2;
}
}
else{
PrimaryCCA->intf_flag = 0;
PrimaryCCA->intf_type = 0;
PrimaryCCA->CH_offset = 0;
}
}
#endif
#endif /* #ifdef PHYDM_PRIMARY_CCA */
u8
phydm_spur_nbi_setting_8814a(
struct dm_struct *pDM_Odm
)
{
u8 set_result = 0;
/*pDM_Odm->pChannel means central frequency, so we can use 20M as input*/
if (pDM_Odm->rfe_type == 0 || pDM_Odm->rfe_type == 1 || pDM_Odm->rfe_type == 6) {
/*channel asked by RF Jeff*/
if (*pDM_Odm->channel == 14)
set_result = phydm_nbi_setting(pDM_Odm, FUNC_ENABLE, *pDM_Odm->channel, 40, 2480, PHYDM_DONT_CARE);
else if (*pDM_Odm->channel >= 4 || *pDM_Odm->channel <= 8)
set_result = phydm_nbi_setting(pDM_Odm, FUNC_ENABLE, *pDM_Odm->channel, 40, 2440, PHYDM_DONT_CARE);
else
set_result = phydm_nbi_setting(pDM_Odm, FUNC_ENABLE, *pDM_Odm->channel, 40, 2440, PHYDM_DONT_CARE);
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("%s, set_result = 0x%d, pChannel = %d\n", __func__, set_result, *pDM_Odm->channel));
//printk("%s, set_result = 0x%d, pChannel = %d\n", __func__, set_result, *pDM_Odm->channel);
pDM_Odm->nbi_set_result = set_result;
return set_result;
}
void odm_hw_setting_8814a(
struct dm_struct *p_dm_odm
)
{
#ifdef PHYDM_PRIMARY_CCA
odm_PrimaryCCA_Check_Init_8814A(p_dm_odm);
odm_DynamicPrimaryCCA_Check_8814A(p_dm_odm);
odm_Intf_Detection_8814A(p_dm_odm);
#endif
}
#endif // RTL8814A_SUPPORT == 1

76
hal/phydm/rtl8814a/phydm_rtl8814a.h 100644
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@ -0,0 +1,76 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __ODM_RTL8814A_H__
#define __ODM_RTL8814A_H__
#define OFDMCCA_TH 500
#define BW_Ind_Bias 500
#define MF_USC 2
#define MF_LSC 1
#define MF_USC_LSC 0
#define Monitor_TIME 30
VOID
odm_Write_Dynamic_CCA_8814A(
struct dm_struct *pDM_Odm,
u8 CurrentMFstate
);
VOID
odm_PrimaryCCA_Check_Init_8814A(
struct dm_struct *pDM_Odm
);
VOID
odm_DynamicPrimaryCCA_Check_8814A(
struct dm_struct *pDM_Odm
);
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
VOID
odm_DynamicPrimaryCCAMP_8814A(
struct dm_struct *pDM_Odm
);
#elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
VOID
odm_DynamicPrimaryCCAAP_8814A(
struct dm_struct *pDM_Odm
);
VOID
odm_Intf_Detection_8814A(
struct dm_struct *pDM_Odm
);
#endif
u1Byte
phydm_spur_nbi_setting_8814a(
struct dm_struct *pDM_Odm
);
void odm_hw_setting_8814a(
struct dm_struct *p_dm_odm
);
#endif

10
hal/phydm/rtl8814a/version_rtl8814a.h 100644
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@ -0,0 +1,10 @@
/*RTL8814A PHY Parameters*/
/*
[Caution]
Since 01/Aug/2015, the commit rules will be simplified.
You do not need to fill up the version.h anymore,
only the maintenance supervisor fills it before formal release.
*/
#define RELEASE_DATE_8814A 20150908
#define COMMIT_BY_8814A "BB_LUKE"
#define RELEASE_VERSION_8814A 81

98
hal/rtl8814a/Hal8814PwrSeq.c 100644
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@ -0,0 +1,98 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include "Hal8814PwrSeq.h"
#include <rtl8814a_hal.h>
/*
drivers should parse below arrays and do the corresponding actions
*/
//3 Power on Array
WLAN_PWR_CFG rtl8814A_power_on_flow[RTL8814A_TRANS_CARDEMU_TO_ACT_STEPS+RTL8814A_TRANS_END_STEPS]=
{
RTL8814A_TRANS_CARDEMU_TO_ACT
RTL8814A_TRANS_END
};
//3Radio off GPIO Array
WLAN_PWR_CFG rtl8814A_radio_off_flow[RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8814A_TRANS_END_STEPS]=
{
RTL8814A_TRANS_ACT_TO_CARDEMU
RTL8814A_TRANS_END
};
//3Card Disable Array
WLAN_PWR_CFG rtl8814A_card_disable_flow[RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8814A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8814A_TRANS_END_STEPS]=
{
RTL8814A_TRANS_ACT_TO_CARDEMU
RTL8814A_TRANS_CARDEMU_TO_CARDDIS
RTL8814A_TRANS_END
};
//3 Card Enable Array
WLAN_PWR_CFG rtl8814A_card_enable_flow[RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8814A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8814A_TRANS_END_STEPS]=
{
RTL8814A_TRANS_CARDDIS_TO_CARDEMU
RTL8814A_TRANS_CARDEMU_TO_ACT
RTL8814A_TRANS_END
};
//3Suspend Array
WLAN_PWR_CFG rtl8814A_suspend_flow[RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8814A_TRANS_CARDEMU_TO_SUS_STEPS+RTL8814A_TRANS_END_STEPS]=
{
RTL8814A_TRANS_ACT_TO_CARDEMU
RTL8814A_TRANS_CARDEMU_TO_SUS
RTL8814A_TRANS_END
};
//3 Resume Array
WLAN_PWR_CFG rtl8814A_resume_flow[RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8814A_TRANS_CARDEMU_TO_SUS_STEPS+RTL8814A_TRANS_END_STEPS]=
{
RTL8814A_TRANS_SUS_TO_CARDEMU
RTL8814A_TRANS_CARDEMU_TO_ACT
RTL8814A_TRANS_END
};
//3HWPDN Array
WLAN_PWR_CFG rtl8814A_hwpdn_flow[RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8814A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8814A_TRANS_END_STEPS]=
{
RTL8814A_TRANS_ACT_TO_CARDEMU
RTL8814A_TRANS_CARDEMU_TO_PDN
RTL8814A_TRANS_END
};
//3 Enter LPS
WLAN_PWR_CFG rtl8814A_enter_lps_flow[RTL8814A_TRANS_ACT_TO_LPS_STEPS+RTL8814A_TRANS_END_STEPS]=
{
//FW behavior
RTL8814A_TRANS_ACT_TO_LPS
RTL8814A_TRANS_END
};
//3 Leave LPS
WLAN_PWR_CFG rtl8814A_leave_lps_flow[RTL8814A_TRANS_LPS_TO_ACT_STEPS+RTL8814A_TRANS_END_STEPS]=
{
//FW behavior
RTL8814A_TRANS_LPS_TO_ACT
RTL8814A_TRANS_END
};

7741
hal/rtl8814a/hal8814a_fw.c 100644
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File diff suppressed because it is too large Load Diff

1515
hal/rtl8814a/rtl8814a_cmd.c 100644
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File diff suppressed because it is too large Load Diff

415
hal/rtl8814a/rtl8814a_dm.c 100644
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@ -0,0 +1,415 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
//============================================================
// Description:
//
// This file is for 92CE/92CU dynamic mechanism only
//
//
//============================================================
#define _RTL8814A_DM_C_
//============================================================
// include files
//============================================================
//#include <drv_types.h>
#include <rtl8814a_hal.h>
//============================================================
// Global var
//============================================================
static VOID
dm_CheckProtection(
IN PADAPTER Adapter
)
{
#if 0
PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo);
u1Byte CurRate, RateThreshold;
if(pMgntInfo->pHTInfo->bCurBW40MHz)
RateThreshold = MGN_MCS1;
else
RateThreshold = MGN_MCS3;
if(Adapter->TxStats.CurrentInitTxRate <= RateThreshold)
{
pMgntInfo->bDmDisableProtect = TRUE;
DbgPrint("Forced disable protect: %x\n", Adapter->TxStats.CurrentInitTxRate);
}
else
{
pMgntInfo->bDmDisableProtect = FALSE;
DbgPrint("Enable protect: %x\n", Adapter->TxStats.CurrentInitTxRate);
}
#endif
}
#ifdef CONFIG_SUPPORT_HW_WPS_PBC
static void dm_CheckPbcGPIO(_adapter *padapter)
{
u8 tmp1byte;
u8 bPbcPressed = _FALSE;
if(!padapter->registrypriv.hw_wps_pbc)
return;
#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
tmp1byte = rtw_read8(padapter, REG_GPIO_EXT_CTRL_8814A);
//DBG_871X("CheckPbcGPIO - %x\n", tmp1byte);
if (tmp1byte == 0xff)
return ;
else if (tmp1byte & BIT3)
{
// Here we only set bPbcPressed to TRUE. After trigger PBC, the variable will be set to FALSE
DBG_871X("CheckPbcGPIO - PBC is pressed\n");
bPbcPressed = _TRUE;
}
#endif
if (_TRUE == bPbcPressed) {
/* Here we only set bPbcPressed to true */
/* After trigger PBC, the variable will be set to false */
RTW_INFO("CheckPbcGPIO - PBC is pressed\n");
rtw_request_wps_pbc_event(padapter);
}
}
#endif /* #ifdef CONFIG_SUPPORT_HW_WPS_PBC */
#ifdef CONFIG_PCI_HCI
/*
* Description:
* Perform interrupt migration dynamically to reduce CPU utilization.
*
* Assumption:
* 1. Do not enable migration under WIFI test.
*
* Created by Roger, 2010.03.05.
* */
VOID
dm_InterruptMigration(
IN PADAPTER Adapter
)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv);
BOOLEAN bCurrentIntMt, bCurrentACIntDisable;
BOOLEAN IntMtToSet = _FALSE;
BOOLEAN ACIntToSet = _FALSE;
/* Retrieve current interrupt migration and Tx four ACs IMR settings first. */
bCurrentIntMt = pHalData->bInterruptMigration;
bCurrentACIntDisable = pHalData->bDisableTxInt;
/* */
/* <Roger_Notes> Currently we use busy traffic for reference instead of RxIntOK counts to prevent non-linear Rx statistics */
/* when interrupt migration is set before. 2010.03.05. */
/* */
if (!Adapter->registrypriv.wifi_spec &&
(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) &&
pmlmepriv->LinkDetectInfo.bHigherBusyTraffic) {
IntMtToSet = _TRUE;
/* To check whether we should disable Tx interrupt or not. */
if (pmlmepriv->LinkDetectInfo.bHigherBusyRxTraffic)
ACIntToSet = _TRUE;
}
/* Update current settings. */
if (bCurrentIntMt != IntMtToSet) {
RTW_INFO("%s(): Update interrrupt migration(%d)\n", __FUNCTION__, IntMtToSet);
if (IntMtToSet) {
/* */
/* <Roger_Notes> Set interrrupt migration timer and corresponging Tx/Rx counter. */
/* timer 25ns*0xfa0=100us for 0xf packets. */
/* 2010.03.05. */
/* */
rtw_write32(Adapter, REG_INT_MIG, 0xff000fa0);/* 0x306:Rx, 0x307:Tx */
pHalData->bInterruptMigration = IntMtToSet;
} else {
/* Reset all interrupt migration settings. */
rtw_write32(Adapter, REG_INT_MIG, 0);
pHalData->bInterruptMigration = IntMtToSet;
}
}
#if 0
if (bCurrentACIntDisable != ACIntToSet) {
RTW_INFO("%s(): Update AC interrrupt(%d)\n", __FUNCTION__, ACIntToSet);
if (ACIntToSet) { /* Disable four ACs interrupts. */
/* */
/* <Roger_Notes> Disable VO, VI, BE and BK four AC interrupts to gain more efficient CPU utilization. */
/* When extremely highly Rx OK occurs, we will disable Tx interrupts. */
/* 2010.03.05. */
/* */
UpdateInterruptMask8192CE(Adapter, 0, RT_AC_INT_MASKS);
pHalData->bDisableTxInt = ACIntToSet;
} else { /* Enable four ACs interrupts. */
UpdateInterruptMask8192CE(Adapter, RT_AC_INT_MASKS, 0);
pHalData->bDisableTxInt = ACIntToSet;
}
}
#endif
}
#endif
/*
* Initialize GPIO setting registers
* */
static void
dm_InitGPIOSetting(
IN PADAPTER Adapter
)
{
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
u8 tmp1byte;
tmp1byte = rtw_read8(Adapter, REG_GPIO_MUXCFG);
tmp1byte &= (GPIOSEL_GPIO | ~GPIOSEL_ENBT);
rtw_write8(Adapter, REG_GPIO_MUXCFG, tmp1byte);
}
/* ************************************************************
* functions
* ************************************************************ */
static void Init_ODM_ComInfo_8814(PADAPTER Adapter)
{
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
struct dm_struct *pDM_Odm = &(pHalData->odmpriv);
u8 cut_ver, fab_ver;
Init_ODM_ComInfo(Adapter);
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_IC_TYPE, ODM_RTL8814A);
fab_ver = ODM_TSMC;
if(IS_A_CUT(pHalData->version_id))
cut_ver = ODM_CUT_A;
else if(IS_B_CUT(pHalData->version_id))
cut_ver = ODM_CUT_B;
else if(IS_C_CUT(pHalData->version_id))
cut_ver = ODM_CUT_C;
else if(IS_D_CUT(pHalData->version_id))
cut_ver = ODM_CUT_D;
else if(IS_E_CUT(pHalData->version_id))
cut_ver = ODM_CUT_E;
else
cut_ver = ODM_CUT_A;
odm_cmn_info_init(pDM_Odm,ODM_CMNINFO_FAB_VER,fab_ver);
odm_cmn_info_init(pDM_Odm,ODM_CMNINFO_CUT_VER,cut_ver);
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_RF_ANTENNA_TYPE, pHalData->TRxAntDivType);
//odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_IQKFWOFFLOAD, pHalData->RegIQKFWOffload);
}
void
rtl8814_InitHalDm(
IN PADAPTER Adapter
)
{
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
struct dm_struct * pDM_Odm = &(pHalData->odmpriv);
u8 i;
#ifdef CONFIG_USB_HCI
dm_InitGPIOSetting(Adapter);
#endif //CONFIG_USB_HCI
odm_dm_init(pDM_Odm);
//Adapter->fix_rate = 0xFF;
}
VOID
rtl8814_HalDmWatchDog(
IN PADAPTER Adapter
)
{
BOOLEAN bFwCurrentInPSMode = _FALSE;
BOOLEAN bFwPSAwake = _TRUE;
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
struct dm_struct *pDM_Odm = &(pHalData->odmpriv);
if (!rtw_is_hw_init_completed(Adapter))
goto skip_dm;
#ifdef CONFIG_LPS
bFwCurrentInPSMode = adapter_to_pwrctl(Adapter)->bFwCurrentInPSMode;
rtw_hal_get_hwreg(Adapter, HW_VAR_FWLPS_RF_ON, &bFwPSAwake);
#endif
#ifdef CONFIG_P2P_PS
/* Fw is under p2p powersaving mode, driver should stop dynamic mechanism. */
/* modifed by thomas. 2011.06.11. */
if (Adapter->wdinfo.p2p_ps_mode)
bFwPSAwake = _FALSE;
#endif /* CONFIG_P2P_PS */
if ((rtw_is_hw_init_completed(Adapter))
&& ((!bFwCurrentInPSMode) && bFwPSAwake)) {
rtw_hal_check_rxfifo_full(Adapter);
/* */
/* Dynamically switch RTS/CTS protection. */
/* */
/* dm_CheckProtection(Adapter); */
#ifdef CONFIG_PCI_HCI
/* 20100630 Joseph: Disable Interrupt Migration mechanism temporarily because it degrades Rx throughput. */
/* Tx Migration settings. */
/* dm_InterruptMigration(Adapter); */
/* if(Adapter->HalFunc.TxCheckStuckHandler(Adapter)) */
/* PlatformScheduleWorkItem(&(GET_HAL_DATA(Adapter)->HalResetWorkItem)); */
#endif
}
#ifdef CONFIG_DISABLE_ODM
goto skip_dm;
#endif
rtw_phydm_watchdog(Adapter);
skip_dm:
#ifdef CONFIG_SUPPORT_HW_WPS_PBC
/* Check GPIO to determine current Pbc status. */
dm_CheckPbcGPIO(Adapter);
#endif
return;
}
void rtl8814_init_dm_priv(IN PADAPTER Adapter)
{
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
struct dm_struct *podmpriv = &pHalData->odmpriv;
/* _rtw_spinlock_init(&(pHalData->odm_stainfo_lock)); */
#ifndef CONFIG_IQK_PA_OFF /* FW has no IQK PA OFF option yet, don't offload */
#ifdef CONFIG_BT_COEXIST
/* firmware size issue, btcoex fw doesn't support IQK offload */
if (pHalData->EEPROMBluetoothCoexist == _FALSE)
#endif
{
pHalData->RegIQKFWOffload = 1;
rtw_sctx_init(&pHalData->iqk_sctx, 0);
}
#endif
Init_ODM_ComInfo_8814(Adapter);
odm_init_all_timers(podmpriv );
//PHYDM_InitDebugSetting(podmpriv);
pHalData->CurrentTxPwrIdx = 18;
}
void rtl8814_deinit_dm_priv(IN PADAPTER Adapter)
{
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
struct dm_struct *podmpriv = &pHalData->odmpriv;
/* _rtw_spinlock_free(&pHalData->odm_stainfo_lock); */
odm_cancel_all_timers(podmpriv);
}
#ifdef CONFIG_ANTENNA_DIVERSITY
// Add new function to reset the state of antenna diversity before link.
//
// Compare RSSI for deciding antenna
void AntDivCompare8814(PADAPTER Adapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src)
{
//PADAPTER Adapter = pDM_Odm->Adapter ;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
if(0 != pHalData->AntDivCfg )
{
//DBG_8192C("update_network=> orgRSSI(%d)(%d),newRSSI(%d)(%d)\n",dst->Rssi,query_rx_pwr_percentage(dst->Rssi),
// src->Rssi,query_rx_pwr_percentage(src->Rssi));
//select optimum_antenna for before linked =>For antenna diversity
if(dst->Rssi >= src->Rssi )//keep org parameter
{
src->Rssi = dst->Rssi;
src->PhyInfo.Optimum_antenna = dst->PhyInfo.Optimum_antenna;
}
}
}
// Add new function to reset the state of antenna diversity before link.
u8 AntDivBeforeLink8814(PADAPTER Adapter )
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
struct dm_struct * pDM_Odm =&pHalData->odmpriv;
SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv);
// Condition that does not need to use antenna diversity.
if(pHalData->AntDivCfg==0)
{
//DBG_8192C("odm_AntDivBeforeLink8192C(): No AntDiv Mechanism.\n");
return _FALSE;
}
if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)
{
return _FALSE;
}
if(pDM_SWAT_Table->SWAS_NoLink_State == 0){
//switch channel
pDM_SWAT_Table->SWAS_NoLink_State = 1;
pDM_SWAT_Table->CurAntenna = (pDM_SWAT_Table->CurAntenna==MAIN_ANT)?AUX_ANT:MAIN_ANT;
//PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, pDM_SWAT_Table->CurAntenna);
rtw_antenna_select_cmd(Adapter, pDM_SWAT_Table->CurAntenna, _FALSE);
//DBG_8192C("%s change antenna to ANT_( %s ).....\n",__FUNCTION__, (pDM_SWAT_Table->CurAntenna==MAIN_ANT)?"MAIN":"AUX");
return _TRUE;
}
else
{
pDM_SWAT_Table->SWAS_NoLink_State = 0;
return _FALSE;
}
}
#endif //CONFIG_ANTENNA_DIVERSITY

6717
hal/rtl8814a/rtl8814a_hal_init.c 100644
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File diff suppressed because it is too large Load Diff

3014
hal/rtl8814a/rtl8814a_phycfg.c 100644
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File diff suppressed because it is too large Load Diff

210
hal/rtl8814a/rtl8814a_rf6052.c 100644
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@ -0,0 +1,210 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _RTL8814A_RF6052_C_
//#include <drv_types.h>
#include <rtl8814a_hal.h>
/*-----------------------------------------------------------------------------
* Function: PHY_RF6052SetBandwidth()
*
* Overview: This function is called by SetBWModeCallback8190Pci() only
*
* Input: PADAPTER Adapter
* WIRELESS_BANDWIDTH_E Bandwidth //20M or 40M
*
* Output: NONE
*
* Return: NONE
*
* Note: For RF type 0222D
*---------------------------------------------------------------------------*/
VOID
PHY_RF6052SetBandwidth8814A(
IN PADAPTER Adapter,
IN enum channel_width Bandwidth) //20M or 40M
{
switch(Bandwidth)
{
case CHANNEL_WIDTH_20:
/*RTW_INFO("PHY_RF6052SetBandwidth8814A(), set 20MHz\n");*/
phy_set_rf_reg(Adapter, RF_PATH_A, RF_CHNLBW_Jaguar, BIT11|BIT10, 3);
phy_set_rf_reg(Adapter, RF_PATH_B, RF_CHNLBW_Jaguar, BIT11|BIT10, 3);
phy_set_rf_reg(Adapter, RF_PATH_C, RF_CHNLBW_Jaguar, BIT11|BIT10, 3);
phy_set_rf_reg(Adapter, RF_PATH_D, RF_CHNLBW_Jaguar, BIT11|BIT10, 3);
break;
case CHANNEL_WIDTH_40:
/*RTW_INFO("PHY_RF6052SetBandwidth8814A(), set 40MHz\n");*/
phy_set_rf_reg(Adapter, RF_PATH_A, RF_CHNLBW_Jaguar, BIT11|BIT10, 1);
phy_set_rf_reg(Adapter, RF_PATH_B, RF_CHNLBW_Jaguar, BIT11|BIT10, 1);
phy_set_rf_reg(Adapter, RF_PATH_C, RF_CHNLBW_Jaguar, BIT11|BIT10, 1);
phy_set_rf_reg(Adapter, RF_PATH_D, RF_CHNLBW_Jaguar, BIT11|BIT10, 1);
break;
case CHANNEL_WIDTH_80:
/*RTW_INFO("PHY_RF6052SetBandwidth8814A(), set 80MHz\n");*/
phy_set_rf_reg(Adapter, RF_PATH_A, RF_CHNLBW_Jaguar, BIT11|BIT10, 0);
phy_set_rf_reg(Adapter, RF_PATH_B, RF_CHNLBW_Jaguar, BIT11|BIT10, 0);
phy_set_rf_reg(Adapter, RF_PATH_C, RF_CHNLBW_Jaguar, BIT11|BIT10, 0);
phy_set_rf_reg(Adapter, RF_PATH_D, RF_CHNLBW_Jaguar, BIT11|BIT10, 0);
break;
default:
RTW_INFO("PHY_RF6052SetBandwidth8814A(): unknown Bandwidth: %#X\n",Bandwidth );
break;
}
}
static int
phy_RF6052_Config_ParaFile_8814A(
IN PADAPTER Adapter
)
{
u32 u4RegValue=0;
u8 eRFPath;
int rtStatus = _SUCCESS;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
static char sz8814RadioAFile[] = PHY_FILE_RADIO_A;
static char sz8814RadioBFile[] = PHY_FILE_RADIO_B;
static char sz8814RadioCFile[] = PHY_FILE_RADIO_C;
static char sz8814RadioDFile[] = PHY_FILE_RADIO_D;
static char sz8814TxPwrTrack[] = PHY_FILE_TXPWR_TRACK;
char *pszRadioAFile = NULL, *pszRadioBFile = NULL, *pszRadioCFile = NULL, *pszRadioDFile = NULL, *pszTxPwrTrack = NULL;
pszRadioAFile = sz8814RadioAFile;
pszRadioBFile = sz8814RadioBFile;
pszRadioCFile = sz8814RadioCFile;
pszRadioDFile = sz8814RadioDFile;
pszTxPwrTrack = sz8814TxPwrTrack;
//3//-----------------------------------------------------------------
//3// <2> Initialize RF
//3//-----------------------------------------------------------------
//for(eRFPath = RF_PATH_A; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
{
/*----Initialize RF fom connfiguration file----*/
switch(eRFPath)
{
case RF_PATH_A:
#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
if (PHY_ConfigRFWithParaFile(Adapter, pszRadioAFile, eRFPath) == _FAIL)
#endif //CONFIG_LOAD_PHY_PARA_FROM_FILE
{
#ifdef CONFIG_EMBEDDED_FWIMG
if(HAL_STATUS_FAILURE ==odm_config_rf_with_header_file(&pHalData->odmpriv,CONFIG_RF_RADIO, (enum rf_path)eRFPath))
rtStatus = _FAIL;
#endif //CONFIG_EMBEDDED_FWIMG
}
break;
case RF_PATH_B:
#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
if (PHY_ConfigRFWithParaFile(Adapter, pszRadioBFile, eRFPath) == _FAIL)
#endif //CONFIG_LOAD_PHY_PARA_FROM_FILE
{
#ifdef CONFIG_EMBEDDED_FWIMG
if(HAL_STATUS_FAILURE ==odm_config_rf_with_header_file(&pHalData->odmpriv,CONFIG_RF_RADIO, (enum rf_path)eRFPath))
rtStatus = _FAIL;
#endif //CONFIG_EMBEDDED_FWIMG
}
break;
case RF_PATH_C:
#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
if (PHY_ConfigRFWithParaFile(Adapter, pszRadioCFile, eRFPath) == _FAIL)
#endif //CONFIG_LOAD_PHY_PARA_FROM_FILE
{
#ifdef CONFIG_EMBEDDED_FWIMG
if(HAL_STATUS_FAILURE ==odm_config_rf_with_header_file(&pHalData->odmpriv,CONFIG_RF_RADIO, (enum rf_path)eRFPath))
rtStatus = _FAIL;
#endif //CONFIG_EMBEDDED_FWIMG
}
break;
case RF_PATH_D:
#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
if (PHY_ConfigRFWithParaFile(Adapter, pszRadioDFile, eRFPath) == _FAIL)
#endif //CONFIG_LOAD_PHY_PARA_FROM_FILE
{
#ifdef CONFIG_EMBEDDED_FWIMG
if(HAL_STATUS_FAILURE ==odm_config_rf_with_header_file(&pHalData->odmpriv,CONFIG_RF_RADIO, (enum rf_path)eRFPath))
rtStatus = _FAIL;
#endif //CONFIG_EMBEDDED_FWIMG
}
break;
default:
break;
}
if(rtStatus != _SUCCESS){
RTW_INFO("%s():Radio[%d] Fail!!", __FUNCTION__, eRFPath);
goto phy_RF6052_Config_ParaFile_Fail;
}
}
u4RegValue = phy_query_rf_reg(Adapter, RF_PATH_A, RF_RCK1_Jaguar, bRFRegOffsetMask);
phy_set_rf_reg(Adapter, RF_PATH_B, RF_RCK1_Jaguar, bRFRegOffsetMask, u4RegValue);
phy_set_rf_reg(Adapter, RF_PATH_C, RF_RCK1_Jaguar, bRFRegOffsetMask, u4RegValue);
phy_set_rf_reg(Adapter, RF_PATH_D, RF_RCK1_Jaguar, bRFRegOffsetMask, u4RegValue);
//3 -----------------------------------------------------------------
//3 Configuration of Tx Power Tracking
//3 -----------------------------------------------------------------
#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
if (PHY_ConfigRFWithTxPwrTrackParaFile(Adapter, pszTxPwrTrack) == _FAIL)
#endif //CONFIG_LOAD_PHY_PARA_FROM_FILE
{
#ifdef CONFIG_EMBEDDED_FWIMG
odm_config_rf_with_tx_pwr_track_header_file(&pHalData->odmpriv);
#endif
}
//RT_TRACE(COMP_INIT, DBG_LOUD, ("<---phy_RF6052_Config_ParaFile_8812()\n"));
phy_RF6052_Config_ParaFile_Fail:
return rtStatus;
}
int
PHY_RF6052_Config_8814A(
IN PADAPTER Adapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
int rtStatus = _SUCCESS;
// Initialize general global value
pHalData->NumTotalRFPath = 4;
//
// Config BB and RF
//
rtStatus = phy_RF6052_Config_ParaFile_8814A(Adapter);
return rtStatus;
}
/* End of HalRf6052.c */

68
hal/rtl8814a/rtl8814a_rxdesc.c 100644
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@ -0,0 +1,68 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _RTL8814A_RXDESC_C_
//#include <drv_types.h>
#include <rtl8814a_hal.h>
void rtl8814_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc)
{
struct rx_pkt_attrib *pattrib = &precvframe->u.hdr.attrib;
_rtw_memset(pattrib, 0, sizeof(struct rx_pkt_attrib));
#ifdef CONFIG_RADIOTAP_WITH_RXDESC
_rtw_memcpy(pattrib->rxdesc, pdesc, RXDESC_SIZE);
#endif
//Offset 0
pattrib->pkt_len = (u16)GET_RX_STATUS_DESC_PKT_LEN_8814A(pdesc);//(le32_to_cpu(pdesc->rxdw0)&0x00003fff)
pattrib->crc_err = (u8)GET_RX_STATUS_DESC_CRC32_8814A(pdesc);//((le32_to_cpu(pdesc->rxdw0) >> 14) & 0x1);
pattrib->icv_err = (u8)GET_RX_STATUS_DESC_ICV_8814A(pdesc);//((le32_to_cpu(pdesc->rxdw0) >> 15) & 0x1);
pattrib->drvinfo_sz = (u8)GET_RX_STATUS_DESC_DRVINFO_SIZE_8814A(pdesc) * 8;//((le32_to_cpu(pdesc->rxdw0) >> 16) & 0xf) * 8;//uint 2^3 = 8 bytes
pattrib->encrypt = (u8)GET_RX_STATUS_DESC_SECURITY_8814A(pdesc);//((le32_to_cpu(pdesc->rxdw0) >> 20) & 0x7);
pattrib->qos = (u8)GET_RX_STATUS_DESC_QOS_8814A(pdesc);//(( le32_to_cpu( pdesc->rxdw0 ) >> 23) & 0x1);// Qos data, wireless lan header length is 26
pattrib->shift_sz = (u8)GET_RX_STATUS_DESC_SHIFT_8814A(pdesc);//((le32_to_cpu(pdesc->rxdw0) >> 24) & 0x3);
pattrib->physt = (u8)GET_RX_STATUS_DESC_PHY_STATUS_8814A(pdesc);//((le32_to_cpu(pdesc->rxdw0) >> 26) & 0x1);
pattrib->bdecrypted = !GET_RX_STATUS_DESC_SWDEC_8814A(pdesc);//(le32_to_cpu(pdesc->rxdw0) & BIT(27))? 0:1;
//Offset 4
pattrib->priority = (u8)GET_RX_STATUS_DESC_TID_8814A(pdesc);//((le32_to_cpu(pdesc->rxdw1) >> 8) & 0xf);
pattrib->mdata = (u8)GET_RX_STATUS_DESC_MORE_DATA_8814A(pdesc);//((le32_to_cpu(pdesc->rxdw1) >> 26) & 0x1);
pattrib->mfrag = (u8)GET_RX_STATUS_DESC_MORE_FRAG_8814A(pdesc);//((le32_to_cpu(pdesc->rxdw1) >> 27) & 0x1);//more fragment bit
//Offset 8
pattrib->seq_num = (u16)GET_RX_STATUS_DESC_SEQ_8814A(pdesc);//(le32_to_cpu(pdesc->rxdw2) & 0x00000fff);
pattrib->frag_num = (u8)GET_RX_STATUS_DESC_FRAG_8814A(pdesc);//((le32_to_cpu(pdesc->rxdw2) >> 12) & 0xf);//fragmentation number
if (GET_RX_STATUS_DESC_RPT_SEL_8814A(pdesc))
pattrib->pkt_rpt_type = C2H_PACKET;
else
pattrib->pkt_rpt_type = NORMAL_RX;
//Offset 12
pattrib->data_rate=(u8)GET_RX_STATUS_DESC_RX_RATE_8814A(pdesc);//((le32_to_cpu(pdesc->rxdw3))&0x7f);
//Offset 16
//Offset 20
}

114
hal/rtl8814a/rtl8814a_sreset.c 100644
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@ -0,0 +1,114 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _RTL8814A_SRESET_C_
//#include <drv_types.h>
#include <rtl8814a_hal.h>
#ifdef DBG_CONFIG_ERROR_DETECT
void rtl8814_sreset_xmit_status_check(_adapter *padapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct sreset_priv *psrtpriv = &pHalData->srestpriv;
unsigned long current_time;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
unsigned int diff_time;
u32 txdma_status;
if( (txdma_status=rtw_read32(padapter, REG_TXDMA_STATUS)) !=0x00){
RTW_INFO("%s REG_TXDMA_STATUS:0x%08x\n", __FUNCTION__, txdma_status);
rtw_hal_sreset_reset(padapter);
}
#ifdef CONFIG_USB_HCI
//total xmit irp = 4
//DBG_8192C("==>%s free_xmitbuf_cnt(%d),txirp_cnt(%d)\n",__FUNCTION__,pxmitpriv->free_xmitbuf_cnt,pxmitpriv->txirp_cnt);
//if(pxmitpriv->txirp_cnt == NR_XMITBUFF+1)
current_time = rtw_get_current_time();
if (0 == pxmitpriv->free_xmitbuf_cnt || 0 == pxmitpriv->free_xmit_extbuf_cnt) {
diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_time);
if (diff_time > 2000) {
if (psrtpriv->last_tx_complete_time == 0) {
psrtpriv->last_tx_complete_time = current_time;
}
else{
diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_complete_time);
if (diff_time > 4000) {
u32 ability = 0;
//padapter->Wifi_Error_Status = WIFI_TX_HANG;
ability = rtw_phydm_ability_get(padapter);
RTW_INFO("%s tx hang %s\n", __FUNCTION__,
(ability & ODM_BB_ADAPTIVITY)? "ODM_BB_ADAPTIVITY" : "");
if (!(ability & ODM_BB_ADAPTIVITY))
rtw_hal_sreset_reset(padapter);
}
}
}
}
#endif //CONFIG_USB_HCI
if (psrtpriv->dbg_trigger_point == SRESET_TGP_XMIT_STATUS) {
psrtpriv->dbg_trigger_point = SRESET_TGP_NULL;
rtw_hal_sreset_reset(padapter);
return;
}
}
void rtl8814_sreset_linked_status_check(_adapter *padapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct sreset_priv *psrtpriv = &pHalData->srestpriv;
u32 rx_dma_status = 0;
rx_dma_status = rtw_read32(padapter,REG_RXDMA_STATUS);
if(rx_dma_status!= 0x00){
RTW_INFO("%s REG_RXDMA_STATUS:0x%08x\n",__FUNCTION__,rx_dma_status);
}
#if 0
u32 regc50,regc58,reg824,reg800;
regc50 = rtw_read32(padapter,0xc50);
regc58 = rtw_read32(padapter,0xc58);
reg824 = rtw_read32(padapter,0x824);
reg800 = rtw_read32(padapter,0x800);
if( ((regc50&0xFFFFFF00)!= 0x69543400)||
((regc58&0xFFFFFF00)!= 0x69543400)||
(((reg824&0xFFFFFF00)!= 0x00390000)&&(((reg824&0xFFFFFF00)!= 0x80390000)))||
( ((reg800&0xFFFFFF00)!= 0x03040000)&&((reg800&0xFFFFFF00)!= 0x83040000)))
{
DBG_8192C("%s regc50:0x%08x, regc58:0x%08x, reg824:0x%08x, reg800:0x%08x,\n", __FUNCTION__,
regc50, regc58, reg824, reg800);
rtw_hal_sreset_reset(padapter);
}
#endif
if (psrtpriv->dbg_trigger_point == SRESET_TGP_LINK_STATUS) {
psrtpriv->dbg_trigger_point = SRESET_TGP_NULL;
rtw_hal_sreset_reset(padapter);
return;
}
}
#endif

515
hal/rtl8814a/rtl8814a_xmit.c 100644
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@ -0,0 +1,515 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _RTL8814A_XMIT_C_
//#include <drv_types.h>
#include <rtl8814a_hal.h>
/*
* Description:
* Aggregation packets and send to hardware
*
* Return:
* 0 Success
* -1 Hardware resource(TX FIFO) not ready
* -2 Software resource(xmitbuf) not ready
*/
#ifdef CONFIG_TX_EARLY_MODE
//#define DBG_EMINFO
#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1
#define EARLY_MODE_MAX_PKT_NUM 10
#else
#define EARLY_MODE_MAX_PKT_NUM 5
#endif
struct EMInfo{
u8 EMPktNum;
u16 EMPktLen[EARLY_MODE_MAX_PKT_NUM];
};
void
InsertEMContent_8814(
struct EMInfo *pEMInfo,
IN pu1Byte VirtualAddress)
{
#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1
u1Byte index=0;
u4Byte dwtmp=0;
#endif
_rtw_memset(VirtualAddress, 0, EARLY_MODE_INFO_SIZE);
if(pEMInfo->EMPktNum==0)
return;
#ifdef DBG_EMINFO
{
int i;
RTW_INFO("\n%s ==> pEMInfo->EMPktNum =%d\n",__FUNCTION__,pEMInfo->EMPktNum);
for(i=0;i< EARLY_MODE_MAX_PKT_NUM;i++){
RTW_INFO("%s ==> pEMInfo->EMPktLen[%d] =%d\n",__FUNCTION__,i,pEMInfo->EMPktLen[i]);
}
}
#endif
#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1
SET_EARLYMODE_PKTNUM(VirtualAddress, pEMInfo->EMPktNum);
if(pEMInfo->EMPktNum == 1){
dwtmp = pEMInfo->EMPktLen[0];
}else{
dwtmp = pEMInfo->EMPktLen[0];
dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4;
dwtmp += pEMInfo->EMPktLen[1];
}
SET_EARLYMODE_LEN0(VirtualAddress, dwtmp);
if(pEMInfo->EMPktNum <= 3){
dwtmp = pEMInfo->EMPktLen[2];
}else{
dwtmp = pEMInfo->EMPktLen[2];
dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4;
dwtmp += pEMInfo->EMPktLen[3];
}
SET_EARLYMODE_LEN1(VirtualAddress, dwtmp);
if(pEMInfo->EMPktNum <= 5){
dwtmp = pEMInfo->EMPktLen[4];
}else{
dwtmp = pEMInfo->EMPktLen[4];
dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4;
dwtmp += pEMInfo->EMPktLen[5];
}
SET_EARLYMODE_LEN2_1(VirtualAddress, dwtmp&0xF);
SET_EARLYMODE_LEN2_2(VirtualAddress, dwtmp>>4);
if(pEMInfo->EMPktNum <= 7){
dwtmp = pEMInfo->EMPktLen[6];
}else{
dwtmp = pEMInfo->EMPktLen[6];
dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4;
dwtmp += pEMInfo->EMPktLen[7];
}
SET_EARLYMODE_LEN3(VirtualAddress, dwtmp);
if(pEMInfo->EMPktNum <= 9){
dwtmp = pEMInfo->EMPktLen[8];
}else{
dwtmp = pEMInfo->EMPktLen[8];
dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4;
dwtmp += pEMInfo->EMPktLen[9];
}
SET_EARLYMODE_LEN4(VirtualAddress, dwtmp);
#else
SET_EARLYMODE_PKTNUM(VirtualAddress, pEMInfo->EMPktNum);
SET_EARLYMODE_LEN0(VirtualAddress, pEMInfo->EMPktLen[0]);
SET_EARLYMODE_LEN1(VirtualAddress, pEMInfo->EMPktLen[1]);
SET_EARLYMODE_LEN2_1(VirtualAddress, pEMInfo->EMPktLen[2]&0xF);
SET_EARLYMODE_LEN2_2(VirtualAddress, pEMInfo->EMPktLen[2]>>4);
SET_EARLYMODE_LEN3(VirtualAddress, pEMInfo->EMPktLen[3]);
SET_EARLYMODE_LEN4(VirtualAddress, pEMInfo->EMPktLen[4]);
#endif
//RT_PRINT_DATA(COMP_SEND, DBG_LOUD, "EMHdr:", VirtualAddress, 8);
}
void UpdateEarlyModeInfo8814(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmitbuf )
{
//_adapter *padapter, struct xmit_frame *pxmitframe,struct tx_servq *ptxservq
int index,j;
u16 offset,pktlen;
PTXDESC_8814 ptxdesc;
u8 *pmem,*pEMInfo_mem;
s8 node_num_0=0,node_num_1=0;
struct EMInfo eminfo;
struct agg_pkt_info *paggpkt;
struct xmit_frame *pframe = (struct xmit_frame*)pxmitbuf->priv_data;
pmem= pframe->buf_addr;
#ifdef DBG_EMINFO
RTW_INFO("\n%s ==> agg_num:%d\n",__FUNCTION__, pframe->agg_num);
for(index=0;index<pframe->agg_num;index++){
offset = pxmitpriv->agg_pkt[index].offset;
pktlen = pxmitpriv->agg_pkt[index].pkt_len;
RTW_INFO("%s ==> agg_pkt[%d].offset=%d\n",__FUNCTION__,index,offset);
RTW_INFO("%s ==> agg_pkt[%d].pkt_len=%d\n",__FUNCTION__,index,pktlen);
}
#endif
if( pframe->agg_num > EARLY_MODE_MAX_PKT_NUM)
{
node_num_0 = pframe->agg_num;
node_num_1= EARLY_MODE_MAX_PKT_NUM-1;
}
for(index=0;index<pframe->agg_num;index++){
offset = pxmitpriv->agg_pkt[index].offset;
pktlen = pxmitpriv->agg_pkt[index].pkt_len;
_rtw_memset(&eminfo,0,sizeof(struct EMInfo));
if( pframe->agg_num > EARLY_MODE_MAX_PKT_NUM){
if(node_num_0 > EARLY_MODE_MAX_PKT_NUM){
eminfo.EMPktNum = EARLY_MODE_MAX_PKT_NUM;
node_num_0--;
}
else{
eminfo.EMPktNum = node_num_1;
node_num_1--;
}
}
else{
eminfo.EMPktNum = pframe->agg_num-(index+1);
}
for(j=0;j< eminfo.EMPktNum ;j++){
eminfo.EMPktLen[j] = pxmitpriv->agg_pkt[index+1+j].pkt_len+4;// 4 bytes CRC
}
if(pmem){
if(index==0){
ptxdesc = (PTXDESC_8814)(pmem);
pEMInfo_mem = ((u8 *)ptxdesc)+TXDESC_SIZE;
}
else{
pmem = pmem + pxmitpriv->agg_pkt[index-1].offset;
ptxdesc = (PTXDESC_8814)(pmem);
pEMInfo_mem = ((u8 *)ptxdesc)+TXDESC_SIZE;
}
#ifdef DBG_EMINFO
RTW_INFO("%s ==> desc.pkt_len=%d\n",__FUNCTION__,ptxdesc->pktlen);
#endif
InsertEMContent_8814(&eminfo,pEMInfo_mem);
}
}
_rtw_memset(pxmitpriv->agg_pkt,0,sizeof(struct agg_pkt_info)*MAX_AGG_PKT_NUM);
}
#endif
#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))
void rtl8814a_cal_txdesc_chksum(u8 *ptxdesc)
{
u16 *usPtr;
u32 count;
u32 index;
u16 checksum = 0;
usPtr = (u16*)ptxdesc;
// checksume is always calculated by first 32 bytes,
// and it doesn't depend on TX DESC length.
// Thomas,Lucas@SD4,20130515
count = 16;
// Clear first
SET_TX_DESC_TX_DESC_CHECKSUM_8814A(ptxdesc, 0);
for(index = 0 ; index < count ; index++){
checksum = checksum ^ le16_to_cpu(*(usPtr + index));
}
SET_TX_DESC_TX_DESC_CHECKSUM_8814A(ptxdesc, checksum);
}
#endif
//
// Description: In normal chip, we should send some packet to Hw which will be used by Fw
// in FW LPS mode. The function is to fill the Tx descriptor of this packets, then
// Fw can tell Hw to send these packet derectly.
//
void rtl8814a_fill_fake_txdesc(
PADAPTER padapter,
u8* pDesc,
u32 BufferLen,
u8 IsPsPoll,
u8 IsBTQosNull,
u8 bDataFrame)
{
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
// Clear all status
_rtw_memset(pDesc, 0, TXDESC_SIZE);
SET_TX_DESC_LAST_SEG_8814A(pDesc, 1);
SET_TX_DESC_OFFSET_8814A(pDesc, TXDESC_SIZE);
SET_TX_DESC_PKT_SIZE_8814A(pDesc, BufferLen);
SET_TX_DESC_QUEUE_SEL_8814A(pDesc, QSLT_MGNT);
if (pmlmeext->cur_wireless_mode & WIRELESS_11B) {
SET_TX_DESC_RATE_ID_8814A(pDesc, RATEID_IDX_B);
} else {
SET_TX_DESC_RATE_ID_8814A(pDesc, RATEID_IDX_G);
}
//Set NAVUSEHDR to prevent Ps-poll AId filed to be changed to error vlaue by Hw.
if (IsPsPoll)
{
SET_TX_DESC_NAV_USE_HDR_8814A(pDesc, 1);
}
else
{
SET_TX_DESC_HWSEQ_EN_8814A(pDesc, 1); // Hw set sequence number
}
#if 0 //todo
if(IsBTQosNull)
{
SET_TX_DESC_BT_INT_8812(pDesc, 1);
}
#endif //0
SET_TX_DESC_USE_RATE_8814A(pDesc, 1);
//8814 no OWN bit?
//SET_TX_DESC_OWN_8812(pDesc, 1);
//
// Encrypt the data frame if under security mode excepct null data. Suggested by CCW.
//
if (_TRUE ==bDataFrame)
{
u32 EncAlg;
EncAlg = padapter->securitypriv.dot11PrivacyAlgrthm;
switch (EncAlg)
{
case _NO_PRIVACY_:
SET_TX_DESC_SEC_TYPE_8814A(pDesc, 0x0);
break;
case _WEP40_:
case _WEP104_:
case _TKIP_:
SET_TX_DESC_SEC_TYPE_8814A(pDesc, 0x1);
break;
case _SMS4_:
SET_TX_DESC_SEC_TYPE_8814A(pDesc, 0x2);
break;
case _AES_:
SET_TX_DESC_SEC_TYPE_8814A(pDesc, 0x3);
break;
default:
SET_TX_DESC_SEC_TYPE_8814A(pDesc, 0x0);
break;
}
}
SET_TX_DESC_TX_RATE_8814A(pDesc, MRateToHwRate(pmlmeext->tx_rate));
#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
// USB interface drop packet if the checksum of descriptor isn't correct.
// Using this checksum can let hardware recovery from packet bulk out error (e.g. Cancel URC, Bulk out error.).
rtl8814a_cal_txdesc_chksum(pDesc);
#endif
}
void rtl8814a_fill_txdesc_sectype(struct pkt_attrib *pattrib, u8 *ptxdesc)
{
if ((pattrib->encrypt > 0) && !pattrib->bswenc)
{
switch (pattrib->encrypt)
{
//SEC_TYPE : 0:NO_ENC,1:WEP40/TKIP,2:WAPI,3:AES
case _WEP40_:
case _WEP104_:
case _TKIP_:
case _TKIP_WTMIC_:
SET_TX_DESC_SEC_TYPE_8814A(ptxdesc, 0x1);
break;
#ifdef CONFIG_WAPI_SUPPORT
case _SMS4_:
SET_TX_DESC_SEC_TYPE_8814A(ptxdesc, 0x2);
break;
#endif
case _AES_:
SET_TX_DESC_SEC_TYPE_8814A(ptxdesc, 0x3);
break;
case _NO_PRIVACY_:
default:
SET_TX_DESC_SEC_TYPE_8814A(ptxdesc, 0x0);
break;
}
}
}
void rtl8814a_fill_txdesc_vcs(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc)
{
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
//RTW_INFO("vcs_mode=%d\n", pattrib->vcs_mode);
if (pattrib->vcs_mode) {
switch(pattrib->vcs_mode)
{
case RTS_CTS:
SET_TX_DESC_RTS_ENABLE_8814A(ptxdesc, 1);
break;
case CTS_TO_SELF:
SET_TX_DESC_CTS2SELF_8814A(ptxdesc, 1);
break;
case NONE_VCS:
default:
break;
}
if (pmlmeinfo->preamble_mode == PREAMBLE_SHORT)
SET_TX_DESC_RTS_SHORT_8814A(ptxdesc, 1);
SET_TX_DESC_RTS_RATE_8814A(ptxdesc, 0x8);//RTS Rate=24M
SET_TX_DESC_RTS_RATE_FB_LIMIT_8814A(ptxdesc, 0xf);
}
}
u8
BWMapping_8814(
IN PADAPTER Adapter,
IN struct pkt_attrib *pattrib
)
{
u8 BWSettingOfDesc = 0;
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
//RTW_INFO("BWMapping pHalData->current_channel_bw %d, pattrib->bwmode %d \n",pHalData->current_channel_bw,pattrib->bwmode);
if(pHalData->current_channel_bw== CHANNEL_WIDTH_80)
{
if(pattrib->bwmode == CHANNEL_WIDTH_80)
BWSettingOfDesc= 2;
else if(pattrib->bwmode == CHANNEL_WIDTH_40)
BWSettingOfDesc = 1;
else
BWSettingOfDesc = 0;
}
else if(pHalData->current_channel_bw== CHANNEL_WIDTH_40)
{
if((pattrib->bwmode == CHANNEL_WIDTH_40) || (pattrib->bwmode == CHANNEL_WIDTH_80))
BWSettingOfDesc = 1;
else
BWSettingOfDesc = 0;
}
else
BWSettingOfDesc = 0;
return BWSettingOfDesc;
}
u8
SCMapping_8814(
IN PADAPTER Adapter,
IN struct pkt_attrib *pattrib
)
{
u8 SCSettingOfDesc = 0;
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
//RTW_INFO("SCMapping: pHalData->current_channel_bw %d, pHalData->nCur80MhzPrimeSC %d, pHalData->nCur40MhzPrimeSC %d \n",pHalData->current_channel_bw,pHalData->nCur80MhzPrimeSC,pHalData->nCur40MhzPrimeSC);
if(pHalData->current_channel_bw == CHANNEL_WIDTH_80)
{
if(pattrib->bwmode == CHANNEL_WIDTH_80)
{
SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE;
}
else if(pattrib->bwmode == CHANNEL_WIDTH_40)
{
if(pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)
SCSettingOfDesc = VHT_DATA_SC_40_LOWER_OF_80MHZ;
else if(pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)
SCSettingOfDesc = VHT_DATA_SC_40_UPPER_OF_80MHZ;
else
RTW_INFO("SCMapping: DONOT CARE Mode Setting\n");
}
else
{
if((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER))
SCSettingOfDesc = VHT_DATA_SC_20_LOWEST_OF_80MHZ;
else if((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER))
SCSettingOfDesc = VHT_DATA_SC_20_LOWER_OF_80MHZ;
else if((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER))
SCSettingOfDesc = VHT_DATA_SC_20_UPPER_OF_80MHZ;
else if((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER))
SCSettingOfDesc = VHT_DATA_SC_20_UPPERST_OF_80MHZ;
else
RTW_INFO("SCMapping: DONOT CARE Mode Setting\n");
}
}
else if(pHalData->current_channel_bw== CHANNEL_WIDTH_40)
{
//RTW_INFO("SCMapping: HT Case: pHalData->current_channel_bw %d, pHalData->nCur40MhzPrimeSC %d \n",pHalData->current_channel_bw,pHalData->nCur40MhzPrimeSC);
if(pattrib->bwmode == CHANNEL_WIDTH_40)
{
SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE;
}
else if(pattrib->bwmode == CHANNEL_WIDTH_20)
{
if(pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)
{
SCSettingOfDesc = VHT_DATA_SC_20_UPPER_OF_80MHZ;
}
else if(pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)
{
SCSettingOfDesc = VHT_DATA_SC_20_LOWER_OF_80MHZ;
}
else
{
SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE;
}
}
}
else
{
SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE;
}
return SCSettingOfDesc;
}
void rtl8814a_fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc)
{
//RTW_INFO("bwmode=%d, ch_off=%d\n", pattrib->bwmode, pattrib->ch_offset);
if(pattrib->ht_en)
{
// Set Bandwidth and sub-channel settings.
SET_TX_DESC_DATA_BW_8814A(ptxdesc, BWMapping_8814(padapter,pattrib));
SET_TX_DESC_DATA_SC_8814A(ptxdesc, SCMapping_8814(padapter,pattrib));
}
}

147
hal/rtl8814a/usb/rtl8814au_led.c 100644
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@ -0,0 +1,147 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _RTL8814AU_LED_C_
//#include <drv_types.h>
#include <rtl8814a_hal.h>
//================================================================================
// LED object.
//================================================================================
//================================================================================
// Prototype of protected function.
//================================================================================
//================================================================================
// LED_819xUsb routines.
//================================================================================
//
// Description:
// Turn on LED according to LedPin specified.
//
static void
SwLedOn_8814AU(
PADAPTER padapter,
PLED_USB pLed
)
{
u32 LedGpioCfg;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
if (RTW_CANNOT_RUN(padapter))
return;
LedGpioCfg = rtw_read32(padapter , REG_GPIO_PIN_CTRL_2); /* 0x60. In 8814AU, the name should be REG_GPIO_EXT_CTRL */
switch (pLed->LedPin) {
case LED_PIN_LED0:
LedGpioCfg |= (BIT16 | BIT17 | BIT21 | BIT22); /* config as gpo */
LedGpioCfg &= ~(BIT8 | BIT9 | BIT13 | BIT14); /* set gpo value */
LedGpioCfg &= ~(BIT0 | BIT1 | BIT5 | BIT6); /* set gpi value. TBD: may not need this */
rtw_write32(padapter , REG_GPIO_PIN_CTRL_2 , LedGpioCfg);
break;
default:
break;
}
pLed->bLedOn = _TRUE;
}
//
// Description:
// Turn off LED according to LedPin specified.
//
static void
SwLedOff_8814AU(
PADAPTER padapter,
PLED_USB pLed
)
{
u32 LedGpioCfg;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
if (RTW_CANNOT_RUN(padapter))
return;
LedGpioCfg = rtw_read32(padapter , REG_GPIO_PIN_CTRL_2); /* 0x60. In 8814AU, the name should be REG_GPIO_EXT_CTRL */
switch (pLed->LedPin) {
case LED_PIN_LED0:
LedGpioCfg |= (BIT16 | BIT17 | BIT21 | BIT22); /* config as gpo */
LedGpioCfg |= (BIT8 | BIT9 | BIT13 | BIT14); /* set gpo output value */
rtw_write32(padapter , REG_GPIO_PIN_CTRL_2 , LedGpioCfg);
break;
default:
break;
}
pLed->bLedOn = _FALSE;
}
//================================================================================
// Interface to manipulate LED objects.
//================================================================================
//================================================================================
// Default LED behavior.
//================================================================================
//
// Description:
// Initialize all LED_871x objects.
//
void
rtl8814au_InitSwLeds(
_adapter *padapter
)
{
struct led_priv *pledpriv = adapter_to_led(padapter);
pledpriv->LedControlHandler = LedControlUSB;
pledpriv->SwLedOn = SwLedOn_8814AU;
pledpriv->SwLedOff = SwLedOff_8814AU;
InitLed(padapter, &(pledpriv->SwLed0), LED_PIN_LED0);
InitLed(padapter, &(pledpriv->SwLed1), LED_PIN_LED1);
InitLed(padapter, &(pledpriv->SwLed2), LED_PIN_LED2);
}
//
// Description:
// DeInitialize all LED_819xUsb objects.
//
void
rtl8814au_DeInitSwLeds(
_adapter *padapter
)
{
struct led_priv *ledpriv = adapter_to_led(padapter);
DeInitLed( &(ledpriv->SwLed0) );
DeInitLed( &(ledpriv->SwLed1) );
DeInitLed( &(ledpriv->SwLed2) );
}

34
hal/rtl8814a/usb/rtl8814au_recv.c 100644
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@ -0,0 +1,34 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _RTL8814AU_RECV_C_
//#include <drv_types.h>
#include <rtl8814a_hal.h>
int rtl8814au_init_recv_priv(_adapter *padapter)
{
return usb_init_recv_priv(padapter, INTERRUPT_MSG_FORMAT_LEN);
}
void rtl8814au_free_recv_priv(_adapter *padapter)
{
usb_free_recv_priv(padapter, INTERRUPT_MSG_FORMAT_LEN);
}

1147
hal/rtl8814a/usb/rtl8814au_xmit.c 100644
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File diff suppressed because it is too large Load Diff

2414
hal/rtl8814a/usb/usb_halinit.c 100644
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File diff suppressed because it is too large Load Diff

314
hal/rtl8814a/usb/usb_ops_linux.c 100644
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@ -0,0 +1,314 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#define _HCI_OPS_OS_C_
/* #include <drv_types.h> */
#include <rtl8814a_hal.h>
#ifdef CONFIG_SUPPORT_USB_INT
void interrupt_handler_8814au(_adapter *padapter, u16 pkt_len, u8 *pbuf)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct reportpwrstate_parm pwr_rpt;
if (pkt_len != INTERRUPT_MSG_FORMAT_LEN) {
RTW_INFO("%s Invalid interrupt content length (%d)!\n", __FUNCTION__, pkt_len);
return ;
}
/* HISR */
_rtw_memcpy(&(pHalData->IntArray[0]), &(pbuf[USB_INTR_CONTENT_HISR_OFFSET]), 4);
_rtw_memcpy(&(pHalData->IntArray[1]), &(pbuf[USB_INTR_CONTENT_HISRE_OFFSET]), 4);
#if 0 /*DBG*/
{
u32 hisr = 0 , hisr_ex = 0;
_rtw_memcpy(&hisr, &(pHalData->IntArray[0]), 4);
hisr = le32_to_cpu(hisr);
_rtw_memcpy(&hisr_ex, &(pHalData->IntArray[1]), 4);
hisr_ex = le32_to_cpu(hisr_ex);
if ((hisr != 0) || (hisr_ex != 0))
RTW_INFO("===> %s hisr:0x%08x ,hisr_ex:0x%08x\n", __FUNCTION__, hisr, hisr_ex);
}
#endif
#ifdef CONFIG_LPS_LCLK
if (pHalData->IntArray[0] & IMR_CPWM_88E) {
_rtw_memcpy(&pwr_rpt.state, &(pbuf[USB_INTR_CONTENT_CPWM1_OFFSET]), 1);
/* _rtw_memcpy(&pwr_rpt.state2, &(pbuf[USB_INTR_CONTENT_CPWM2_OFFSET]), 1); */
/* 88e's cpwm value only change BIT0, so driver need to add PS_STATE_S2 for LPS flow. */
pwr_rpt.state |= PS_STATE_S2;
_set_workitem(&(adapter_to_pwrctl(padapter)->cpwm_event));
}
#endif/* CONFIG_LPS_LCLK */
#ifdef CONFIG_INTERRUPT_BASED_TXBCN
#ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT
if (pHalData->IntArray[0] & IMR_BCNDMAINT0_88E)
#endif
#ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR
if (pHalData->IntArray[0] & (IMR_TBDER_88E | IMR_TBDOK_88E))
#endif
{
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
#if 0
if (pHalData->IntArray[0] & IMR_BCNDMAINT0_88E)
RTW_INFO("%s: HISR_BCNERLY_INT\n", __func__);
if (pHalData->IntArray[0] & IMR_TBDOK_88E)
RTW_INFO("%s: HISR_TXBCNOK\n", __func__);
if (pHalData->IntArray[0] & IMR_TBDER_88E)
RTW_INFO("%s: HISR_TXBCNERR\n", __func__);
#endif /* 0 */
if(check_fwstate(pmlmepriv, WIFI_AP_STATE))
{
//send_beacon(padapter);
if(pmlmepriv->update_bcn == _TRUE)
{
//tx_beacon_hdl(padapter, NULL);
set_tx_beacon_cmd(padapter);
}
}
#ifdef CONFIG_CONCURRENT_MODE
if(check_buddy_fwstate(padapter, WIFI_AP_STATE))
{
//send_beacon(padapter);
if(padapter->pbuddy_adapter->mlmepriv.update_bcn == _TRUE)
{
//tx_beacon_hdl(padapter, NULL);
set_tx_beacon_cmd(padapter->pbuddy_adapter);
}
}
#endif
}
#endif /* CONFIG_INTERRUPT_BASED_TXBCN */
#ifdef DBG_CONFIG_ERROR_DETECT_INT
if (pHalData->IntArray[1] & IMR_TXERR_88E)
RTW_INFO("===> %s Tx Error Flag Interrupt Status\n", __FUNCTION__);
if (pHalData->IntArray[1] & IMR_RXERR_88E)
RTW_INFO("===> %s Rx Error Flag INT Status\n", __FUNCTION__);
if (pHalData->IntArray[1] & IMR_TXFOVW_88E)
RTW_INFO("===> %s Transmit FIFO Overflow\n", __FUNCTION__);
if (pHalData->IntArray[1] & IMR_RXFOVW_88E)
RTW_INFO("===> %s Receive FIFO Overflow\n", __FUNCTION__);
#endif/* DBG_CONFIG_ERROR_DETECT_INT */
#ifdef CONFIG_FW_C2H_REG
/* C2H Event */
if (pbuf[0] != 0)
usb_c2h_hisr_hdl(padapter, pbuf);
#endif
}
#endif /* CONFIG_SUPPORT_USB_INT */
#if 0
int recvbuf2recvframe(PADAPTER padapter, void *ptr)
{
u8 *pbuf;
u8 pkt_cnt = 0;
u32 pkt_offset;
s32 transfer_len;
u8 *pphy_status = NULL;
union recv_frame *precvframe = NULL;
struct rx_pkt_attrib *pattrib = NULL;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct recv_priv *precvpriv = &padapter->recvpriv;
_queue *pfree_recv_queue = &precvpriv->free_recv_queue;
_pkt *pskb;
#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX
pskb = NULL;
transfer_len = (s32)((struct recv_buf *)ptr)->transfer_len;
pbuf = ((struct recv_buf *)ptr)->pbuf;
#else
pskb = (_pkt *)ptr;
transfer_len = (s32)pskb->len;
pbuf = pskb->data;
#endif/* CONFIG_USE_USB_BUFFER_ALLOC_RX */
#ifdef CONFIG_USB_RX_AGGREGATION
pkt_cnt = GET_RX_STATUS_DESC_DMA_AGG_NUM_8814A(pbuf);
#endif
do {
precvframe = rtw_alloc_recvframe(pfree_recv_queue);
if (precvframe == NULL) {
RTW_INFO("%s()-%d: rtw_alloc_recvframe() failed! RX Drop!\n", __FUNCTION__, __LINE__);
goto _exit_recvbuf2recvframe;
}
_rtw_init_listhead(&precvframe->u.hdr.list);
precvframe->u.hdr.precvbuf = NULL; /* can't access the precvbuf for new arch. */
precvframe->u.hdr.len = 0;
rtl8814_query_rx_desc_status(precvframe, pbuf);
pattrib = &precvframe->u.hdr.attrib;
if ((padapter->registrypriv.mp_mode == 0) && ((pattrib->crc_err) || (pattrib->icv_err))) {
RTW_INFO("%s: RX Warning! crc_err=%d icv_err=%d, skip!\n", __FUNCTION__, pattrib->crc_err, pattrib->icv_err);
rtw_free_recvframe(precvframe, pfree_recv_queue);
goto _exit_recvbuf2recvframe;
}
pkt_offset = RXDESC_SIZE + pattrib->drvinfo_sz + pattrib->shift_sz + pattrib->pkt_len;
if ((pattrib->pkt_len <= 0) || (pkt_offset > transfer_len)) {
RTW_INFO("%s()-%d: RX Warning!,pkt_len<=0 or pkt_offset> transfer_len\n", __FUNCTION__, __LINE__);
rtw_free_recvframe(precvframe, pfree_recv_queue);
goto _exit_recvbuf2recvframe;
}
#ifdef CONFIG_RX_PACKET_APPEND_FCS
if(pattrib->pkt_rpt_type == NORMAL_RX)
pattrib->pkt_len -= IEEE80211_FCS_LEN;
#endif
if (rtw_os_alloc_recvframe(padapter, precvframe,
(pbuf + pattrib->shift_sz + pattrib->drvinfo_sz + RXDESC_SIZE), pskb) == _FAIL) {
rtw_free_recvframe(precvframe, pfree_recv_queue);
goto _exit_recvbuf2recvframe;
}
recvframe_put(precvframe, pattrib->pkt_len);
/* recvframe_pull(precvframe, drvinfo_sz + RXDESC_SIZE); */
if(pattrib->pkt_rpt_type == NORMAL_RX)//Normal rx packet
{
if(pattrib->physt)
pphy_status = (pbuf + RXDESC_OFFSET);
#ifdef CONFIG_CONCURRENT_MODE
if(rtw_buddy_adapter_up(padapter))
{
if(pre_recv_entry(precvframe, pphy_status) != _SUCCESS)
{
RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,
("recvbuf2recvframe: recv_entry(precvframe) != _SUCCESS\n"));
}
}
#endif //CONFIG_CONCURRENT_MODE
if(pattrib->physt && pphy_status)
rx_query_phy_status(precvframe, pphy_status);
if(rtw_recv_entry(precvframe) != _SUCCESS)
{
RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,
("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n"));
}
}
else{ // pkt_rpt_type == TX_REPORT1-CCX, TX_REPORT2-TX RTP,HIS_REPORT-USB HISR RTP
if (pattrib->pkt_rpt_type == C2H_PACKET) {
//RTW_INFO("rx C2H_PACKET \n");
rtw_hal_c2h_pkt_pre_hdl(padapter,precvframe->u.hdr.rx_data,pattrib->pkt_len);
}
rtw_free_recvframe(precvframe, pfree_recv_queue);
}
#ifdef CONFIG_USB_RX_AGGREGATION
/* jaguar 8-byte alignment */
pkt_offset = (u16)_RND8(pkt_offset);
pkt_cnt--;
pbuf += pkt_offset;
#endif
transfer_len -= pkt_offset;
precvframe = NULL;
} while (transfer_len > 0);
_exit_recvbuf2recvframe:
return _SUCCESS;
}
#endif
void rtl8814au_xmit_tasklet(void *priv)
{
int ret = _FALSE;
_adapter *padapter = (_adapter*)priv;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
while(1)
{
if (RTW_CANNOT_TX(padapter))
{
RTW_INFO("xmit_tasklet => bDriverStopped or bSurpriseRemoved or bWritePortCancel\n");
break;
}
if (rtw_xmit_ac_blocked(padapter) == _TRUE)
break;
ret = rtl8814au_xmitframe_complete(padapter, pxmitpriv, NULL);
if(ret==_FALSE)
break;
}
}
void rtl8814au_set_intf_ops(struct _io_ops *pops)
{
_rtw_memset((u8 *)pops, 0, sizeof(struct _io_ops));
pops->_read8 = &usb_read8;
pops->_read16 = &usb_read16;
pops->_read32 = &usb_read32;
pops->_read_mem = &usb_read_mem;
pops->_read_port = &usb_read_port;
pops->_write8 = &usb_write8;
pops->_write16 = &usb_write16;
pops->_write32 = &usb_write32;
pops->_writeN = &usb_writeN;
#ifdef CONFIG_USB_SUPPORT_ASYNC_VDN_REQ
pops->_write8_async= &usb_async_write8;
pops->_write16_async = &usb_async_write16;
pops->_write32_async = &usb_async_write32;
#endif
pops->_write_mem = &usb_write_mem;
pops->_write_port = &usb_write_port;
pops->_read_port_cancel = &usb_read_port_cancel;
pops->_write_port_cancel = &usb_write_port_cancel;
#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
pops->_read_interrupt = &usb_read_interrupt;
#endif
}
void rtl8814au_set_hw_type(struct dvobj_priv *pdvobj)
{
pdvobj->HardwareType = HARDWARE_TYPE_RTL8814AU;
RTW_INFO("CHIP TYPE: RTL8814\n");
}

4
ifcfg-wlan0
View File

@ -1,4 +0,0 @@
#DHCP client
DEVICE=wlan0
BOOTPROTO=dhcp
ONBOOT=yes

4
include/autoconf.h
View File

@ -22,7 +22,9 @@
*/
#define AUTOCONF_INCLUDED
#define RTL871X_MODULE_NAME "8821AU"
#ifndef DRV_NAME
#define DRV_NAME "rtl8821au"
#endif
#define CONFIG_USB_HCI
@ -312,7 +314,7 @@
/*
* Debug Related Config
*/
#define DBG 1
//#define DBG 1
#define CONFIG_PROC_DEBUG

2
include/hal_data.h
View File

@ -476,6 +476,8 @@ typedef struct hal_com_data {
u8 txpwr_limit_from_file:1;
u8 rf_power_tracking_type;
u8 CurrentTxPwrIdx;
/* Read/write are allow for following hardware information variables */
u8 crystal_cap;

4
include/rtl8814a_hal.h
View File

@ -32,11 +32,11 @@
#ifdef DBG_CONFIG_ERROR_DETECT
#include "rtl8814a_sreset.h"
#endif /* DBG_CONFIG_ERROR_DETECT */
/*
enum {
VOLTAGE_V25 = 0x03,
LDOE25_SHIFT = 28 ,
};
};*/
/* max. iram is 64k , max dmen is 32k. Total = 96k = 0x18000*/
#define FW_SIZE 0x18000
#define FW_START_ADDRESS 0x1000

8
include/rtl8814a_spec.h
View File

@ -645,4 +645,12 @@ So the following defines for 92C is not entire!!!!!!
#define LAST_ENTRY_OF_TX_PKT_BUFFER_8814A (2048-1) /* 20130415 KaiYuan add for 8814 */
#define MACID_NUM_8814A 128
#define SEC_CAM_ENT_NUM_8814A 64
#define HW_PORT_NUM_8814A 5
#define NSS_NUM_8814A 3
#define BAND_CAP_8814A (BAND_CAP_2G | BAND_CAP_5G)
#define BW_CAP_8814A (BW_CAP_20M | BW_CAP_40M | BW_CAP_80M)
#define PROTO_CAP_8814A (PROTO_CAP_11B | PROTO_CAP_11G | PROTO_CAP_11N | PROTO_CAP_11AC)
#endif /* __RTL8814A_SPEC_H__ */

26
os_dep/linux/ioctl_cfg80211.c
View File

@ -3900,6 +3900,26 @@ static int cfg80211_rtw_set_txpower(struct wiphy *wiphy,
enum tx_power_setting type, int dbm)
#endif
{
_adapter *padapter = wiphy_to_adapter(wiphy);
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
int value;
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36)) || defined(COMPAT_KERNEL_RELEASE)
value = mbm/100;
#else
value = dbm;
#endif
if(value < 0)
value = 0;
if(value > 40)
value = 40;
if(type == NL80211_TX_POWER_FIXED) {
pHalData->CurrentTxPwrIdx = value;
rtw_hal_set_tx_power_level(padapter, pHalData->current_channel);
} else
return -EOPNOTSUPP;
#if 0
struct iwm_priv *iwm = wiphy_to_iwm(wiphy);
int ret;
@ -3936,9 +3956,13 @@ static int cfg80211_rtw_get_txpower(struct wiphy *wiphy,
#endif
int *dbm)
{
_adapter *padapter = wiphy_to_adapter(wiphy);
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
RTW_INFO("%s\n", __func__);
*dbm = (12);
// *dbm = (12);
*dbm = pHalData->CurrentTxPwrIdx;
return 0;
}

54
platform/platform_aml_s905_sdio.c
View File

@ -1,54 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2016 - 2018 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#include <linux/printk.h> /* pr_info(() */
#include <linux/delay.h> /* msleep() */
#include "platform_aml_s905_sdio.h" /* sdio_reinit() and etc */
/*
* Return:
* 0: power on successfully
* others: power on failed
*/
int platform_wifi_power_on(void)
{
int ret = 0;
#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 14, 0))
ret = wifi_setup_dt();
if (ret) {
pr_err("%s: setup dt failed!!(%d)\n", __func__, ret);
return -1;
}
#endif /* kernel < 3.14.0 */
#if 0 /* Seems redundancy? Already done before insert driver */
pr_info("######%s:\n", __func__);
extern_wifi_set_enable(0);
msleep(500);
extern_wifi_set_enable(1);
msleep(500);
sdio_reinit();
#endif
return ret;
}
void platform_wifi_power_off(void)
{
#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 14, 0))
wifi_teardown_dt();
#endif /* kernel < 3.14.0 */
}

110
platform/platform_hisilicon_hi3798_sdio.c
View File

@ -1,110 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2017 - 2018 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#include <linux/delay.h> /* mdelay() */
#include <mach/hardware.h> /* __io_address(), readl(), writel() */
#include "platform_hisilicon_hi3798_sdio.h" /* HI_S32() and etc. */
typedef enum hi_GPIO_DIR_E {
HI_DIR_OUT = 0,
HI_DIR_IN = 1,
} HI_GPIO_DIR_E;
#define RTL_REG_ON_GPIO (4*8 + 3)
#define REG_BASE_CTRL __io_address(0xf8a20008)
int gpio_wlan_reg_on = RTL_REG_ON_GPIO;
#if 0
module_param(gpio_wlan_reg_on, uint, 0644);
MODULE_PARM_DESC(gpio_wlan_reg_on, "wlan reg_on gpio num (default:gpio4_3)");
#endif
static int hi_gpio_set_value(u32 gpio, u32 value)
{
HI_S32 s32Status;
s32Status = HI_DRV_GPIO_SetDirBit(gpio, HI_DIR_OUT);
if (s32Status != HI_SUCCESS) {
pr_err("gpio(%d) HI_DRV_GPIO_SetDirBit HI_DIR_OUT failed\n",
gpio);
return -1;
}
s32Status = HI_DRV_GPIO_WriteBit(gpio, value);
if (s32Status != HI_SUCCESS) {
pr_err("gpio(%d) HI_DRV_GPIO_WriteBit value(%d) failed\n",
gpio, value);
return -1;
}
return 0;
}
static int hisi_wlan_set_carddetect(bool present)
{
u32 regval;
u32 mask;
#ifndef CONFIG_HISI_SDIO_ID
return;
#endif
pr_info("SDIO ID=%d\n", CONFIG_HISI_SDIO_ID);
#if (CONFIG_HISI_SDIO_ID == 1)
mask = 1;
#elif (CONFIG_HISI_SDIO_ID == 0)
mask = 2;
#endif
regval = readl(REG_BASE_CTRL);
if (present) {
pr_info("====== Card detection to detect SDIO card! ======\n");
/* set card_detect low to detect card */
regval |= mask;
} else {
pr_info("====== Card detection to remove SDIO card! ======\n");
/* set card_detect high to remove card */
regval &= ~(mask);
}
writel(regval, REG_BASE_CTRL);
return 0;
}
/*
* Return:
* 0: power on successfully
* others: power on failed
*/
int platform_wifi_power_on(void)
{
int ret = 0;
hi_gpio_set_value(gpio_wlan_reg_on, 1);
mdelay(100);
hisi_wlan_set_carddetect(1);
mdelay(2000);
pr_info("======== set_carddetect delay 2s! ========\n");
return ret;
}
void platform_wifi_power_off(void)
{
hisi_wlan_set_carddetect(0);
mdelay(100);
hi_gpio_set_value(gpio_wlan_reg_on, 0);
}

28
platform/platform_hisilicon_hi3798_sdio.h
View File

@ -1,28 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2017 - 2018 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __PLATFORM_HISILICON_HI3798_SDIO_H__
#define __PLATFORM_HISILICON_HI3798_SDIO_H__
typedef unsigned int HI_U32;
typedef int HI_S32;
#define HI_SUCCESS 0
#define HI_FAILURE (-1)
extern HI_S32 HI_DRV_GPIO_SetDirBit(HI_U32 u32GpioNo, HI_U32 u32DirBit);
extern HI_S32 HI_DRV_GPIO_WriteBit(HI_U32 u32GpioNo, HI_U32 u32BitValue);
#endif /* __PLATFORM_HISILICON_HI3798_SDIO_H__ */

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